In order to achieve the specific goal of a smart grid,the concept of electricity Internet of Things(eloT)has been proposed to assist the monitoring and inspection of power transmission line state and optimize the asse...In order to achieve the specific goal of a smart grid,the concept of electricity Internet of Things(eloT)has been proposed to assist the monitoring and inspection of power transmission line state and optimize the asset utilization.The long power transmission line and the complex field operation environment urge the introduction of drones into the eloT for fast power transmission line inspection,data collection from sensors for further big data analysis,adaptive control of power line voltage,etc.Additionally,drones can also act as a central communication control or relay point to serve the data exchange among sensors,drones and power transmission line maintenance personnel in the scenario where the conventional mobile communication service is not available.However,the fast mobility of drones may affect the signal transmission and position estimation performance,which may further deteriorate the networking performance.In order to solve this problem,a mobility compensation method is proposed,which includes the steps of frequency offset estimation and relative velocity calculation.Through the Monte Carlo simulations,the proposed algorithm shows favorable gains compared with the conventional ones.展开更多
A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase...A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors.展开更多
A double sampling circuit to eliminating fixed pattern noise(FPN) in CMOS image sensor (CIS) is presented. Double sampling is implemented by column switch capacitor amplifier directly, and offset compensation is added...A double sampling circuit to eliminating fixed pattern noise(FPN) in CMOS image sensor (CIS) is presented. Double sampling is implemented by column switch capacitor amplifier directly, and offset compensation is added to the amplifier to suppress column FPN. The amplifier is embedded in a 64×64 CIS and successfully fabricated with chartered 0.35 μm process. Theory analysis and circuit simulation indicate that FPN can be suppressed from millivolt to microvolt. Test results show that FPN is smaller than one least-significant bit of 8 bit ADC. FPN is reduced to an acceptable level with double sampling technique implemented with switch capacitor amplifier.展开更多
In this paper, an improved PI （proportional integral） stator resistance estimation for a DTC （direct torque controlled） induction motor is proposed. This estimation method is based on an on-line stator resistance ...In this paper, an improved PI （proportional integral） stator resistance estimation for a DTC （direct torque controlled） induction motor is proposed. This estimation method is based on an on-line stator resistance correction regarding the variations of the stator current estimation error. In fact, the input variable of the P1 estimator is the stator current estimation error. The main idea is to tune accurately the stator resistance value relatively to the evolution of the stator current estimation error gradient to avoid the drive instability and ensure the tracking of the actual value of the stator resistance. But there is an unavoidable steady state error between the filtered stator current modulus and its estimated value from the dq model of the machine which is due to pseudo random commutations of the inverter switches. This may deteriorate the performance of the proposed fuzzy stator resistance estimator. An offset has been introduced in order to overcome this problem, for different speed command values and load torques. Simulation results show that the proposed estimator was able to successfully track the actual value of the stator resistance lbr different operating conditions.展开更多
文摘In order to achieve the specific goal of a smart grid,the concept of electricity Internet of Things(eloT)has been proposed to assist the monitoring and inspection of power transmission line state and optimize the asset utilization.The long power transmission line and the complex field operation environment urge the introduction of drones into the eloT for fast power transmission line inspection,data collection from sensors for further big data analysis,adaptive control of power line voltage,etc.Additionally,drones can also act as a central communication control or relay point to serve the data exchange among sensors,drones and power transmission line maintenance personnel in the scenario where the conventional mobile communication service is not available.However,the fast mobility of drones may affect the signal transmission and position estimation performance,which may further deteriorate the networking performance.In order to solve this problem,a mobility compensation method is proposed,which includes the steps of frequency offset estimation and relative velocity calculation.Through the Monte Carlo simulations,the proposed algorithm shows favorable gains compared with the conventional ones.
基金Supported by National Natural Science Foundation of China (No.60806010,No.60976030)
文摘A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors.
基金Supported by National Natural Science Foundation of China (No.60576025).
文摘A double sampling circuit to eliminating fixed pattern noise(FPN) in CMOS image sensor (CIS) is presented. Double sampling is implemented by column switch capacitor amplifier directly, and offset compensation is added to the amplifier to suppress column FPN. The amplifier is embedded in a 64×64 CIS and successfully fabricated with chartered 0.35 μm process. Theory analysis and circuit simulation indicate that FPN can be suppressed from millivolt to microvolt. Test results show that FPN is smaller than one least-significant bit of 8 bit ADC. FPN is reduced to an acceptable level with double sampling technique implemented with switch capacitor amplifier.
文摘In this paper, an improved PI （proportional integral） stator resistance estimation for a DTC （direct torque controlled） induction motor is proposed. This estimation method is based on an on-line stator resistance correction regarding the variations of the stator current estimation error. In fact, the input variable of the P1 estimator is the stator current estimation error. The main idea is to tune accurately the stator resistance value relatively to the evolution of the stator current estimation error gradient to avoid the drive instability and ensure the tracking of the actual value of the stator resistance. But there is an unavoidable steady state error between the filtered stator current modulus and its estimated value from the dq model of the machine which is due to pseudo random commutations of the inverter switches. This may deteriorate the performance of the proposed fuzzy stator resistance estimator. An offset has been introduced in order to overcome this problem, for different speed command values and load torques. Simulation results show that the proposed estimator was able to successfully track the actual value of the stator resistance lbr different operating conditions.
