期刊文献+
共找到2篇文章
< 1 >
每页显示 20 50 100
基于CPLD的异步串行收发器设计 被引量:1
1
作者 秦金明 刘笃仁 《国外电子元器件》 2005年第1期13-17,共5页
介绍了基于CPLD的异步串行收发器的设计方案 ,着重叙述了用混合输入 (包括原理图和VHDL)实现该设计的思想 ,阐述了在系统可编程(ISP)开发软件的应用方法与设计流程 ,并给出了VHDL源文件和仿真波形。
关键词 异步串行收发器 混合输入 在系统可编程 CPLD ispLSI1016
在线阅读 下载PDF
Adder design using a 5-input majority gate in a novel “multilayer gate design paradigm” for quantum dot cellular automata circuits 被引量:2
2
作者 Rohit Kumar Bahniman Ghosh Shoubhik Gupta 《Journal of Semiconductors》 EI CAS CSCD 2015年第4期95-103,共9页
This paper proposes a novel design paradigm for circuits designed in quantum dot cellular automata (QCA) technology. Previously reported QCA circuits in the literature have generally been designed in a single layer ... This paper proposes a novel design paradigm for circuits designed in quantum dot cellular automata (QCA) technology. Previously reported QCA circuits in the literature have generally been designed in a single layer which is the main logical block in which the inverter and majority gate are on the base layer, except for the parts where multilayer wire crossing was used. In this paper the concept of multilayer wire crossing has been extended to design logic gates in multilayers. Using a 5-input majority gate in a multilayer, a 1-bit and 2-bit adder have been designed in the proposed multilayer gate design paradigm. A comparison has been made with some adders reported previously in the literature and it has been shown that circuits designed in the proposed design paradigm are much more efficient in terms of area, the requirement of QCA cells in the design and the input-output delay of the circuit. Over all, the availability of one additional spatial dimension makes the design process much more flexible and there is scope for the customizability of logic gate designs to make the circuit compact. 展开更多
关键词 multilayer gate design QCA ADDERS MUX 5-input majority voter
原文传递
上一页 1 下一页 到第
使用帮助 返回顶部