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Back-gate bias and supply voltage dependency on the single-event upset susceptibility of 6 T CSOI-SRAM
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作者 Li-Wen Yao Jin-Hu Yang +12 位作者 Yu-Zhu Liu Bo Li Yang Jiao Shi-Wei Zhao Qi-Yu Chen Xin-Yu Li Tian-Qi Wang Fan-Yu Liu Jian-Tou Gao Jian-Li Liu Xing-Ji Li Jie Liu Pei-Xiong Zhao 《Nuclear Science and Techniques》 2025年第9期105-115,共11页
This paper explores the impact of back-gate bias (V_(soi)) and supply voltage (V_(DD)) on the single-event upset (SEU) cross section of 0.18μm configurable silicon-on-insulator static random-access memory (SRAM) unde... This paper explores the impact of back-gate bias (V_(soi)) and supply voltage (V_(DD)) on the single-event upset (SEU) cross section of 0.18μm configurable silicon-on-insulator static random-access memory (SRAM) under high linear energy transfer heavyion experimentation.The experimental findings demonstrate that applying a negative back-gate bias to NMOS and a positive back-gate bias to PMOS enhances the SEU resistance of SRAM.Specifically,as the back-gate bias for N-type transistors(V_(nsoi)) decreases from 0 to-10 V,the SEU cross section decreases by 93.23%,whereas an increase in the back-gate bias for P-type transistors (V_(psoi)) from 0 to 10 V correlates with an 83.7%reduction in SEU cross section.Furthermore,a significant increase in the SEU cross section was observed with increase in supply voltage,as evidenced by a 159%surge at V_(DD)=1.98 V compared with the nominal voltage of 1.8 V.To explore the physical mechanisms underlying these experimental data,we analyzed the dependence of the critical charge of the circuit and the collected charge on the bias voltage by simulating SEUs using technology computer-aided design. 展开更多
关键词 Single-event upset(SEU) Static random-access memory(SRAM) Back-gate voltage Supply voltage
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基于级进延展冷镦工艺的大长径比薄壁管件成形优化
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作者 孙进 陈野 +1 位作者 朱兴龙 黄小建 《锻压技术》 北大核心 2026年第2期7-14,共8页
针对常见的大长径比薄壁管件热锻工艺存在的温度难以控制、尺寸精度低的问题,以长径比为5.3的气弹簧用油气缸为例,提出一种先镦粗后级进延展式冷镦成形方法。在搭建三维模型的基础上,利用Deform-3D软件对拟定工艺的金属流动规律、成形... 针对常见的大长径比薄壁管件热锻工艺存在的温度难以控制、尺寸精度低的问题,以长径比为5.3的气弹簧用油气缸为例,提出一种先镦粗后级进延展式冷镦成形方法。在搭建三维模型的基础上,利用Deform-3D软件对拟定工艺的金属流动规律、成形载荷和断裂趋势等进行分析,验证了工艺的可行性。结合仿真结果,以薄壁延伸最大成形载荷为优化目标,利用正交试验与极差分析,得出各因素对最大成形载荷的影响程度依次为:首次缩径值a>入模角λ>冲头下压速度v,并选取了最优工艺参数组合:冲头下压速度v=15 mm·s^(-1)、首次缩径值a=0.70 mm、入模角λ=7°。优化后的工艺参数使最大成形载荷降低了18.15%,提高了薄壁成形质量。研究结果为同类大长径比薄壁管件的研究提供了理论参考。 展开更多
关键词 大长径比薄壁管件 级进延展冷镦工艺 最大成形载荷 金属流动规律 损伤值
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Microstructure and mechanical properties of AZ31-Mg_2Si in situ composite fabricated by repetitive upsetting 被引量:4
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作者 郭炜 王渠东 +2 位作者 叶兵 周浩 刘鉴锋 《Transactions of Nonferrous Metals Society of China》 SCIE EI CAS CSCD 2014年第12期3755-3761,共7页
AZ31-4.6% Mg2Si (mass fraction) composite was prepared by conventional casting method. Repetitive upsetting (RU) was applied to severely deforming the as-cast composite at 400 ℃ for 1, 3, and 5 passes. Finite ele... AZ31-4.6% Mg2Si (mass fraction) composite was prepared by conventional casting method. Repetitive upsetting (RU) was applied to severely deforming the as-cast composite at 400 ℃ for 1, 3, and 5 passes. Finite element analysis of the material flow indicates that deformation concentrates in the bottom region of the sample after 1 pass, and much more uniform deformation is obtained after 5 passes. During multi-pass RU process, both dendritic and Chinese script type Mg2Si phases are broken up into smaller particles owing to the shear stress forced by the matrix. With the increasing number of RU passes, finer grain size and more homogeneous distribution of Mg2Si particles are obtained along with significant enhancement in both strength and ductility. AZ31-4.6%Mg2Si composite exhibits tensile strength of 284 MPa and elongation of 9.8%after 5 RU passes at 400 ℃ compared with the initial 128 MPa and 5.4%of original AZ31-4.6%Mg2Si composite. 展开更多
关键词 AZ31-Mg2Si composite Mg2Si particle repetitive upsetting microstructure mechanical properties
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Multiple Node Upset in SEU Hardened Storage Cells 被引量:4
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作者 刘必慰 郝跃 陈书明 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第2期244-250,共7页
We study the problem of multiple node upset (MNU) using three-dimensional device simulation. The results show the transient floating node and charge lateral diffusion are the key reasons for MNU. We compare the MNU ... We study the problem of multiple node upset (MNU) using three-dimensional device simulation. The results show the transient floating node and charge lateral diffusion are the key reasons for MNU. We compare the MNU with multiple bit upset (MBU),and find that their characteristics are different. Methods to avoid MNU are also discussed. 展开更多
关键词 multiple node upset hardened cell charge collection
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大气中子在电荷俘获型3D NAND闪存中引起的单粒子翻转特性及机理研究
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作者 李鸿德 张鸿 +5 位作者 焦扬 雷志锋 杨炜坤 李惠 路国光 张战刚 《物理学报》 北大核心 2026年第3期368-375,共8页
基于中国散裂中子源大气中子辐照谱仪提供的meV-GeV宽能谱中子束流,对128层电荷俘获型(charge trap,CT)3D NAND闪存开展中子辐照实验和仿真.研究发现,CT型3D NAND闪存在宽能谱中子辐照下的主要失效模式为单位翻转(single bit upset,SBU... 基于中国散裂中子源大气中子辐照谱仪提供的meV-GeV宽能谱中子束流,对128层电荷俘获型(charge trap,CT)3D NAND闪存开展中子辐照实验和仿真.研究发现,CT型3D NAND闪存在宽能谱中子辐照下的主要失效模式为单位翻转(single bit upset,SBU)、多单元翻转(multiple cell upset,MCU),其中SBU占比为82.6%.通过构建单粒子翻转(single event upset,SEU)事件的三维空间分布图发现,不同于重离子SEU的“串型”分布,中子SEU表现出显著的随机空间分布特点,仅存在少量“串型”分布的MCU事件.在MCU事件中,2位MCU占比最高,达到MCU事件的83.6%,高于2位的大尺寸MCU占比为16.4%,最大的MCU位数为7位.MCU图形以沿中子入射方向分布为主.进一步的中子输运仿真结果表明,中子在器件灵敏区内产生的二次粒子主要为N离子和Si离子.其中,线性能量传输(linear energy transfer,LET)小于10 MeV·cm^(2)·mg^(–1)的短射程二次粒子占主导,是诱发SBU的主要因素.少量LET值大、射程长的二次粒子是MCU的产生诱因. 展开更多
关键词 3D NAND闪存 大气中子 单粒子翻转 多单元翻转
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小规格高强度TB9钛合金轴类零件缩杆成形数值模拟及优化
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作者 张晓斌 李海涛 +2 位作者 马叙 李贺龙 李晓林 《锻压技术》 北大核心 2026年第1期65-71,共7页
研究了某种航天用钛合金芯杆的缩杆成形工艺,并根据芯杆结构进行不同成形工序的模具设计。借助有限元软件Deform-3D对成形过程进行数值模拟,分析成形过程中的应力、应变和损伤值分布,以及载荷-行程曲线。结果表明,室温成形时第1步成形... 研究了某种航天用钛合金芯杆的缩杆成形工艺,并根据芯杆结构进行不同成形工序的模具设计。借助有限元软件Deform-3D对成形过程进行数值模拟,分析成形过程中的应力、应变和损伤值分布,以及载荷-行程曲线。结果表明,室温成形时第1步成形哪部分芯杆结构,台阶、卡环槽或头部,会显著影响最终的成形结果。最终基于数值模拟结果,确定了最优工艺方案。经生产工艺实验验证,采用最优工艺方案生产多台阶芯杆,其头部以及槽部位连接平滑,无裂纹,填充饱满。对比零件实际外形尺寸和模拟结果,各尺寸偏差均符合产品要求,证实缩杆成形工艺方案切实可行,极大提升了生产效益与产品品质。 展开更多
关键词 TB9钛合金 芯杆 冷镦挤 缩杆成形 台阶
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镦拔变形对100Cr6钢显微组织与硬度的影响
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作者 马帅 陈克飞 +2 位作者 李建文 贺乐君 杨立军 《热加工工艺》 北大核心 2026年第1期195-199,共5页
对100Cr6钢进行了镦拔变形,研究了镦拔道次对晶粒细化和硬度的影响,分析了水淬后钢的组织变化。结果表明:随镦拔道次从一镦一拔增加到三镦三拔,试样中心晶粒大小从122.1μm减小到24.1μm,减少了80.3%;试样边缘晶粒大小从93.0μm减小到2... 对100Cr6钢进行了镦拔变形,研究了镦拔道次对晶粒细化和硬度的影响,分析了水淬后钢的组织变化。结果表明:随镦拔道次从一镦一拔增加到三镦三拔,试样中心晶粒大小从122.1μm减小到24.1μm,减少了80.3%;试样边缘晶粒大小从93.0μm减小到22.1μm,减少了76.2%。试样加热淬火后组织为粗大的奥氏体,镦拔淬火后,微观组织为淬火针状马氏体+少量团块状淬火屈氏体。镦拔淬火后试样的中心硬度为54.2~56.2 HRC,边缘的硬度为54.8~57.8 HRC。 展开更多
关键词 镦拔变形 100Cr6钢 显微组织 硬度
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超大型储能飞轮锻件晶粒细化工艺研究
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作者 杨小涵 陈太辉 +1 位作者 时立佳 张金珠 《金属加工(热加工)》 2026年第2期131-137,共7页
针对轴身直径近3m的30Cr2Ni4MoV钢大型储能飞轮锻件,因大镦粗比锻造导致难变形区晶粒粗大、组织遗传严重的问题,采用传统多次正火工艺难以实现该类锻件的晶粒细化,且较难满足无损检测要求,为此通过试验测定材料的等温转变“鼻尖”温度,... 针对轴身直径近3m的30Cr2Ni4MoV钢大型储能飞轮锻件,因大镦粗比锻造导致难变形区晶粒粗大、组织遗传严重的问题,采用传统多次正火工艺难以实现该类锻件的晶粒细化,且较难满足无损检测要求,为此通过试验测定材料的等温转变“鼻尖”温度,进而有针对性地开发专用等温转变工艺并应用于工程实践,有效提升了锻件晶粒细化效果与经济性,为同类超大型锻件的质量控制提供了关键技术支撑。 展开更多
关键词 储能飞轮锻件 大镦粗比 晶粒细化 等温转变
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辅助热源搅拌摩擦焊技术研究现状
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作者 赵尉辰 岳玉梅 赵华夏 《航空制造技术》 北大核心 2026年第3期117-135,共19页
搅拌摩擦焊(Friction stir welding,FSW)作为先进固相连接技术,广泛应用于航空航天等领域,但高熔点合金连接对搅拌摩擦焊的发展提出了新的挑战。辅助热源的外加能场辅助搅拌摩擦焊技术可以有效解决高熔点合金搅拌摩擦焊过程中存在的问题... 搅拌摩擦焊(Friction stir welding,FSW)作为先进固相连接技术,广泛应用于航空航天等领域,但高熔点合金连接对搅拌摩擦焊的发展提出了新的挑战。辅助热源的外加能场辅助搅拌摩擦焊技术可以有效解决高熔点合金搅拌摩擦焊过程中存在的问题,同时该技术也具有扩展工艺窗口、提高力学性能、降低焊接顶锻力与减少搅拌头磨损等优势。本文总结了迄今为止针对高熔点合金辅助热源搅拌摩擦焊的各类研究工作,涵盖感应辅助、激光辅助、电流辅助、电弧辅助及背部加热辅助等多种辅助方式;梳理了这些研究取得的主要成果,包括增加热输入、降低焊接顶锻力、改善微观结构以及提高接头力学性能等,并对该领域未来的研究方向进行了展望。 展开更多
关键词 搅拌摩擦焊(Friction stir welding FSW) 高熔点合金 辅助热源 焊接顶锻力 力学性能 微观结构
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针对数字延迟锁相环模块的单粒子翻转容错设计
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作者 涂子归 吴丽娟 李振涛 《微电子学与计算机》 2026年第1期165-174,共10页
研究了数字延迟锁相环的设计以及其单粒子翻转的容错设计,并提出一种电路级SEU(Single Event Upset,单粒子翻转)仿真方法。首先,提出了一款基于延迟线的数字延迟锁相环,探究了单粒子翻转效应的产生与现象,并通过开关电容的方式来引入节... 研究了数字延迟锁相环的设计以及其单粒子翻转的容错设计,并提出一种电路级SEU(Single Event Upset,单粒子翻转)仿真方法。首先,提出了一款基于延迟线的数字延迟锁相环,探究了单粒子翻转效应的产生与现象,并通过开关电容的方式来引入节点电平的翻转来模拟这一效应。其次,对不同的模块提出了不同的加固方法,在延迟链路中加入冗余链路配合表决器来抑制SEU的影响。再次,在TSPC触发器中设计了双模冗余搭配双输入反相器来增强触发器的抗SEU能力。最后,为了进一步提高系统的稳定性,设计了失锁恢复机制,使其在SEU发生后能够快速恢复锁定状态。仿真结果表明:设计的DDLL工作频率范围为200~600 MHz,加固前锁定时间为123.785 6~872.450 5 ns,加固后锁定时间为117.524 8~849.597 3 ns,且容错设计能够有效地抑制SEU引起的信号错误,为辐射环境中的延迟锁相环电路设计提供了有效的解决方案。 展开更多
关键词 数字延迟锁相环 单粒子翻转 辐射加固设计
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宇航环境下基于RHBD的SRAM抗双节点翻转研究综述
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作者 帅威 蔡烁 +4 位作者 陈俊伊 陈俊哲 梁鑫杰 黄珠 魏懋萱 《集成电路与嵌入式系统》 2026年第3期20-33,共14页
在宇航等高可靠性应用环境中,由辐射引发的多节点翻转已成为影响静态随机存储器稳定性的关键因素。近年来,针对双节点翻转问题,基于辐射加固设计策略的多种抗干扰结构被提出并得到广泛研究,典型的如S8P8N、QUCCE12T、SARP12T、HRLP16T、... 在宇航等高可靠性应用环境中,由辐射引发的多节点翻转已成为影响静态随机存储器稳定性的关键因素。近年来,针对双节点翻转问题,基于辐射加固设计策略的多种抗干扰结构被提出并得到广泛研究,典型的如S8P8N、QUCCE12T、SARP12T、HRLP16T、RH20T、S6P8N与RH14T等。文中系统回顾了现有RHBD型SRAM结构在DNU容错方面的设计理念与关键性能指标,梳理其在可靠性、功耗、面积、访问速度及静态稳定性等方面的优势与局限,并对比分析不同设计策略的适用场景。最后,指出当前RHBD结构在细粒度容错控制与综合性能平衡方面仍面临的挑战,未来设计可在电荷传播路径抑制、反馈机制优化等方向进一步突破。 展开更多
关键词 SRAM RHBD 双节点翻转 加固结构 S8P8N QUCCE12T SARP12T HRLP16T RH20T S6P8N RH14T
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纳米FinFET工艺抗辐射加固多位触发器设计技术研究
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作者 张彦龙 朱永钦 +2 位作者 王亚坤 李同德 王亮 《现代应用物理》 2026年第1期151-158,共8页
宇航集成电路的设计目标是抗辐射、高性能和低功耗。多位触发器可降低芯片功耗,广泛应用于系统级芯片(system on chip,SoC)、现场可编程门阵列(field-programmable gate array,FPGA)等电路中。基于鳍式场效应晶体管(fin field-effect tr... 宇航集成电路的设计目标是抗辐射、高性能和低功耗。多位触发器可降低芯片功耗,广泛应用于系统级芯片(system on chip,SoC)、现场可编程门阵列(field-programmable gate array,FPGA)等电路中。基于鳍式场效应晶体管(fin field-effect transistor,FinFET)工艺特征,提出了优化功耗开销的多位触发器抗辐射加固技术。通过对多位触发器使用双互锁存储单元(dual interlocked storage cell,DICE)和空间交叉版图布局进行抗单粒子单/多节点翻转设计,对双路数据端和共享的时钟信号均引入滤波结构,在实现抗单粒子瞬态(single event transient,SET)的同时降低了加固设计引入的功耗、面积开销。对非加固商用触发器、DICE结构触发器和设计的加固多位触发器3款纳米工艺FinFET电路进行辐射试验研究。研究结果表明:在FinFET工艺下,仅使用DICE结构不足以满足加固需求,与商用触发器相比,使用本文方法的多位触发器的单粒子翻转(single event upset,SEU)截面可降低81%以上。该设计能够在实现较好加固效果的同时降低加固设计的功耗、面积开销,为纳米FinFET工艺抗辐射集成电路性能参数的平衡设计提供参考。 展开更多
关键词 FINFET 多位触发器 抗辐射加固 单粒子翻转 单粒子瞬态
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Heavy ion-induced single event upset sensitivity evaluation of 3D integrated static random access memory 被引量:6
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作者 Xue-Bing Cao Li-Yi Xiao +5 位作者 Ming-Xue Huo Tian-Qi Wang Shan-Shan Liu Chun-Hua Qi An-Long Li Jin-Xiang Wang 《Nuclear Science and Techniques》 SCIE CAS CSCD 2018年第3期31-41,共11页
Heavy ion-induced single event upsets(SEUs)of static random access memory(SRAM), integrated with three-dimensional integrated circuit technology, are evaluated using a Monte Carlo simulation method based on the Geant4... Heavy ion-induced single event upsets(SEUs)of static random access memory(SRAM), integrated with three-dimensional integrated circuit technology, are evaluated using a Monte Carlo simulation method based on the Geant4 simulation toolkit. The SEU cross sections and multiple cell upset(MCU) susceptibility of 3D SRAM are explored using different types and energies of heavy ions.In the simulations, the sensitivities of different dies of 3D SRAM show noticeable discrepancies for low linear energy transfers(LETs). The average percentage of MCUs of 3D SRAM increases from 17.2 to 32.95%, followed by the energy of ^(209)Bi decreasing from 71.77 to 38.28 MeV/u. For a specific LET, the percentage of MCUs presents a notable difference between the face-to-face and back-toface structures. In the back-to-face structure, the percentage of MCUs increases with a deeper die, compared with the face-to-face structure. The simulation method and process are verified by comparing the SEU cross sections of planar SRAM with experimental data. The upset cross sections of the planar process and 3D integrated SRAM are analyzed. The results demonstrate that the 3D SRAM sensitivity is not greater than that of the planar SRAM. The 3D process technology has the potential to be applied to the aerospace and military fields. 展开更多
关键词 3D integration Single EVENT upset (SEU) Multiple CELL upset (MCU) MONTE Carlo simulation
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Angular dependence of multiple-bit upset response in static random access memories under heavy ion irradiation 被引量:5
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作者 张战刚 刘杰 +9 位作者 侯明东 孙友梅 苏弘 段敬来 莫丹 姚会军 罗捷 古松 耿超 习凯 《Chinese Physics B》 SCIE EI CAS CSCD 2013年第8期529-533,共5页
Experimental evidence is presented relevant to the angular dependences of multiple-bit upset (MBU) rates and patterns in static random access memories (SRAMs) under heavy ion irradiation. The single event upset (... Experimental evidence is presented relevant to the angular dependences of multiple-bit upset (MBU) rates and patterns in static random access memories (SRAMs) under heavy ion irradiation. The single event upset (SEU) cross sections under tilted ion strikes are overestimated by 23.9%-84.6%, compared with under normally incident ion with the equivalent linear energy transfer (LET) value of 41 MeV/(mg/cm2), which can be partially explained by the fact that the MBU rate for tilted ions of 30° is 8.5%-9.8% higher than for normally incident ions. While at a lower LET of - 9.5 MeV/(mg/cm2), no clear discrepancy is observed. Moreover, since the ion trajectories at normal and tilted incidences are different, the predominant double-bit upset (DBU) patterns measured are different in both conditions. Those differences depend on the LET values of heavy ions and devices under test. Thus, effective LET method should be used carefully in ground-based testing of single event effects (SEE) sensitivity, especially in MBU-sensitive devices. 展开更多
关键词 single event effects effective LET method multiple-bit upset upset cross section
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Recovery of single event upset in advanced complementary metal-oxide semiconductor static random access memory cells 被引量:4
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作者 Qin Jun-Rui Chen Shu-Ming +1 位作者 Liang Bin Liu Bi-Wei 《Chinese Physics B》 SCIE EI CAS CSCD 2012年第2期624-628,共5页
Using computer-aided design three-dimensional (3D) simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi... Using computer-aided design three-dimensional (3D) simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi-node charge collection plays a key role in recovery and shielding the charge sharing by adding guard rings. It cannot exhibit the recovery effect. It is also indicated that the upset linear energy transfer (LET) threshold is kept constant while the recovery LET threshold increases as the spacing increases. Additionally, the effect of incident angle on recovery is analysed and it is shown that a larger angle can bring about a stronger charge sharing effect, thus strengthening the recovery ability. 展开更多
关键词 single event upset multi-node charge collection static random access memory angulardependence
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Physics-based analysis and simulation model of electromagnetic interference induced soft logic upset in CMOS inverter 被引量:4
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作者 Yu-Qian Liu Chang-Chun Chai +4 位作者 Yu-Hang Zhang Chun-Lei Shi Yang Liu Qing-Yang Fan Yin-Tang Yang 《Chinese Physics B》 SCIE EI CAS CSCD 2018年第6期531-538,共8页
The instantaneous reversible soft logic upset induced by the electromagnetic interference(EMI) severely affects the performances and reliabilities of complementary metal–oxide–semiconductor(CMOS) inverters. This... The instantaneous reversible soft logic upset induced by the electromagnetic interference(EMI) severely affects the performances and reliabilities of complementary metal–oxide–semiconductor(CMOS) inverters. This kind of soft logic upset is investigated in theory and simulation. Physics-based analysis is performed, and the result shows that the upset is caused by the non-equilibrium carrier accumulation in channels, which can ultimately lead to an abnormal turn-on of specific metal–oxide–semiconductor field-effect transistor(MOSFET) in CMOS inverter. Then a soft logic upset simulation model is introduced. Using this model, analysis of upset characteristic reveals an increasing susceptibility under higher injection powers, which accords well with experimental results, and the influences of EMI frequency and device size are studied respectively using the same model. The research indicates that in a range from L waveband to C waveband, lower interference frequency and smaller device size are more likely to be affected by the soft logic upset. 展开更多
关键词 electromagnetic interference soft logic upset non-equilibrium carrier upset model
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Monte Carlo evaluation of spatial multiple-bit upset sensitivity to oblique incidence 被引量:7
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作者 耿超 刘杰 +7 位作者 习凯 张战刚 古松 侯明东 孙友梅 段敬来 姚会军 莫丹 《Chinese Physics B》 SCIE EI CAS CSCD 2013年第5期657-664,共8页
We investigate the impact of heavy ion irradiation on a hypothetical static random access memory (SRAM) device. Influences of the irradiation angle, critical charge, drain-drain spacing, and dimension of device stru... We investigate the impact of heavy ion irradiation on a hypothetical static random access memory (SRAM) device. Influences of the irradiation angle, critical charge, drain-drain spacing, and dimension of device structure on the device sensitivity have been studied. These prediction and simulated results are interpreted with MUFPSA, a Monte Carlo code based on Geant4. The results show that the orientation of ion beams and device with different critical charge exert indis- pensable effects on multiple-bit upsets (MBUs), and that with the decrease in spacing distance between adjacent cells or the dimension of the cells, the device is more susceptible to single event effect, especially to MBUs at oblique incidence. 展开更多
关键词 GEANT4 multiple-bit upset (MBU) critical charge spacing between adjacent cells
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Heavy ion induced upset errors in 90-nm 64 Mb NOR-type floating-gate Flash memory 被引量:5
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作者 Jin-Shun Bi Kai Xi +4 位作者 Bo Li Hai-Bin Wang Lan-Long Ji Jin Lil and Ming Liu 《Chinese Physics B》 SCIE EI CAS CSCD 2018年第9期615-619,共5页
Upset errors in 90-nm 64 Mb NOR-type floating-gate Flash memory induced by accelerated ^(129)Xe and ^(209)Bi ions are investigated in detail. The linear energy transfer covers the range from 50 to 99.8 Me V/(mg/c... Upset errors in 90-nm 64 Mb NOR-type floating-gate Flash memory induced by accelerated ^(129)Xe and ^(209)Bi ions are investigated in detail. The linear energy transfer covers the range from 50 to 99.8 Me V/(mg/cm^2). When the memory chips are powered off during heavy ions irradiation, single-event-latch-up and single-event-function-interruption are excluded,and only 0-〉1 upset errors in the memory array are observed. These error bit rates seem very difficult to achieve and cannot be simply recovered based on the power cycle. The number of error bits shows a strong dependence on the linear energy transfer(LET). Under room-temperature annealing conditions, the upset errors can be reduced by about two orders of magnitude using rewrite/reprogram operations, but they subsequently increase once again in a few minutes after the power cycle. High-temperature annealing can diminish almost all error bits, which are affected by the lower LET ^(129)Xe ions. The percolation path between the floating-gate(FG) and the substrate contributes to the radiation-induced leakage current, and has been identified as the root cause of the upset errors of the Flash memory array in this work. 展开更多
关键词 heavy ion Flash memory single event upset annealing
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The supply voltage scaled dependency of the recovery of single event upset in advanced complementary metal-oxide-semiconductor static random-access memory cells 被引量:2
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作者 李达维 秦军瑞 陈书明 《Chinese Physics B》 SCIE EI CAS CSCD 2013年第2期591-594,共4页
Using computer-aided design three-dimensional simulation technology,the supply voltage scaled dependency of the recovery of single event upset and charge collection in static random-access memory cells are investigate... Using computer-aided design three-dimensional simulation technology,the supply voltage scaled dependency of the recovery of single event upset and charge collection in static random-access memory cells are investigated.It reveals that the recovery linear energy transfer threshold decreases with the supply voltage reducing,which is quite attractive for dynamic voltage scaling and subthreshold circuit radiation-hardened design.Additionally,the effect of supply voltage on charge collection is also investigated.It is concluded that the supply voltage mainly affects the bipolar gain of the parasitical bipolar junction transistor(BJT) and the existence of the source plays an important role in supply voltage variation. 展开更多
关键词 single event upset multi-node charge collection RECOVERY ultra-low ower voltage
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Microstructural evolution and mechanical properties of Mg-9.8Gd-2.7Y-0.4Zr alloy produced by repetitive upsetting 被引量:8
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作者 H.Zhou H.Y.Ning +6 位作者 X.L.Ma D.D.Yin L.R.Xiao X.C.Sha Y.D.Yu Q.D.Wang Y.S.Li 《Journal of Materials Science & Technology》 SCIE EI CAS CSCD 2018年第7期1067-1075,共9页
A newly developed severe plastic deformation (SPD) technique, i.e. repetitive upsetting (RU), is employed to improve the strength and ductility of a Mg-Gd-Y-Zr alloy. During the RU processing, dynamic recrystalliz... A newly developed severe plastic deformation (SPD) technique, i.e. repetitive upsetting (RU), is employed to improve the strength and ductility of a Mg-Gd-Y-Zr alloy. During the RU processing, dynamic recrystallization occurs in the Mg alloy, which leads to a significant grain refinement from 11.2 p.m to 2.8 μm. The yield strength (YS), ultimate tensile strength (UTS) and elongation increase simultaneously with increasing RU passes. The microstructural evolution is affected by processing temperatures. Dynamic recrystallization prevails at low temperatures, while dynamic recovery is the main effect factor at high temperatures. Texture characteristics gradually become random during multiple passes of RU processing, which reduces the tension-compression asymmetry of the Mg-Gd-Y-Zr alloy. 2018 Published by Elsevier Ltd on behalf of The editorial office of Journal of Materials Science & Technology. 展开更多
关键词 Severe plastic deformation (SPD) Repetitive upsetting (RU) Mg-RE alloy Mechanical properties
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