Naturally degradable capsule provides a platform for sustained fragrance release.However,practical challenges such as low encapsulation efficiency and difficulty in sustained release are still limited in using fragran...Naturally degradable capsule provides a platform for sustained fragrance release.However,practical challenges such as low encapsulation efficiency and difficulty in sustained release are still limited in using fragranceloaded capsules.In this work,the natural materials sodium alginate and gelatine are dissolved and act as the aqueous phase,lavender is dissolved in caprylic/capric triglyceride(GTCC)as the oil phase,and SiO_(2) nanoparticles with neutralwettability as a solid emulsifier to form O/W Pickering emulsions simultaneously.Finally,multi-core capsules are prepared using the drop injection method with emulsions as templates.The results show that the capsules have been successfully prepared with a spherical morphology and multi-core structure,and the encapsulation rate of multi-core capsules can reach up to 99.6%.In addition,the multi-core capsules possess desirable sustained release performance,the cumulative sustained release rate of fragrance at 25℃over 49 days is only 32.5%.It is attributed to the significant protection of multi-core structure,Pickering emulsion nanoparticle membranes,and hydrogel network shell for encapsulated fragrance.This study is designed to deliver a new strategy for using sustained-release technology with fragrance in food,cosmetics,textiles,and other fields.展开更多
Si P微系统是一种高度集成化的系统,其内部可能集成1个或多个DSP、NOR Flash和DDR存储器、AI加速芯片等,有些复杂的微系统还集成了FPGA芯片。由于内部集成了多个微组件,芯片之间相互连接,传统的测试单一微组件的方法并不适用于微系统的...Si P微系统是一种高度集成化的系统,其内部可能集成1个或多个DSP、NOR Flash和DDR存储器、AI加速芯片等,有些复杂的微系统还集成了FPGA芯片。由于内部集成了多个微组件,芯片之间相互连接,传统的测试单一微组件的方法并不适用于微系统的测试。提出了一套DSP微组件测试方法,该系统包括1块专门的测试板、可调试的电脑测试环境和JTAG通信。与单一的DSP裸芯测试相比,它可以快速稳定地实现DSP微组件的性能测试,满足大批量生产测试的需求。展开更多
Multi-core digital signal processors （DSPs） are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing technologies, among others. In comparison with gene...Multi-core digital signal processors （DSPs） are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing technologies, among others. In comparison with general-purpose multi-processors, multi-core DSPs normally have a more complex memory hierarchy, such as on-chip core-local memory and non-cache-coherent shared memory. As a result, efficient multi-core DSP applications are very difficult to write. The current approach used to program multi-core DSPs is based on proprietary vendor software development kits （SDKs）, which only provide low-level, non-portable primitives. While it is acceptable to write coarse-grained task-level parallel code with these SDKs, writing fine-grained data parallel code with SDKs is a very tedious and error-prone approach. We believe that it is desirable to possess a high-level and portable parallel programming model for multi-core DSPs. In this paper, we propose OpenMDSP, an extension of OpenMP designed for multi-core DSPs. The goal of OpenMDSP is to fill the gap between the OpenMP memory model and the memory hierarchy of multi-core DSPs. We propose three classes of directives in OpenMDSP, including 1） data placement directives that allow programmers to control the placement of global variables conveniently, 2） distributed array directives that divide a whole array into sections and promote the sections into core-local memory to improve performance, and 3） stream access directives that promote big arrays into core-local memory section by section during parallel loop processing while hiding the latency of data movement by the direct memory access （DMA） of a DSP. We implement the compiler and runtime system for OpenMDSP on PreeScale MSC8156. The benchmarking results show that seven of nine benchmarks achieve a speedup of more than a factor of 5 when using six threads.展开更多
Real-time system timing analysis is crucial for estimating the worst-case execution time(WCET)of a program.To achieve this,static or dynamic analysis methods are used,along with targeted modeling of the actual hardwar...Real-time system timing analysis is crucial for estimating the worst-case execution time(WCET)of a program.To achieve this,static or dynamic analysis methods are used,along with targeted modeling of the actual hardware system.This literature review focuses on calculating WCET for multi-core processors,providing a survey of traditional methods used for static and dynamic analysis and highlighting the major challenges that arise from different program execution scenarios on multi-core platforms.This paper outlines the strengths and weaknesses of current methodologies and offers insights into prospective areas of research on multi-core analysis.By presenting a comprehensive analysis of the current state of research on multi-core processor analysis for WCET estimation,this review aims to serve as a valuable resource for researchers and practitioners in the field.展开更多
Multi-core architectures are widely used to in time-to-market and power consumption of the chips enhance the microprocessor performance within a limited increase Toward the application of high-density data signal pro...Multi-core architectures are widely used to in time-to-market and power consumption of the chips enhance the microprocessor performance within a limited increase Toward the application of high-density data signal processing, this paper presents a novel heterogeneous multi-core architecture digital signal processor （DSP）, YHFT-QDSP, with one RISC CPU core and 4 VLIW DSP cores. By three kinds of interconnection, YHFT-QDSP provides high efficiency message communication for inner-chip RISC core and DSP cores, inner-chip and inter-chip DSP cores. A parallel programming platform is specifically developed for the heterogeneous nmlti-core architecture of YHFT-QDSP. This parallel programming environment provides a parallel support library and a friendly interface between high level application softwares and multi- core DSP. The 130 nm CMOS custom chip design results benchmarks show that the interconnection structure of in a high speed and moderate power design. The results of typical YHFT-QDSP is much better than other related structures and achieves better speedup when using the interconnection facilities in combing methods. YHFT-QDSP has been signed off and manufactured presently. The future applications of the multi-core chip could be found in 3G wireless base station, high performance radar, industrial applications, and so on.展开更多
就电动机变频调速自动控制系统的设计与实现展开研究。首先,给出了电动机变频调速自动控制系统整体框架,并详细阐述了数字信号处理器(Digital Signal Processor,DSP)技术。在软件设计部分,针对DSP技术存在控制复杂度高的问题,引入比例-...就电动机变频调速自动控制系统的设计与实现展开研究。首先,给出了电动机变频调速自动控制系统整体框架,并详细阐述了数字信号处理器(Digital Signal Processor,DSP)技术。在软件设计部分,针对DSP技术存在控制复杂度高的问题,引入比例-积分-微分(Proportional-Integral-Derivative,PID)控制策略简化控制流程,并提出了基于模糊控制的电动机变频调速自动控制方法,以实现更精确的变频调速控制。系统应用测试结果表明,新系统控制误差低至1.2%,波动范围小且故障率低至0.01次/h,使得系统稳定性指数(System Stability Index,SSI)仅为0.95,说明本研究为电动机变频调速领域的自动化和智能化提供了有价值的参考。展开更多
针对视频信号处理需求,设计一种基于数字信号处理器(Digital Signal Processor,DSP)的高清远程视频通信监控系统。首先从系统架构、DSP选择与配置、视频信号采集与预处理等方面进行详细设计,其次介绍DSP的编程与实现及系统集成与调试过...针对视频信号处理需求,设计一种基于数字信号处理器(Digital Signal Processor,DSP)的高清远程视频通信监控系统。首先从系统架构、DSP选择与配置、视频信号采集与预处理等方面进行详细设计,其次介绍DSP的编程与实现及系统集成与调试过程,最后结合仿真与性能分析,验证了系统在实际应用中的可行性与优越性。展开更多
随着广播电视行业的快速发展,音频信号的质量成为提升视听体验的关键因素。传统音频处理方法已无法满足现代广播电视系统对音频清晰度、动态范围及噪声控制的高要求,数字信号处理(Digital Signal Processing,DSP)技术以其强大的计算能...随着广播电视行业的快速发展,音频信号的质量成为提升视听体验的关键因素。传统音频处理方法已无法满足现代广播电视系统对音频清晰度、动态范围及噪声控制的高要求,数字信号处理(Digital Signal Processing,DSP)技术以其强大的计算能力和灵活的处理方式成为解决此问题的有效手段。重点研究DSP技术在广播电视音频信号处理中的优化措施,探讨优化噪声抑制算法、动态范围压缩、增强音频均衡处理以及集成回声消除算法等技术的融合应用。这些技术的有效结合能够显著减少噪声对音频质量的干扰,精确检测音频信号的动态变化,确保音频信号的均衡,并有效消除音频信号中的回声。展开更多
文摘Naturally degradable capsule provides a platform for sustained fragrance release.However,practical challenges such as low encapsulation efficiency and difficulty in sustained release are still limited in using fragranceloaded capsules.In this work,the natural materials sodium alginate and gelatine are dissolved and act as the aqueous phase,lavender is dissolved in caprylic/capric triglyceride(GTCC)as the oil phase,and SiO_(2) nanoparticles with neutralwettability as a solid emulsifier to form O/W Pickering emulsions simultaneously.Finally,multi-core capsules are prepared using the drop injection method with emulsions as templates.The results show that the capsules have been successfully prepared with a spherical morphology and multi-core structure,and the encapsulation rate of multi-core capsules can reach up to 99.6%.In addition,the multi-core capsules possess desirable sustained release performance,the cumulative sustained release rate of fragrance at 25℃over 49 days is only 32.5%.It is attributed to the significant protection of multi-core structure,Pickering emulsion nanoparticle membranes,and hydrogel network shell for encapsulated fragrance.This study is designed to deliver a new strategy for using sustained-release technology with fragrance in food,cosmetics,textiles,and other fields.
基金supported by the National High Technology Research and Development 863 Program of China under Grant No.2012AA010901the National Natural Science Foundation of China under Grant No.61103021
文摘Multi-core digital signal processors （DSPs） are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing technologies, among others. In comparison with general-purpose multi-processors, multi-core DSPs normally have a more complex memory hierarchy, such as on-chip core-local memory and non-cache-coherent shared memory. As a result, efficient multi-core DSP applications are very difficult to write. The current approach used to program multi-core DSPs is based on proprietary vendor software development kits （SDKs）, which only provide low-level, non-portable primitives. While it is acceptable to write coarse-grained task-level parallel code with these SDKs, writing fine-grained data parallel code with SDKs is a very tedious and error-prone approach. We believe that it is desirable to possess a high-level and portable parallel programming model for multi-core DSPs. In this paper, we propose OpenMDSP, an extension of OpenMP designed for multi-core DSPs. The goal of OpenMDSP is to fill the gap between the OpenMP memory model and the memory hierarchy of multi-core DSPs. We propose three classes of directives in OpenMDSP, including 1） data placement directives that allow programmers to control the placement of global variables conveniently, 2） distributed array directives that divide a whole array into sections and promote the sections into core-local memory to improve performance, and 3） stream access directives that promote big arrays into core-local memory section by section during parallel loop processing while hiding the latency of data movement by the direct memory access （DMA） of a DSP. We implement the compiler and runtime system for OpenMDSP on PreeScale MSC8156. The benchmarking results show that seven of nine benchmarks achieve a speedup of more than a factor of 5 when using six threads.
基金supported by ZTE Industry-University-Institute Cooperation Funds under Grant No.2022ZTE09.
文摘Real-time system timing analysis is crucial for estimating the worst-case execution time(WCET)of a program.To achieve this,static or dynamic analysis methods are used,along with targeted modeling of the actual hardware system.This literature review focuses on calculating WCET for multi-core processors,providing a survey of traditional methods used for static and dynamic analysis and highlighting the major challenges that arise from different program execution scenarios on multi-core platforms.This paper outlines the strengths and weaknesses of current methodologies and offers insights into prospective areas of research on multi-core analysis.By presenting a comprehensive analysis of the current state of research on multi-core processor analysis for WCET estimation,this review aims to serve as a valuable resource for researchers and practitioners in the field.
基金supported by the National Science and Technology Major Project of the Ministry of Science and Technology of China under Grant No.2009ZX01034-001-001-006the National High Technology Research and Development 863 Program of China under Grant No.2007AA01Z108the Program for Changjiang Scholars and Innovative Research Team in Universities of China under Grant No.IRT0614.
文摘Multi-core architectures are widely used to in time-to-market and power consumption of the chips enhance the microprocessor performance within a limited increase Toward the application of high-density data signal processing, this paper presents a novel heterogeneous multi-core architecture digital signal processor （DSP）, YHFT-QDSP, with one RISC CPU core and 4 VLIW DSP cores. By three kinds of interconnection, YHFT-QDSP provides high efficiency message communication for inner-chip RISC core and DSP cores, inner-chip and inter-chip DSP cores. A parallel programming platform is specifically developed for the heterogeneous nmlti-core architecture of YHFT-QDSP. This parallel programming environment provides a parallel support library and a friendly interface between high level application softwares and multi- core DSP. The 130 nm CMOS custom chip design results benchmarks show that the interconnection structure of in a high speed and moderate power design. The results of typical YHFT-QDSP is much better than other related structures and achieves better speedup when using the interconnection facilities in combing methods. YHFT-QDSP has been signed off and manufactured presently. The future applications of the multi-core chip could be found in 3G wireless base station, high performance radar, industrial applications, and so on.
文摘就电动机变频调速自动控制系统的设计与实现展开研究。首先,给出了电动机变频调速自动控制系统整体框架,并详细阐述了数字信号处理器(Digital Signal Processor,DSP)技术。在软件设计部分,针对DSP技术存在控制复杂度高的问题,引入比例-积分-微分(Proportional-Integral-Derivative,PID)控制策略简化控制流程,并提出了基于模糊控制的电动机变频调速自动控制方法,以实现更精确的变频调速控制。系统应用测试结果表明,新系统控制误差低至1.2%,波动范围小且故障率低至0.01次/h,使得系统稳定性指数(System Stability Index,SSI)仅为0.95,说明本研究为电动机变频调速领域的自动化和智能化提供了有价值的参考。
文摘针对视频信号处理需求,设计一种基于数字信号处理器(Digital Signal Processor,DSP)的高清远程视频通信监控系统。首先从系统架构、DSP选择与配置、视频信号采集与预处理等方面进行详细设计,其次介绍DSP的编程与实现及系统集成与调试过程,最后结合仿真与性能分析,验证了系统在实际应用中的可行性与优越性。
文摘随着广播电视行业的快速发展,音频信号的质量成为提升视听体验的关键因素。传统音频处理方法已无法满足现代广播电视系统对音频清晰度、动态范围及噪声控制的高要求,数字信号处理(Digital Signal Processing,DSP)技术以其强大的计算能力和灵活的处理方式成为解决此问题的有效手段。重点研究DSP技术在广播电视音频信号处理中的优化措施,探讨优化噪声抑制算法、动态范围压缩、增强音频均衡处理以及集成回声消除算法等技术的融合应用。这些技术的有效结合能够显著减少噪声对音频质量的干扰,精确检测音频信号的动态变化,确保音频信号的均衡,并有效消除音频信号中的回声。
