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RL and AHP-Based Multi-Timescale Multi-Clock Source Time Synchronization for Distribution Power Internet of Things
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作者 Jiangang Lu Ruifeng Zhao +2 位作者 Zhiwen Yu Yue Dai Kaiwen Zeng 《Computers, Materials & Continua》 SCIE EI 2024年第3期4453-4469,共17页
Time synchronization(TS)is crucial for ensuring the secure and reliable functioning of the distribution power Internet of Things(IoT).Multi-clock source time synchronization(MTS)has significant advantages of high reli... Time synchronization(TS)is crucial for ensuring the secure and reliable functioning of the distribution power Internet of Things(IoT).Multi-clock source time synchronization(MTS)has significant advantages of high reliability and accuracy but still faces challenges such as optimization of the multi-clock source selection and the clock source weight calculation at different timescales,and the coupling of synchronization latency jitter and pulse phase difference.In this paper,the multi-timescale MTS model is conducted,and the reinforcement learning(RL)and analytic hierarchy process(AHP)-based multi-timescale MTS algorithm is designed to improve the weighted summation of synchronization latency jitter standard deviation and average pulse phase difference.Specifically,the multi-clock source selection is optimized based on Softmax in the large timescale,and the clock source weight calculation is optimized based on lower confidence bound-assisted AHP in the small timescale.Simulation shows that the proposed algorithm can effectively reduce time synchronization delay standard deviation and average pulse phase difference. 展开更多
关键词 multi-clock source time synchronization(TS) power Internet of Things reinforcement learning analytic hierarchy process
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Attack-detection and multi-clock source cooperation-based accurate time synchronization for PLC-AIoT in smart parks
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作者 Zhigang Du Sunxuan Zhang +2 位作者 Zijia Yao Zhenyu Zhou Muhammad Tariq 《Digital Communications and Networks》 CSCD 2024年第6期1732-1740,共9页
Power Line Communications-Artificial Intelligence of Things(PLC-AIo T)combines the low cost and high coverage of PLC with the learning ability of Artificial Intelligence(AI)to provide data collection and transmission ... Power Line Communications-Artificial Intelligence of Things(PLC-AIo T)combines the low cost and high coverage of PLC with the learning ability of Artificial Intelligence(AI)to provide data collection and transmission capabilities for PLC-AIo T devices in smart parks.With the development of smart parks,their emerging services require secure and accurate time synchronization of PLC-AIo T devices.However,the impact of attackers on the accuracy of time synchronization cannot be ignored.To solve the aforementioned problems,we propose a tampering attack-aware Deep Q-Network(DQN)-based time synchronization algorithm.First,we construct an abnormal clock source detection model.Then,the abnormal clock source is detected and excluded by comparing the time synchronization information between the device and the gateway.Finally,the proposed algorithm realizes the joint guarantee of high accuracy and low delay for PLC-AIo T in smart parks by intelligently selecting the multi-clock source cooperation strategy and timing weights.Simulation results show that the proposed algorithm has better time synchronization delay and accuracy performance. 展开更多
关键词 Smart park Power line communications Artificial intelligence of things Tampering attack awareness Abnormal clock source detection multi-clock source cooperation
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Formal verification of synchronous data-flow program transformations toward certified compilers 被引量:8
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作者 Van Chan NGO Jean-Pierre TALPIN +2 位作者 Thierry GAUTIER Paul Le GUERNIC Loic BESNARD 《Frontiers of Computer Science》 SCIE EI CSCD 2013年第5期598-616,共19页
Translation validation was invented in the 90's by Pnueli et al. as a technique to formally verify the correctness of code generators. Rather than certifying the code generator or exhaustively qualifying it, translat... Translation validation was invented in the 90's by Pnueli et al. as a technique to formally verify the correctness of code generators. Rather than certifying the code generator or exhaustively qualifying it, translation validators attempt to verify that program transformations preserve semantics. In this work, we adopt this approach to formally verify that the clock semantics and data dependence are preserved during the compilation of the Signal compiler. Translation valida- tion is implemented for every compilation phase from the initial phase until the latest phase where the executable code is generated, by proving the transformation in each phase of the compiler preserves the semantics. We represent the clock semantics, the data dependence of a program and its trans- formed counterpart as first-order formulas which are called clock models and synchronous dependence graphs (SDGs), respectively. We then introduce clock refinement and depen- dence refinement relations which express the preservations of clock semantics and dependence, as a relation on clock mod- els and SDGs, respectively. Our validator does not require any instrumentation or modification of the compiler, nor any rewriting of the source program. 展开更多
关键词 formal verification translation validation certi-fied compiler multi-clocked synchronous programs embed-ded systems.
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