The application-specific multiprocessor system-on-chip(MPSoC) architecture is becoming an attractive solution to deal with increasingly complex embedded applications,which require both high performance and flexible pr...The application-specific multiprocessor system-on-chip(MPSoC) architecture is becoming an attractive solution to deal with increasingly complex embedded applications,which require both high performance and flexible programmability. As an effective method for MPSoC development,we present a gradual refinement flow starting from a high-level Simulink model to a synthesizable and executable hardware and software specification. The proposed methodology consists of five different abstract levels:Simulink combined algorithm and architecture model(CAAM),virtual architecture(VA),transactional accurate architecture(TA),virtual prototype(VP) and field-programmable gate array(FPGA) emulation. Experimental results of Motion-JPEG and H.264 show that the proposed gradual refinement flow can generate various MPSoC architectures from an original Simulink model,allowing processor,communication and tasks design space exploration.展开更多
The authors will focus on the study of the design of Multiprocessor Systems on Chip （MPSoC）, specifically in the context of improving the performance of applications located on the MPSoC architecture. The objective ...The authors will focus on the study of the design of Multiprocessor Systems on Chip （MPSoC）, specifically in the context of improving the performance of applications located on the MPSoC architecture. The objective of this research is to study the problems of transition from a pure software implementation for an embodiment admitting one or more hardware components and to develop a methodology for automatic generation of migration of a software task into a hardware component in MPSoC. The transformation of a software task into a hardware task led to many changes, hardware part （connection, the requirement of an interrupt controller...）, software part （at least one task, I/O （I/O）, synchronization...） and an architectural point of view, the remarkable aspects of data storage. The experiment is done on the MJPEG decoder to illustrate the effectiveness of the authors＇ tool for automatic generation of migration.展开更多
文摘The application-specific multiprocessor system-on-chip(MPSoC) architecture is becoming an attractive solution to deal with increasingly complex embedded applications,which require both high performance and flexible programmability. As an effective method for MPSoC development,we present a gradual refinement flow starting from a high-level Simulink model to a synthesizable and executable hardware and software specification. The proposed methodology consists of five different abstract levels:Simulink combined algorithm and architecture model(CAAM),virtual architecture(VA),transactional accurate architecture(TA),virtual prototype(VP) and field-programmable gate array(FPGA) emulation. Experimental results of Motion-JPEG and H.264 show that the proposed gradual refinement flow can generate various MPSoC architectures from an original Simulink model,allowing processor,communication and tasks design space exploration.
文摘The authors will focus on the study of the design of Multiprocessor Systems on Chip （MPSoC）, specifically in the context of improving the performance of applications located on the MPSoC architecture. The objective of this research is to study the problems of transition from a pure software implementation for an embodiment admitting one or more hardware components and to develop a methodology for automatic generation of migration of a software task into a hardware component in MPSoC. The transformation of a software task into a hardware task led to many changes, hardware part （connection, the requirement of an interrupt controller...）, software part （at least one task, I/O （I/O）, synchronization...） and an architectural point of view, the remarkable aspects of data storage. The experiment is done on the MJPEG decoder to illustrate the effectiveness of the authors＇ tool for automatic generation of migration.
