Circuit design of 32 bit logarithmic skip adder (LSA) is introduced to implement high performance,low power addition.ELM carry lookahead adder is included into groups of carry skip adder and the hybrid structure cost...Circuit design of 32 bit logarithmic skip adder (LSA) is introduced to implement high performance,low power addition.ELM carry lookahead adder is included into groups of carry skip adder and the hybrid structure costs 30% less hardware than ELM.At circuit level,a carry incorporating structure to include the primary carry input in carry chain and an 'and xor' structure to implement final sum logic in 32 bit LSA are designed for better optimization.For 5V,1μm process,32 bit LSA has a critical delay of 5 9ns and costs an area of 0 62mm 2,power consumption of 23mW at 100MHz.For 2 5V,0 25μm process,critical delay of 0 8ns,power dissipation of 5 2mW at 100MHz is simulated.展开更多
文摘Circuit design of 32 bit logarithmic skip adder (LSA) is introduced to implement high performance,low power addition.ELM carry lookahead adder is included into groups of carry skip adder and the hybrid structure costs 30% less hardware than ELM.At circuit level,a carry incorporating structure to include the primary carry input in carry chain and an 'and xor' structure to implement final sum logic in 32 bit LSA are designed for better optimization.For 5V,1μm process,32 bit LSA has a critical delay of 5 9ns and costs an area of 0 62mm 2,power consumption of 23mW at 100MHz.For 2 5V,0 25μm process,critical delay of 0 8ns,power dissipation of 5 2mW at 100MHz is simulated.
