Piezoelectric energy harvesting is considered as an ideal power resource for low-power consumption gadgets in vibrational environments.The energy extraction efficiency depends highly on the interface circuit,and shoul...Piezoelectric energy harvesting is considered as an ideal power resource for low-power consumption gadgets in vibrational environments.The energy extraction efficiency depends highly on the interface circuit,and should be highly improved to meet the power requirements.The nonlinear interface circuits in discrete components have been extensively explored and developed with the advantages of easy implementation,stable operation,high efficiency,and low cost.This paper reviews the state-of-the-art progress of nonlinear piezoelectric energy harvesting interface circuits in discrete components.First,the working principles and the advantages/disadvantages of four classical interface circuits are described.Then,the improved circuits based on the four typical circuits and other types of circuits are introduced in detail,and the advantages/disadvantages,output power,efficiency,energy consumption,and practicability of these circuits are analyzed.Finally,the future development trends of nonlinear piezoelectric energy harvesting circuits,e.g.,self-powered extraction,low-power consumption,and broadband characteristic,are predicted.展开更多
One of today's challenges is the integration of ISFETs in chemical and biochemical Microsystems.This article presents a full integration of ISFET chip containing the ISFET/REFET(reference FET) pair,ISFET/REFET amp...One of today's challenges is the integration of ISFETs in chemical and biochemical Microsystems.This article presents a full integration of ISFET chip containing the ISFET/REFET(reference FET) pair,ISFET/REFET amplifiers,bias current generator,as well as a reference electrode structure,all integrated on the same chip based on CMOS technology.The sensor chip was fabricated in a standard 0.35μm CMOS process(Chartered Semiconductor,Singapore).The extra post processing steps have been developed and added for depositing membranes.Finally,the pH response of the integrated sensor was measured with the interface circuit.展开更多
In this paper, two new electronically tunable filter configurations are proposed. The proposed filters operate current-mode (CM), voltage-mode (VM), transimpedance-mode (TIM) and transadmittance-mode (TAM). The first ...In this paper, two new electronically tunable filter configurations are proposed. The proposed filters operate current-mode (CM), voltage-mode (VM), transimpedance-mode (TIM) and transadmittance-mode (TAM). The first configuration realizes second-order VM band-pass and TAM high-pass filter characteristics from the same configuration. The second one realizes second-order TIM band-pass and CM low-pass filter characteristics from the same configuration. They also use minimum number of electronic components (two capacitors and one active component namely;current controlled current difference transconductance amplifier). The workability of the proposed structures has been demonstrated by simulation results.展开更多
The paper presents the design and implementation of LVDS （low-voltage differential signaling） receiver circuit, fully compatible with LVDS standard. The proposed circuit is composed of the telescopic amplifier and t...The paper presents the design and implementation of LVDS （low-voltage differential signaling） receiver circuit, fully compatible with LVDS standard. The proposed circuit is composed of the telescopic amplifier and the comparator with internal hysteresis. The receiver supports 3.5 Gbps data rate with 7.4 mA current at 1.8 V supply according to post-layout circuit simulations. The circuit has the power consumption of 13.1 MW. Comparing with the conventional circuit, the circuit is achieved to reduce the power consumption by 19.1% and the data rate by 14.3 %. The validity and effectiveness of the proposed circuit are verified through the circuit simulation with Samsung 0.18 μm CMOS （complementary metal-oxide-semiconductor） standard technology under the 1.8 V supply voltage.展开更多
Cold-junction compensation(CJC)and disconnection detection circuit design of various thermocouples(TC)and multi-channel TC interface circuits were designed.The CJC and disconnection detection circuit consists of a CJC...Cold-junction compensation(CJC)and disconnection detection circuit design of various thermocouples(TC)and multi-channel TC interface circuits were designed.The CJC and disconnection detection circuit consists of a CJC semiconductor device,an instrumentation amplifier(IA),two resistors,and a diode for disconnection detection.Based on the basic circuit,a multi-channel interface circuit was also implemented.The CJC was implemented using compensation semiconductor and IA,and disconnection detection was detected by using two resistors and a diode so that IA input voltage became-0.42 V.As a result of the experiment using R-type TC,the error of the designed circuit was reduced from 0.14 mV to 3μV after CJC in the temperature range of 0°C to 1400°C.In addition,it was confirmed that the output voltage of IA was saturated from 88 mV to-14.2 V when TC was disconnected from normal.The output voltage of the designed circuit was 0 V to 10 V in the temperature range of 0°C to 1400°C.The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel.The implemented multi-channel interface has a feature that can be applied equally to E,J,K,T,R,and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.展开更多
The analyses of MEMS gyroscope interface circuit on thermal noise, 1/f noise and phase noise are made in this paper. A closed-loop differential driving circuit and a low-noise differential detecting circuit based on t...The analyses of MEMS gyroscope interface circuit on thermal noise, 1/f noise and phase noise are made in this paper. A closed-loop differential driving circuit and a low-noise differential detecting circuit based on the high frequency modulation are designed to limit the noise. The interface chip is implemented in a standard0.5 μm CMOS process. The test results show that the resolution of sensitive capacity can reach to 6.47×10^（-20） F at the bandwidth of 60 Hz. The measuring range is ± 200°/s and the nonlinearity is 310 ppm. The output noise density is 5.8°/（h·（Hz）^（1/2））. The angular random walk（allen-variance） is 0.092°/h^（1/2） and the bias instability is 2.63°/h.展开更多
This paper reports a low noise switched-capacitor CMOS interface circuit for the closed-loop operation of a capacitive accelerometer.The time division multiplexing of the same electrode is adopted to avoid the strong ...This paper reports a low noise switched-capacitor CMOS interface circuit for the closed-loop operation of a capacitive accelerometer.The time division multiplexing of the same electrode is adopted to avoid the strong feedthrough between capacitance sensing and electrostatic force feedback.A PID controller is designed to ensure the stability and dynamic response of a high Q closed-loop accelerometer with a vacuum package.The architecture only requires single ended operational amplifiers,transmission gates and capacitors.Test results show that a full scale acceleration of±3 g,non-linearity of 0.05%and signal bandwidth of 1000 Hz are achieved.The complete module operates from a±5 V supply and has a measured sensitivity of 1.2 V/g with a noise of floor of 0.8μg/（Hz）;in closed-loop.The chip is fabricated in the 2μm two-metal and two-poly n-well CMOS process with an area of 15.2 mm;.These results prove that this circuit is suitable for high performance micro-accelerometer applications like seismic detection and oil exploration.展开更多
A novel phase-locked loop( PLL)-based closed-loop driving circuit with ultra-low-noise trans-impedance amplifier( TIA) is proposed. The TIA is optimized to achieve ultra-low input-referred current noise. To track driv...A novel phase-locked loop( PLL)-based closed-loop driving circuit with ultra-low-noise trans-impedance amplifier( TIA) is proposed. The TIA is optimized to achieve ultra-low input-referred current noise. To track drive-mode resonant frequency and reduce frequency jitter of actuation voltage,a PLL-based driving technique is adopted. Implemented on printed circuit board( PCB),the proposed driving loop has successfully excited MEMS element into resonance,with a settling time of 3 s. The stable frequency and amplitude of TIA output voltage are 10.14 KHz and 800 mVPP,respectively. With sense-channel electronics,the gyroscope exhibits a scale factor of 0.04 mV/°/s and a bias instability of 57.6°/h,which demonstrates the feasibility of the proposed driving circuit.展开更多
The superconducting rapid single flux quantum(RSFQ)integrated circuit is a promising solu-tion for overcoming speed and power bottlenecks in high-performance computing systems in the post-Moore era.This paper presents...The superconducting rapid single flux quantum(RSFQ)integrated circuit is a promising solu-tion for overcoming speed and power bottlenecks in high-performance computing systems in the post-Moore era.This paper presents an architecture designed to improve the speed and power limitations of high-performance computing systems using superconducting technology.Since superconducting microprocessors,which operate at cryogenic temperatures,require support from semiconductor cir-cuits,the proposed design utilizes the von Neumann architecture with a superconducting RSFQ mi-croprocessor,cryogenic semiconductor memory,a room temperature field programmable gate array(FPGA)controller,and a host computer for input/output.Additionally,the paper introduces two key circuit designs:a start/stop controllable superconducting clock generator and an asynchronous communication interface between the RSFQ and semiconductor chips used to implement the control system.Experimental results demonstrate that the proposed design is feasible and effective,provi-ding valuable insights for future superconducting computer systems.展开更多
In integrated circuit packaging,thermal interface materials(TIMs)must exhibit high thermal conductivity and electrical resistivity to prevent short circuits,enhance reliability,and ensure safety in high-voltage applic...In integrated circuit packaging,thermal interface materials(TIMs)must exhibit high thermal conductivity and electrical resistivity to prevent short circuits,enhance reliability,and ensure safety in high-voltage applications.We proposed the thermal-percolation electrical-resistive TIM incorporating binary fillers of both insulating and metallic nanowires with an orientation in the insulating polymer matrix.High thermal conductivity can be achieved through thermal percolation,while electrical non-conductivity is preserved by carefully controlling the electrical percolation threshold through metallic nanowire orientation.The electrical conductivity of the composite can be further regulated by adjusting the orientation and aspect ratio of the metallic fillers.A thermal conductivity of 10 W·m^(-1)·K^(-1)is achieved,with electrical non-conductive behavior preserved.This approach offers a pathway to realizing“thermal-percolation electrical-resistive”in hybrid TIMs,providing a strategic framework for designing high-performance TIMs.展开更多
We present a system-level model with an on-chip temperature compensation technique for a CMOS-MEMS monolithic calorimetric flow sensing SoC.The model encompasses mechanical,thermal,and electrical domains to facilitate...We present a system-level model with an on-chip temperature compensation technique for a CMOS-MEMS monolithic calorimetric flow sensing SoC.The model encompasses mechanical,thermal,and electrical domains to facilitate the co-design of a MEMS sensor and CMOS interface circuits on the EDA platform.The compensation strategy is implemented on-chip with a variable temperature difference heating circuit.Results show that the linear programming for the low-temperature drift in the SoC output is characterized by a compensation resistor Rc with a resistance value of 748.21Ωand a temperature coefficient of resistance of 3.037×10−3℃^(−1) at 25℃.Experimental validation demonstrates that within an ambient temperature range of 0–50℃ and a flow range of 0-10 m/s,the temperature drift of the sensor is reduced to±1.6%,as compared to±8.9%observed in a counterpart with the constant temperature difference circuit.Therefore,this on-chip temperature-compensated CMOS-MEMS flow sensing SoC is promising for low-cost sensing applications such as respiratory monitoring and smart energy-efficient buildings.展开更多
This paper presents a continuous-time analog interface ASIC for use in MEMS gyroscopes. A charge sensitive amplifier with a chopper stabilization method is adopted to suppress the low-frequency noise. In order to canc...This paper presents a continuous-time analog interface ASIC for use in MEMS gyroscopes. A charge sensitive amplifier with a chopper stabilization method is adopted to suppress the low-frequency noise. In order to cancel the effect caused by the gyroscope capacitive mismatch, a mismatch auto-compensation circuit is imple- mented. The gain and phase shift of the drive closed loop is controlled separately by an auto gain controller and an adjustable phase shifter. The chip is fabricated in a 0.35 μm CMOS process. The test of the chip is performed with a vibratory gyroscope, and the measurement shows that the noise floor is 0.003°/s√Hz, and the measured drift stability is 43°/h. Within -300 to 300°/s of rotation rate input range, the non-linearity is less than 0.1%.展开更多
基金the National Natural Science Foundation of China(Nos.51805298 and 12072267)the Natural Science Foundation of Shandong Province of China(No.ZR2019PEE015)+3 种基金the Fundamental Research Funds for the Central Universities of China(No.2019ZRJC006)the 111 Project of China(No.BP0719007)the Innovation Capability Support Plan of Shaanxi Province of China(No.2020KJXX-021)the Young Scholars Program of Shandong University,Weihai of China(No.20820201004)。
文摘Piezoelectric energy harvesting is considered as an ideal power resource for low-power consumption gadgets in vibrational environments.The energy extraction efficiency depends highly on the interface circuit,and should be highly improved to meet the power requirements.The nonlinear interface circuits in discrete components have been extensively explored and developed with the advantages of easy implementation,stable operation,high efficiency,and low cost.This paper reviews the state-of-the-art progress of nonlinear piezoelectric energy harvesting interface circuits in discrete components.First,the working principles and the advantages/disadvantages of four classical interface circuits are described.Then,the improved circuits based on the four typical circuits and other types of circuits are introduced in detail,and the advantages/disadvantages,output power,efficiency,energy consumption,and practicability of these circuits are analyzed.Finally,the future development trends of nonlinear piezoelectric energy harvesting circuits,e.g.,self-powered extraction,low-power consumption,and broadband characteristic,are predicted.
基金supported by National Natural Science Foundation of China(No.90307014)
文摘One of today's challenges is the integration of ISFETs in chemical and biochemical Microsystems.This article presents a full integration of ISFET chip containing the ISFET/REFET(reference FET) pair,ISFET/REFET amplifiers,bias current generator,as well as a reference electrode structure,all integrated on the same chip based on CMOS technology.The sensor chip was fabricated in a standard 0.35μm CMOS process(Chartered Semiconductor,Singapore).The extra post processing steps have been developed and added for depositing membranes.Finally,the pH response of the integrated sensor was measured with the interface circuit.
文摘In this paper, two new electronically tunable filter configurations are proposed. The proposed filters operate current-mode (CM), voltage-mode (VM), transimpedance-mode (TIM) and transadmittance-mode (TAM). The first configuration realizes second-order VM band-pass and TAM high-pass filter characteristics from the same configuration. The second one realizes second-order TIM band-pass and CM low-pass filter characteristics from the same configuration. They also use minimum number of electronic components (two capacitors and one active component namely;current controlled current difference transconductance amplifier). The workability of the proposed structures has been demonstrated by simulation results.
文摘The paper presents the design and implementation of LVDS （low-voltage differential signaling） receiver circuit, fully compatible with LVDS standard. The proposed circuit is composed of the telescopic amplifier and the comparator with internal hysteresis. The receiver supports 3.5 Gbps data rate with 7.4 mA current at 1.8 V supply according to post-layout circuit simulations. The circuit has the power consumption of 13.1 MW. Comparing with the conventional circuit, the circuit is achieved to reduce the power consumption by 19.1% and the data rate by 14.3 %. The validity and effectiveness of the proposed circuit are verified through the circuit simulation with Samsung 0.18 μm CMOS （complementary metal-oxide-semiconductor） standard technology under the 1.8 V supply voltage.
文摘Cold-junction compensation(CJC)and disconnection detection circuit design of various thermocouples(TC)and multi-channel TC interface circuits were designed.The CJC and disconnection detection circuit consists of a CJC semiconductor device,an instrumentation amplifier(IA),two resistors,and a diode for disconnection detection.Based on the basic circuit,a multi-channel interface circuit was also implemented.The CJC was implemented using compensation semiconductor and IA,and disconnection detection was detected by using two resistors and a diode so that IA input voltage became-0.42 V.As a result of the experiment using R-type TC,the error of the designed circuit was reduced from 0.14 mV to 3μV after CJC in the temperature range of 0°C to 1400°C.In addition,it was confirmed that the output voltage of IA was saturated from 88 mV to-14.2 V when TC was disconnected from normal.The output voltage of the designed circuit was 0 V to 10 V in the temperature range of 0°C to 1400°C.The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel.The implemented multi-channel interface has a feature that can be applied equally to E,J,K,T,R,and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.
基金supported by the National Natural Science Foundation of China(No.61204121)the National Hi-Tech Research and Development Program of China(No.2013AA041107)the Fundamental Research Funds for the Central Universities(No.HIT.NSRIF.2013040)
文摘The analyses of MEMS gyroscope interface circuit on thermal noise, 1/f noise and phase noise are made in this paper. A closed-loop differential driving circuit and a low-noise differential detecting circuit based on the high frequency modulation are designed to limit the noise. The interface chip is implemented in a standard0.5 μm CMOS process. The test results show that the resolution of sensitive capacity can reach to 6.47×10^（-20） F at the bandwidth of 60 Hz. The measuring range is ± 200°/s and the nonlinearity is 310 ppm. The output noise density is 5.8°/（h·（Hz）^（1/2））. The angular random walk（allen-variance） is 0.092°/h^（1/2） and the bias instability is 2.63°/h.
基金Project supported by the National High Technology Research and Development Program of China(No2008AA042201)
文摘This paper reports a low noise switched-capacitor CMOS interface circuit for the closed-loop operation of a capacitive accelerometer.The time division multiplexing of the same electrode is adopted to avoid the strong feedthrough between capacitance sensing and electrostatic force feedback.A PID controller is designed to ensure the stability and dynamic response of a high Q closed-loop accelerometer with a vacuum package.The architecture only requires single ended operational amplifiers,transmission gates and capacitors.Test results show that a full scale acceleration of±3 g,non-linearity of 0.05%and signal bandwidth of 1000 Hz are achieved.The complete module operates from a±5 V supply and has a measured sensitivity of 1.2 V/g with a noise of floor of 0.8μg/（Hz）;in closed-loop.The chip is fabricated in the 2μm two-metal and two-poly n-well CMOS process with an area of 15.2 mm;.These results prove that this circuit is suitable for high performance micro-accelerometer applications like seismic detection and oil exploration.
基金supported by the National Natural Science Foundation of China (grant: 61234007)the subproject of the Very Large Scale Integrated Circuits Manufacturing Equipment and Complete Technology (No.2 National Major Projects of China) (No.: 2013ZX02502-001)
文摘A novel phase-locked loop( PLL)-based closed-loop driving circuit with ultra-low-noise trans-impedance amplifier( TIA) is proposed. The TIA is optimized to achieve ultra-low input-referred current noise. To track drive-mode resonant frequency and reduce frequency jitter of actuation voltage,a PLL-based driving technique is adopted. Implemented on printed circuit board( PCB),the proposed driving loop has successfully excited MEMS element into resonance,with a settling time of 3 s. The stable frequency and amplitude of TIA output voltage are 10.14 KHz and 800 mVPP,respectively. With sense-channel electronics,the gyroscope exhibits a scale factor of 0.04 mV/°/s and a bias instability of 57.6°/h,which demonstrates the feasibility of the proposed driving circuit.
基金the Strategic Priority Research Program of Chinese Academy of Sciences(No.XDA18000000)the National Natural Science Foundation of China(No.61732018,61872335).
文摘The superconducting rapid single flux quantum(RSFQ)integrated circuit is a promising solu-tion for overcoming speed and power bottlenecks in high-performance computing systems in the post-Moore era.This paper presents an architecture designed to improve the speed and power limitations of high-performance computing systems using superconducting technology.Since superconducting microprocessors,which operate at cryogenic temperatures,require support from semiconductor cir-cuits,the proposed design utilizes the von Neumann architecture with a superconducting RSFQ mi-croprocessor,cryogenic semiconductor memory,a room temperature field programmable gate array(FPGA)controller,and a host computer for input/output.Additionally,the paper introduces two key circuit designs:a start/stop controllable superconducting clock generator and an asynchronous communication interface between the RSFQ and semiconductor chips used to implement the control system.Experimental results demonstrate that the proposed design is feasible and effective,provi-ding valuable insights for future superconducting computer systems.
基金supported by the National Key R&D Program(Grant No.2022YFA1203-100)sponsorship by Shanghai Sailing Program(Grant No.24YF2713800)+2 种基金financial support from the Local College Capacity Building Project of Shanghai Municipal Science and Technology Commission(Grant No.20010500700)the Natural Science Foundation of Shanghai(Grant No.23ZR1424300)Shanghai Shuguang Program(Grant No.22SG56)。
文摘In integrated circuit packaging,thermal interface materials(TIMs)must exhibit high thermal conductivity and electrical resistivity to prevent short circuits,enhance reliability,and ensure safety in high-voltage applications.We proposed the thermal-percolation electrical-resistive TIM incorporating binary fillers of both insulating and metallic nanowires with an orientation in the insulating polymer matrix.High thermal conductivity can be achieved through thermal percolation,while electrical non-conductivity is preserved by carefully controlling the electrical percolation threshold through metallic nanowire orientation.The electrical conductivity of the composite can be further regulated by adjusting the orientation and aspect ratio of the metallic fillers.A thermal conductivity of 10 W·m^(-1)·K^(-1)is achieved,with electrical non-conductive behavior preserved.This approach offers a pathway to realizing“thermal-percolation electrical-resistive”in hybrid TIMs,providing a strategic framework for designing high-performance TIMs.
基金supported by the National Natural Science Foundation of China(62474115,52105582)Natural Science Foundation of Guangdong Province(2024A1515030026,2022A1515010894)+1 种基金Fundamental Research Foundation of Shenzhen(JCYJ20210324095210030,JCYJ20220818095810023,ZDSYS20220527171402005)the State Key Laboratory of Radio Frequency Heterogeneous Integration(Independent Scientific Research Program No.2024013)for Linze Hong,Ke Xiao,Xiangyu Song,and Wei Xu.
文摘We present a system-level model with an on-chip temperature compensation technique for a CMOS-MEMS monolithic calorimetric flow sensing SoC.The model encompasses mechanical,thermal,and electrical domains to facilitate the co-design of a MEMS sensor and CMOS interface circuits on the EDA platform.The compensation strategy is implemented on-chip with a variable temperature difference heating circuit.Results show that the linear programming for the low-temperature drift in the SoC output is characterized by a compensation resistor Rc with a resistance value of 748.21Ωand a temperature coefficient of resistance of 3.037×10−3℃^(−1) at 25℃.Experimental validation demonstrates that within an ambient temperature range of 0–50℃ and a flow range of 0-10 m/s,the temperature drift of the sensor is reduced to±1.6%,as compared to±8.9%observed in a counterpart with the constant temperature difference circuit.Therefore,this on-chip temperature-compensated CMOS-MEMS flow sensing SoC is promising for low-cost sensing applications such as respiratory monitoring and smart energy-efficient buildings.
基金Project supported by the Special Fund for Agro-Scientific Research in the Public Interest(No.200903021)
文摘This paper presents a continuous-time analog interface ASIC for use in MEMS gyroscopes. A charge sensitive amplifier with a chopper stabilization method is adopted to suppress the low-frequency noise. In order to cancel the effect caused by the gyroscope capacitive mismatch, a mismatch auto-compensation circuit is imple- mented. The gain and phase shift of the drive closed loop is controlled separately by an auto gain controller and an adjustable phase shifter. The chip is fabricated in a 0.35 μm CMOS process. The test of the chip is performed with a vibratory gyroscope, and the measurement shows that the noise floor is 0.003°/s√Hz, and the measured drift stability is 43°/h. Within -300 to 300°/s of rotation rate input range, the non-linearity is less than 0.1%.
