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Pixelated non-volatile programmable photonic integrated circuits with 20-level intermediate states 被引量:1
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作者 Wenyu Chen Shiyuan Liu Jinlong Zhu 《International Journal of Extreme Manufacturing》 SCIE EI CAS CSCD 2024年第3期477-487,共11页
Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this ... Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this paper,we propose pixelated programmable Si_(3)N_(4)PICs with record-high 20-level intermediate states at 785 nm wavelength.Such flexibility in phase or amplitude modulation is achieved by a programmable Sb_(2)S_(3)matrix,the footprint of whose elements can be as small as 1.2μm,limited only by the optical diffraction limit of anin-house developed pulsed laser writing system.We believe our work lays the foundation for laser-writing ultra-high-level(20 levels and even more)programmable photonic systems and metasurfaces based on phase change materials,which could catalyze diverse applications such as programmable neuromorphic photonics,biosensing,optical computing,photonic quantum computing,and reconfigurable metasurfaces. 展开更多
关键词 programmable photonic integrated circuits phase change materials multi-level intermediate states metasurfaces
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Design of Gas Sensors Circuits with in-System Programmable Ddevices
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作者 Duren Liu Jin Liu Zhichun Ren 《稀有金属材料与工程》 SCIE EI CAS CSCD 北大核心 2006年第A03期146-147,共2页
In-system programmable devices are products that combined modern electronic techniques and semiconductor techniques.They are indispensable devices in designing modern circuits and systems.This paper presents two pract... In-system programmable devices are products that combined modern electronic techniques and semiconductor techniques.They are indispensable devices in designing modern circuits and systems.This paper presents two practical circuits designed with programmable devices and its design method.By introducing programmable devices into gas sensor circuits,we can further improve system reliability,stability,sensitivity and integration degree,and enhance flexibility of system design. 展开更多
关键词 in-system programmable device gas sensor music warning circuit gas sensor measurement circuit
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MIXED-GRAINED CMOS FIELD PROGRAMMABLE ANALOG ARRAY FOR SMART SENSORY APPLICATIONS
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作者 Cheng Xiaoyan Yang Haigang +3 位作者 Yin Tao Wu Qisong Zhi Tian Liu Fei 《Journal of Electronics(China)》 2014年第2期129-142,共14页
The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays(FPAAs),which are the analogue counterparts of Field Programmable Gate Arr... The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays(FPAAs),which are the analogue counterparts of Field Programmable Gate Arrays(FPGAs).In this paper,we present a new design methodology which using FPAA as a powerful analog front-end processing platform in the smart sensory microsystem.The proposed FPAA contains 16 homogeneous mixed-grained Configurable Analog Blocks(CABs) which house a variety of processing elements especially the proposed fine-grained Core Configurable Amplifiers(CCAs).The high flexible CABs allow the FPAA operating in both continuous-time and discrete-time approaches suitable to support variety of sensors.To reduce the nonideal parasitic effects and save area,the fat-tree interconnection network is adopted in this FPAA.The functionality of this FPAA is demonstrated through embedding of voltage and capacitive sensor signal readout circuits and a configurable band pass filter.The minimal detectable voltage and capacitor achieves 38 uV and 8.3 aF respectively within 100 Hz sensor bandwidth.The power consumption comparison of CCA in three applications shows that the FPAA has high power efficiency.And the simulation results also show that the FPAA has good tolerance with wide PVT variations. 展开更多
关键词 Field programmable Gate Array(FPGA) Field programmable analog Array(FPAA) Sensor Mixed-grained Configurable analog Block(CAB) Correlated Double Sampling(CDS)
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Design of PLC control system of RTG spreader in Qingdao Port Container Terminal
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作者 王毅 朱德平 于晓良 《Journal of Measurement Science and Instrumentation》 CAS 2014年第1期61-65,共5页
The control method of rubber tyre gantry (RTG) spreader in Qingdao Port Container Terminal is logic board control,which has many shortcomings such as expensive spare parts and high faults.This paper designs a new co... The control method of rubber tyre gantry (RTG) spreader in Qingdao Port Container Terminal is logic board control,which has many shortcomings such as expensive spare parts and high faults.This paper designs a new control system using programmable logic controller (PLC) centralized control to replace the original logic board control.The new system mainly contains complete ELME spreader control scheme design,hardware selection and PLC control program development.Its field application shows that the system has characteristics of high efficiency,low running cost,easy maintenance. 展开更多
关键词 rubber tyre gantry (RTG) SPREADER circuit board programmable logic controller (PLC)
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Scalable and rapid programmable photonic integrated circuits empowered by Ising-model intelligent computation
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作者 MENGHAN YANG TIEJUN WANG +9 位作者 YUXIN LIANG YE JIN WEI ZHANG XIANGYAN MENG ANG LI GUOJIE ZHANG WEI LI NUANNUAN SHI NINGHUA ZHU MING LI 《Photonics Research》 2025年第7期1832-1847,共16页
Programmable photonic integrated circuits(PICs)have emerged as a promising platform for analog signal processing.Programmable PICs,as versatile photonic integrated platforms,can realize a wide range of functionalities... Programmable photonic integrated circuits(PICs)have emerged as a promising platform for analog signal processing.Programmable PICs,as versatile photonic integrated platforms,can realize a wide range of functionalities through software control.However,a significant challenge lies in the efficient management of a large number of programmable units,which is essential for the realization of complex photonic applications.In this paper,we propose an innovative approach using Ising-model-based intelligent computing to enable dynamic reconfiguration of large-scale programmable PICs.In the theoretical framework,we model the Mach–Zehnder interferometer(MZI)fundamental units within programmable PICs as spin qubits with binary decision variables,forming the basis for the Ising model.The function of programmable PIC implementation can be reformulated as a path-planning problem,which is then addressed using the Ising model.The states of MZI units are accordingly determined as the Ising model evolves toward the lowest Ising energy.This method facilitates the simultaneous configuration of a vast number of MZI unit states,unlocking the full potential of programmable PICs for high-speed,large-scale analog signal processing.To demonstrate the efficacy of our approach,we present two distinct photonic systems:a 4×4 wavelength routing system for balanced transmission of four-channel NRZ/PAM-4 signals and an optical neural network that achieves a recognition accuracy of 96.2%.Additionally,our system demonstrates a reconfiguration speed of 30 ms and scalability to a 56×56 port network with 2000 MZI units.This work provides a groundbreaking theoretical framework and paves the way for scalable,high-speed analog signal processing in large-scale programmable PICs. 展开更多
关键词 photonic integrated platformscan Mach Zehnder interferometer ising model intelligent computation analog signal processingprogrammable analog signal processing programmable photonic integrated circuits pics scalable photonic integrated circuits dynamic reconfiguration
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Design of ispPAC-based Humidity Sensor Signal Processing Circuits
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作者 Duren Liu Jin Liu Zhichun Ren 《稀有金属材料与工程》 SCIE EI CAS CSCD 北大核心 2006年第A03期363-365,共3页
The widely used sensitive elements of humidity sensors can be divided into 3 types,i.e.,resistor,capacitor,and electrolyte.Humidity sensors consisting of these sensitive elements have corresponding signal processing c... The widely used sensitive elements of humidity sensors can be divided into 3 types,i.e.,resistor,capacitor,and electrolyte.Humidity sensors consisting of these sensitive elements have corresponding signal processing circuit unique to each type of sensitive elements.This paper presents an ispPAC (in-system programmable Programmable Analog Circuit) -based humidity sensor signal processing circuit designed with software method and implemented with in-system programmable simulators.Practical operation shows that humidity sensor signal processing circuits of this kind,exhibit stable and reliable performance. 展开更多
关键词 programmable analog circuit humidity sensors signal processing circuit
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High-Bandwidth,Low-Power CMOS Transistor Based CAB for Field Programmable Analog Array
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作者 Ameen Bin Obadi Alaa El-Din Hussein +6 位作者 Samir Salem Al-Bawri Kabir Hossain Abdullah Abdulhameed Muzammil Jusoh Thennarasan Sabapathy Ahmed Jamal Abdullah Al-Gburi Mahmoud A.Albreem 《Computers, Materials & Continua》 SCIE EI 2023年第3期5885-5900,共16页
This article presents an integrated current mode configurable analog block(CAB)system for field-programmable analog array(FPAA).The proposed architecture is based on the complementary metal-oxide semiconductor(CMOS)tr... This article presents an integrated current mode configurable analog block(CAB)system for field-programmable analog array(FPAA).The proposed architecture is based on the complementary metal-oxide semiconductor(CMOS)transistor level design where MOSFET transistors operating in the saturation region are adopted.The proposed CAB architecture is designed to implement six of thewidely used current mode operations in analog processing systems:addition,subtraction,integration,multiplication,division,and pass operation.The functionality of the proposed CAB is demonstrated through these six operations,where each operation is chosen based on the user’s selection in the CAB interface system.The architecture of the CAB system proposes an optimized way of designing and integrating only three functional cells with the interface circuitry to achieve the six operations.Furthermore,optimized programming and digital tuning circuitry are implemented in the architecture to control and interface with the functional cells.Moreover,these designed programming and tuning circuitries play an essential role in optimizing the performance of the proposed design.Simulation of the proposed CMOS Transistor Based CAB system is carried out using Tanner EDA Tools in 0.35μm standard CMOS technology.The design uses a±1.5 V power supply and results in maximum 3 dB bandwidth of 34.9 MHz and an approximate size of 0.0537 mm2.This demonstrates the advantages of the design over the current state-of-the-art designs presented for comparison in this article.Consequently,the proposed design has a clear aspect of simplicity,low power consumption,and high bandwidth operation,which makes it a suitable candidate for mobile telecommunications applications. 展开更多
关键词 CMOS field programmable analog array configurable analog block current mode circuit
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A NEW APPROACH TO PROGRAMMABLE LOGIC ARRAY FOR SINGLE-CLOCK CMOS
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作者 Yin Yongsheng Liu Cong Gao Minglun 《Journal of Electronics(China)》 2006年第1期157-160,共4页
Programmable Logic Array (PLA) is an important building circuit of VLSI chips and some of the FPGA architectures have evolved from the basic PLA architectures. In this letter, a dynamic and static mixed PLA with singl... Programmable Logic Array (PLA) is an important building circuit of VLSI chips and some of the FPGA architectures have evolved from the basic PLA architectures. In this letter, a dynamic and static mixed PLA with single-phased clock is presented. Combining both dynamic and static design style rather than introducing additional interface-buffers overcomes the racing problem, thereby saves the chip area. Besides inheriting the advantages of dynamic circuit-low power dissipation and compact structure, this approach also provides high-speed operation. 展开更多
关键词 programmable logic array Single clock Dynamic STATIC Mixed circuit
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Precise,programmable biological circuits
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作者 Science Daily 《科技传播》 2014年第22期15-15,共1页
Several new components for biological circuits have been developed by researchers,These components are key building blocks for constructing precisely functioning and programmable bio-computers."The ability to com... Several new components for biological circuits have been developed by researchers,These components are key building blocks for constructing precisely functioning and programmable bio-computers."The ability to combine biological components at will in a modular,plug-and-play fashion means that we now approach the stage when the concept of programming as we know it from software engineering can be applied to 展开更多
关键词 programmable circuits CONSTRUCTinG FASHION functio
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Application of FPGA in Process Tomography Systems
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作者 Ling En Hong Yusri Bin Md. Yunos 《Engineering(科研)》 2020年第10期790-809,共20页
This paper will provide some insights on the application of Field Programmable Gate Array (FPGA) in process tomography. The focus of this paper will be to investigate the performance of the technology with respect to ... This paper will provide some insights on the application of Field Programmable Gate Array (FPGA) in process tomography. The focus of this paper will be to investigate the performance of the technology with respect to various tomography systems and comparison to other similar technologies including the Application Specific Integrated Circuit (ASIC), Graphics Processing Unit (GPU) and the microcontroller. Fundamentally, the FPGA is primarily used in the Data Acquisition System (DAQ) due to its better performance and better trade-off as compared to competitor technologies. However, the drawback of using FPGA is that it is relatively more expensive. 展开更多
关键词 Data Acquisition system (DAQ) Field programmable Gate Array (FPGA) Application Specific integrated Circuit (ASIC) Graphics Processing Unit (GPU) MICROCONTROLLER
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Design and implementation of high speed TDI CCD timing-driven circuits
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作者 李波 徐正平 +2 位作者 李军 黄厚田 王德江 《Journal of Measurement Science and Instrumentation》 CAS 2012年第2期185-190,共6页
The time delay integration charge coupled device(TDI CCD)is the key component in remote sensing systems.The paper analyzes the structure and the working principles of the device according to a customized TDI CCD chip.... The time delay integration charge coupled device(TDI CCD)is the key component in remote sensing systems.The paper analyzes the structure and the working principles of the device according to a customized TDI CCD chip.Employing the special clock resources and large-scale phase locked logic(PLL)in field-programmable gate arrays(FPGA),a timing-driven approach is proposed,using which all timing signals including reset gate,horizontal and vertical timing signals,are implemented in one chip.This not only reduces printed circuit board(PCB)space,but also enhances the portability of the system.By studying and calculating CCD parameters thoroughly,load capacity and power consumption,package,etc,are compared between various candidates chips,and detailed comparison results are also listed in table.Experimental results show that clock generator and driving circuit satisfy the requirements of high speed TDI CCD. 展开更多
关键词 time delay integration charge coupled device(TDI CCD) timing-driven circuit field-programmable gate arrays(FPGA)
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一种用于高性能FPGA的多功能I/O电路
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作者 罗旸 刘波 +3 位作者 曹正州 谢达 张艳飞 单悦尔 《半导体技术》 北大核心 2025年第3期265-272,共8页
为了满足等效系统门数为亿门级现场可编程门阵列(FPGA)的高速率、多功能数据传输需求,设计了一种用于高性能FPGA的多功能输入输出(I/O)电路,工作电压为0.95 V,单个I/O电路的最高数据传输速率为2 Gbit/s。通过在输入逻辑电路中设计同一... 为了满足等效系统门数为亿门级现场可编程门阵列(FPGA)的高速率、多功能数据传输需求,设计了一种用于高性能FPGA的多功能输入输出(I/O)电路,工作电压为0.95 V,单个I/O电路的最高数据传输速率为2 Gbit/s。通过在输入逻辑电路中设计同一边沿流水技术的双倍数据速率(DDR)电路,可以使数据不仅能在相同的时钟沿输出,而且能在同一个时钟周期输出。通过分级采样结合时钟分频和偏移技术,仅需4个时钟周期即可完成8∶1数据的转换。另外,该I/O电路还可以对数据输入输出的延时进行调节,采用粗调和细调相结合的方式,共提供512个延时抽头,并且延时的分辨率达到4 ps。仿真和实测结果表明,该多功能I/O电路能为高性能FPGA提供灵活、多协议的高速数据传输功能。 展开更多
关键词 现场可编程门阵列(FPGA) 输入输出(I/O)电路 多电平标准 双倍数据速率(DDR) 串并转换器(SerDes)
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高速低消耗数字插值滤波器设计
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作者 姚亚峰 王桐 +1 位作者 徐洋洋 辛拯宇 《湖南大学学报(自然科学版)》 北大核心 2025年第6期195-202,共8页
针对传统数字插值滤波器硬件资源消耗大、工作速度慢等问题,提出一种基于运算资源复用的改进数字插值滤波器的设计方法.该方法在多相数字插值滤波器的基础上,对滤波器架构进行了优化,实现核心运算资源的复用,可以明显降低电路资源消耗... 针对传统数字插值滤波器硬件资源消耗大、工作速度慢等问题,提出一种基于运算资源复用的改进数字插值滤波器的设计方法.该方法在多相数字插值滤波器的基础上,对滤波器架构进行了优化,实现核心运算资源的复用,可以明显降低电路资源消耗和功耗.提出的新型构架滤波器采用FPGA平台进行了原型验证,并与传统插值滤波器、多路并行插值滤波器和多相插值滤波器进行了对比.结果表明,改进滤波器所占用寄存器数量较传统结构减少65%,较多路并行结构减少73%,较多相结构减少28%;最大工作时钟频率较传统结构提升129%,较多路并行结构提升13.8%,功耗也要低于传统结构、多路并行结构,更适合高速、低消耗等应用场景. 展开更多
关键词 插值 数字滤波器 现场可编程门阵列(FPGA) 数模转换器 数字上变频
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基于CC-Link/LT总线技术的低压供配电监控系统设计 被引量:8
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作者 张迎辉 邓松 陈素芳 《电力系统保护与控制》 EI CSCD 北大核心 2009年第9期129-134,共6页
在对低压配电系统研究的基础上,分析了现有系统存在的不足,提出了基于CC-Link/LT总线技术的低压配电监控系统解决方案,实现了对低压供配电设备监视、控制和管理,达到了提高系统可靠性、可控性和快速响应的目的。文中对基于CC-Link/LT总... 在对低压配电系统研究的基础上,分析了现有系统存在的不足,提出了基于CC-Link/LT总线技术的低压配电监控系统解决方案,实现了对低压供配电设备监视、控制和管理,达到了提高系统可靠性、可控性和快速响应的目的。文中对基于CC-Link/LT总线的低压配电监控系统的硬件组成、网络拓扑进行了较详尽的介绍,并结合实际操作经验,设定了若干系统控制规则,给出了系统各控制部分的程序框图。 展开更多
关键词 现场总线 供配电管理 可编程控制器 断路器
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一种可编程异构芯片设计方法应用于视频桥接
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作者 王潘丰 蔡懿慈 《电子学报》 北大核心 2025年第1期72-83,共12页
随着智能时代的到来,越来越多的设备拥有摄像头和显示屏,而它们具有各种各样不同接口和视频格式,视频桥接面临新的挑战.以往的解决方案是根据接口和视频格式的需求采用不同的电路,如现场可编程门阵列(Field Programmable Gate Array,FP... 随着智能时代的到来,越来越多的设备拥有摄像头和显示屏,而它们具有各种各样不同接口和视频格式,视频桥接面临新的挑战.以往的解决方案是根据接口和视频格式的需求采用不同的电路,如现场可编程门阵列(Field Programmable Gate Array,FPGA)、图形处理器(Graphics Processing Unit,GPU)和专用集成电路(Application Specific Integrated Circuit,ASIC)等.但这种单一的电路模式难以同时满足低成本、超低功耗和小型化的要求,尤其是在移动显示领域.本文提出了一种新的异构体系架构,它将FPGA、微控制单元(MicroController Unit,MCU)、ASIC和存储器无缝集成到一个芯片中.该芯片不仅实现了小型化,而且具有低成本和低功耗的优势;更重要的是该款芯片可以支持不同接口和视频格式的桥接需求.针对不同算法的应用,本文给出了使用该芯片的评估方法和解决方案,为架构设计提供了依据.该芯片已成功在22 nm工艺流片,整体尺寸约为4 mm×4 mm,总功耗约为200 mW.它可以支持3840×2160分辨率和144 Hz刷新率的视频输入格式,1080×2340分辨率和90 Hz刷新率的视频输出格式.在实现同样视频桥接功能的应用时,本文所提芯片的面积和功耗均小于AMD芯片XC7K325T和Zynq Z7035的1/10.换而言之,针对此类场景的应用,本文方案在成本和功耗方面相比于传统商业FPGA有显著优化. 展开更多
关键词 异构架构 可编程 现场可编程门阵列(FPGA) 专用集成电路(ASIC) 视频桥接 低功耗
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大尺寸碘化钠制备厂房的联锁控制系统设计
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作者 闫平 李永 +3 位作者 何高魁 王国宝 郑玉来 王强 《自动化仪表》 2025年第2期71-74,共4页
为了解决在制备大尺寸碘化钠晶体过程中可能存在的安全问题,特别是高温环境下晶体制备装置可能产生的化学原料挥发问题,需要设计安全联锁控制系统,以保障试验人员的安全。采用可编程逻辑控制器(PLC)作为主要控制装置,辅以其他监测设备,... 为了解决在制备大尺寸碘化钠晶体过程中可能存在的安全问题,特别是高温环境下晶体制备装置可能产生的化学原料挥发问题,需要设计安全联锁控制系统,以保障试验人员的安全。采用可编程逻辑控制器(PLC)作为主要控制装置,辅以其他监测设备,设计了试验厂房的安全联锁控制系统方案。该系统采用巡检联锁、浓度监测装置联锁以及南北两侧门装置联锁技术,具备操作对象锁定、设备运行状态监测和区域进入限制功能。设计完成后,对联锁系统进行了搭建,并对制备过程中可能遇到的危险情况进行了模拟。在模拟过程中,安全联锁控制系统取得了良好的运行结果,使系统的可行性和可靠性得以验证。该安全联锁控制系统的设计方案对于化工试验安全生产过程具有可靠性,为类似试验的安全设计提供了有效的设计方案。 展开更多
关键词 试验厂房 安全联锁 可编程逻辑控制器 控制电路设计 硬件设计 晶体制备
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轻量级异构安全函数计算加速框架
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作者 赵川 何章钊 +3 位作者 王豪 孔繁星 赵圣楠 荆山 《计算机科学》 北大核心 2025年第4期301-309,共9页
当前,数据已成为关键战略资源,数据挖掘和分析技术在各行业发挥着重要作用,但也存在着数据泄露的风险。安全函数计算(Secure Function Evaluation,SFE)可以在保证数据安全的前提下完成任意函数的计算。Yao协议是一种用于实现安全函数计... 当前,数据已成为关键战略资源,数据挖掘和分析技术在各行业发挥着重要作用,但也存在着数据泄露的风险。安全函数计算(Secure Function Evaluation,SFE)可以在保证数据安全的前提下完成任意函数的计算。Yao协议是一种用于实现安全函数计算的协议,该协议在混淆电路(Garbled Circuit,GC)生成和计算阶段含有大量加解密计算操作,且在不经意传输(Oblivious Transfer,OT)阶段具有较高的计算开销,难以满足复杂的现实应用需求。针对Yao协议的效率问题,基于现场可编程门阵列(Field Programmable Gate Array,FPGA)的异构计算对Yao协议进行加速,并结合提出的轻量级代理不经意传输协议,最终设计出轻量级异构安全计算加速框架。该方案中,混淆电路生成方和代理计算方都实现了CPU-FPGA异构计算架构。该架构借助CPU擅长处理控制流的优势和FPGA的并行处理优势对混淆电路生成阶段和计算阶段进行加速,提高了生成混淆电路和计算混淆电路的效率,减轻了计算压力。另外,相比于通过非对称密码算法实现的不经意传输协议,在轻量级代理不经意传输协议中,混淆电路生成方和代理计算方只需执行对称操作,代理计算方即可获取用户输入对应的生成方持有的随机数。该轻量级代理不经意传输协议减轻了用户和服务器在不经意传输阶段的计算压力。实验证明,在局域网环境下,与Yao协议的软件实现(TinyGarble框架)相比,该方案的计算效率至少提高了128倍。 展开更多
关键词 安全函数计算 现场可编程门阵列 混淆电路 不经意传输 异构计算
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永磁断路器参数实时观测的神经网络加速计算模型设计
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作者 潘鹏辉 汤龙飞 《福州大学学报(自然科学版)》 北大核心 2025年第3期294-301,共8页
根据永磁开关动作的一般分合闸时间,提出一种永磁开关断路器参数实时观测的神经网络加速计算模型.以双稳态永磁断路器为观测对象,分合闸线圈电流和分合闸线圈磁通为输入,动铁心位移为期望,搭建BP神经网络观测模型.随后,结合现场可编程... 根据永磁开关动作的一般分合闸时间,提出一种永磁开关断路器参数实时观测的神经网络加速计算模型.以双稳态永磁断路器为观测对象,分合闸线圈电流和分合闸线圈磁通为输入,动铁心位移为期望,搭建BP神经网络观测模型.随后,结合现场可编程逻辑门阵列(FPGA)嵌入式芯片的结构特点和运行方式,提出矩阵乘法、激活函数的并行运算和“串行循环”的结构设计,构建嵌入式模型,提高实时计算的速度.最后,将神经网络编译至嵌入式硬件中,通过硬件实验检测模型的运算周期和观测精度. 展开更多
关键词 双稳态永磁断路器 神经网络 现场可编程逻辑门阵列 位移观测
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基于容差分析的程控电压源关键元器件选用方法研究
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作者 于悦洋 聂瑜蕙 +2 位作者 洪浩 任坤鹏 王香芬 《电子产品可靠性与环境试验》 2025年第1期1-6,共6页
为保证元器件在板测试系统中程控电源模块满足输出特性要求的同时最小化设计成本,提出了基于容差分析的程控电源模块关键元器件选用方法。首先,分析了电路设计原理和故障产生机理,结合程控电源模块的性能指标要求,确定了模块内部容差分... 为保证元器件在板测试系统中程控电源模块满足输出特性要求的同时最小化设计成本,提出了基于容差分析的程控电源模块关键元器件选用方法。首先,分析了电路设计原理和故障产生机理,结合程控电源模块的性能指标要求,确定了模块内部容差分析的主要对象;然后,对电路进行建模仿真,在相对灵敏度分析的基础上,针对关键元器件设计了正交试验并对其进行了蒙特卡洛仿真和容差分析;最后,得到了程控电源模块中关键元器件的最优选用方案,为该电源模块的选用提供了一定的参考。 展开更多
关键词 容差分析 程控电源 元器件选用 模拟电路
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一种高速多通道采集板卡设计 被引量:1
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作者 连云川 韩留军 郝国锋 《电子质量》 2025年第7期14-19,共6页
针对采集系统速率高、通道多等特点,设计了一种基于现场可编程逻辑门阵列(FPGA)的高速多通道采集板卡。该板卡以ZYNQ系列FPGA为主控芯片,采用多片AD9625完成数模转换,最终通过以太网上传分析处理后的数据。系统地阐述了各功能电路的硬... 针对采集系统速率高、通道多等特点,设计了一种基于现场可编程逻辑门阵列(FPGA)的高速多通道采集板卡。该板卡以ZYNQ系列FPGA为主控芯片,采用多片AD9625完成数模转换,最终通过以太网上传分析处理后的数据。系统地阐述了各功能电路的硬件设计方法,开发了配套驱动软件,并完成了板卡功能与性能测试。验证结果表明,该采集板卡具备有效位数高、通道丰富等优势,在工程领域具有广阔的应用前景。 展开更多
关键词 现场可编程逻辑门阵列 高速采集 多通道 模数转换
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