In-system programmable devices are products that combined modern electronic techniques and semiconductor techniques.They are indispensable devices in designing modern circuits and systems.This paper presents two pract...In-system programmable devices are products that combined modern electronic techniques and semiconductor techniques.They are indispensable devices in designing modern circuits and systems.This paper presents two practical circuits designed with programmable devices and its design method.By introducing programmable devices into gas sensor circuits,we can further improve system reliability,stability,sensitivity and integration degree,and enhance flexibility of system design.展开更多
Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this ...Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this paper,we propose pixelated programmable Si_(3)N_(4)PICs with record-high 20-level intermediate states at 785 nm wavelength.Such flexibility in phase or amplitude modulation is achieved by a programmable Sb_(2)S_(3)matrix,the footprint of whose elements can be as small as 1.2μm,limited only by the optical diffraction limit of anin-house developed pulsed laser writing system.We believe our work lays the foundation for laser-writing ultra-high-level(20 levels and even more)programmable photonic systems and metasurfaces based on phase change materials,which could catalyze diverse applications such as programmable neuromorphic photonics,biosensing,optical computing,photonic quantum computing,and reconfigurable metasurfaces.展开更多
A programmable silicon photonic multiband microwave filter with tunable bandwidths has been demonstrated.The filter has been successfully used to set up a radio-over-fiber link operating in the X-band as a proof of co...A programmable silicon photonic multiband microwave filter with tunable bandwidths has been demonstrated.The filter has been successfully used to set up a radio-over-fiber link operating in the X-band as a proof of concept.For this purpose,we have investigated the programmable photonic integrated circuit comprising 14 tunable balanced Mach–Zehnder interferometers designed into a square mesh architecture and fabricated using CMOS-compatible silicon photonic technology.展开更多
The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays(FPAAs),which are the analogue counterparts of Field Programmable Gate Arr...The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays(FPAAs),which are the analogue counterparts of Field Programmable Gate Arrays(FPGAs).In this paper,we present a new design methodology which using FPAA as a powerful analog front-end processing platform in the smart sensory microsystem.The proposed FPAA contains 16 homogeneous mixed-grained Configurable Analog Blocks(CABs) which house a variety of processing elements especially the proposed fine-grained Core Configurable Amplifiers(CCAs).The high flexible CABs allow the FPAA operating in both continuous-time and discrete-time approaches suitable to support variety of sensors.To reduce the nonideal parasitic effects and save area,the fat-tree interconnection network is adopted in this FPAA.The functionality of this FPAA is demonstrated through embedding of voltage and capacitive sensor signal readout circuits and a configurable band pass filter.The minimal detectable voltage and capacitor achieves 38 uV and 8.3 aF respectively within 100 Hz sensor bandwidth.The power consumption comparison of CCA in three applications shows that the FPAA has high power efficiency.And the simulation results also show that the FPAA has good tolerance with wide PVT variations.展开更多
The control method of rubber tyre gantry （RTG） spreader in Qingdao Port Container Terminal is logic board control,which has many shortcomings such as expensive spare parts and high faults.This paper designs a new co...The control method of rubber tyre gantry （RTG） spreader in Qingdao Port Container Terminal is logic board control,which has many shortcomings such as expensive spare parts and high faults.This paper designs a new control system using programmable logic controller （PLC） centralized control to replace the original logic board control.The new system mainly contains complete ELME spreader control scheme design,hardware selection and PLC control program development.Its field application shows that the system has characteristics of high efficiency,low running cost,easy maintenance.展开更多
The widely used sensitive elements of humidity sensors can be divided into 3 types,i.e.,resistor,capacitor,and electrolyte.Humidity sensors consisting of these sensitive elements have corresponding signal processing c...The widely used sensitive elements of humidity sensors can be divided into 3 types,i.e.,resistor,capacitor,and electrolyte.Humidity sensors consisting of these sensitive elements have corresponding signal processing circuit unique to each type of sensitive elements.This paper presents an ispPAC (in-system programmable Programmable Analog Circuit) -based humidity sensor signal processing circuit designed with software method and implemented with in-system programmable simulators.Practical operation shows that humidity sensor signal processing circuits of this kind,exhibit stable and reliable performance.展开更多
This article presents an integrated current mode configurable analog block(CAB)system for field-programmable analog array(FPAA).The proposed architecture is based on the complementary metal-oxide semiconductor(CMOS)tr...This article presents an integrated current mode configurable analog block(CAB)system for field-programmable analog array(FPAA).The proposed architecture is based on the complementary metal-oxide semiconductor(CMOS)transistor level design where MOSFET transistors operating in the saturation region are adopted.The proposed CAB architecture is designed to implement six of thewidely used current mode operations in analog processing systems:addition,subtraction,integration,multiplication,division,and pass operation.The functionality of the proposed CAB is demonstrated through these six operations,where each operation is chosen based on the user’s selection in the CAB interface system.The architecture of the CAB system proposes an optimized way of designing and integrating only three functional cells with the interface circuitry to achieve the six operations.Furthermore,optimized programming and digital tuning circuitry are implemented in the architecture to control and interface with the functional cells.Moreover,these designed programming and tuning circuitries play an essential role in optimizing the performance of the proposed design.Simulation of the proposed CMOS Transistor Based CAB system is carried out using Tanner EDA Tools in 0.35μm standard CMOS technology.The design uses a±1.5 V power supply and results in maximum 3 dB bandwidth of 34.9 MHz and an approximate size of 0.0537 mm2.This demonstrates the advantages of the design over the current state-of-the-art designs presented for comparison in this article.Consequently,the proposed design has a clear aspect of simplicity,low power consumption,and high bandwidth operation,which makes it a suitable candidate for mobile telecommunications applications.展开更多
Programmable Logic Array (PLA) is an important building circuit of VLSI chips and some of the FPGA architectures have evolved from the basic PLA architectures. In this letter, a dynamic and static mixed PLA with singl...Programmable Logic Array (PLA) is an important building circuit of VLSI chips and some of the FPGA architectures have evolved from the basic PLA architectures. In this letter, a dynamic and static mixed PLA with single-phased clock is presented. Combining both dynamic and static design style rather than introducing additional interface-buffers overcomes the racing problem, thereby saves the chip area. Besides inheriting the advantages of dynamic circuit-low power dissipation and compact structure, this approach also provides high-speed operation.展开更多
Several new components for biological circuits have been developed by researchers,These components are key building blocks for constructing precisely functioning and programmable bio-computers."The ability to com...Several new components for biological circuits have been developed by researchers,These components are key building blocks for constructing precisely functioning and programmable bio-computers."The ability to combine biological components at will in a modular,plug-and-play fashion means that we now approach the stage when the concept of programming as we know it from software engineering can be applied to展开更多
This paper will provide some insights on the application of Field Programmable Gate Array (FPGA) in process tomography. The focus of this paper will be to investigate the performance of the technology with respect to ...This paper will provide some insights on the application of Field Programmable Gate Array (FPGA) in process tomography. The focus of this paper will be to investigate the performance of the technology with respect to various tomography systems and comparison to other similar technologies including the Application Specific Integrated Circuit (ASIC), Graphics Processing Unit (GPU) and the microcontroller. Fundamentally, the FPGA is primarily used in the Data Acquisition System (DAQ) due to its better performance and better trade-off as compared to competitor technologies. However, the drawback of using FPGA is that it is relatively more expensive.展开更多
The time delay integration charge coupled device(TDI CCD)is the key component in remote sensing systems.The paper analyzes the structure and the working principles of the device according to a customized TDI CCD chip....The time delay integration charge coupled device(TDI CCD)is the key component in remote sensing systems.The paper analyzes the structure and the working principles of the device according to a customized TDI CCD chip.Employing the special clock resources and large-scale phase locked logic(PLL)in field-programmable gate arrays(FPGA),a timing-driven approach is proposed,using which all timing signals including reset gate,horizontal and vertical timing signals,are implemented in one chip.This not only reduces printed circuit board(PCB)space,but also enhances the portability of the system.By studying and calculating CCD parameters thoroughly,load capacity and power consumption,package,etc,are compared between various candidates chips,and detailed comparison results are also listed in table.Experimental results show that clock generator and driving circuit satisfy the requirements of high speed TDI CCD.展开更多
Programmable photonic integrated circuits(PICs)have emerged as a promising platform for analog signal processing.Programmable PICs,as versatile photonic integrated platforms,can realize a wide range of functionalities...Programmable photonic integrated circuits(PICs)have emerged as a promising platform for analog signal processing.Programmable PICs,as versatile photonic integrated platforms,can realize a wide range of functionalities through software control.However,a significant challenge lies in the efficient management of a large number of programmable units,which is essential for the realization of complex photonic applications.In this paper,we propose an innovative approach using Ising-model-based intelligent computing to enable dynamic reconfiguration of large-scale programmable PICs.In the theoretical framework,we model the Mach–Zehnder interferometer(MZI)fundamental units within programmable PICs as spin qubits with binary decision variables,forming the basis for the Ising model.The function of programmable PIC implementation can be reformulated as a path-planning problem,which is then addressed using the Ising model.The states of MZI units are accordingly determined as the Ising model evolves toward the lowest Ising energy.This method facilitates the simultaneous configuration of a vast number of MZI unit states,unlocking the full potential of programmable PICs for high-speed,large-scale analog signal processing.To demonstrate the efficacy of our approach,we present two distinct photonic systems:a 4×4 wavelength routing system for balanced transmission of four-channel NRZ/PAM-4 signals and an optical neural network that achieves a recognition accuracy of 96.2%.Additionally,our system demonstrates a reconfiguration speed of 30 ms and scalability to a 56×56 port network with 2000 MZI units.This work provides a groundbreaking theoretical framework and paves the way for scalable,high-speed analog signal processing in large-scale programmable PICs.展开更多
Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon ph...Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon photonics has unique advantages of ultra-high integration density as well as CMOS compatibility,and thus makes it possible to develop large-scale programmable optical signal processors.The challenge is the high silicon waveguides propagation losses and the high calibration complexity for all tuning elements due to the random phase errors.In this paper,we propose and demonstrate a programmable silicon photonic processor for the first time by introducing low-loss multimode photonic waveguide spirals and low-random-phase-error Mach-Zehnder switches.The present chip-scale programmable silicon photonic processor comprises a 1×4 variable power splitter based on cascaded Mach-Zehnder couplers(MZCs),four Ge/Si photodetectors,four channels of thermally-tunable optical delaylines.Each channel consists of a continuously-tuning phase shifter based on a waveguide spiral with a micro-heater and a digitally-tuning delayline realized with cascaded waveguide-spiral delaylines and MZSs for 5.68 ps time-delay step.Particularly,these waveguide spirals used here are designed to be as wide as 2μm,enabling an ultralow propagation loss of 0.28 dB/cm.Meanwhile,these MZCs and MZSs are designed with 2-μm-wide arm waveguides,and thus the random phase errors in the MZC/MZS arms are negligible,in which case the calibration for these MZSs/MZCs becomes easy and furthermore the power consumption for compensating the phase errors can be reduced greatly.Finally,this programmable silicon photonic processor is demonstrated successfully to verify a number of distinctively different functionalities,including tunable time-delay,microwave photonic beamforming,arbitrary optical signal filtering,and arbitrary waveform generation.展开更多
Reconfiguration is the key to produce an applicable ternary optical computer （TOC）. The method to implement the reconfiguration function determines whether a TOC can step into applied fields or not. In this work, a ...Reconfiguration is the key to produce an applicable ternary optical computer （TOC）. The method to implement the reconfiguration function determines whether a TOC can step into applied fields or not. In this work, a design of the reconfiguration circuit based on field programmable gates array （FPGA） is proposed, and the structure of the entire hardware system is discussed.展开更多
An optical fiber control and transmission module is designed and realized based on Virtex-7 field programmable gata array(FPGA), which can be applied in multi-channel broadband digital receivers. The module consists o...An optical fiber control and transmission module is designed and realized based on Virtex-7 field programmable gata array(FPGA), which can be applied in multi-channel broadband digital receivers. The module consists of sampling data transfer submodule and multi-channel synchronous sampling control submodule. The sampling data transmission in 4× fiber link channel is realized with the self-defined transfer protocol. The measured maximum data rate is 4.97 Gbyte/s. By connecting coherent clocks to the transmitter and receiver endpoints and using the self-defined transfer protocol, multi-channel sampling control signals transferred in optical fibers can be received synchronously by each analog-to-digital converter(ADC) with high accuracy and strong anti-interference ability. The module designed in this paper has certain reference value in increasing the transmission bandwidth and the synchronous sampling accuracy of multi-channel broadband digital receivers.展开更多
文摘In-system programmable devices are products that combined modern electronic techniques and semiconductor techniques.They are indispensable devices in designing modern circuits and systems.This paper presents two practical circuits designed with programmable devices and its design method.By introducing programmable devices into gas sensor circuits,we can further improve system reliability,stability,sensitivity and integration degree,and enhance flexibility of system design.
基金funded by the National Nature Science Foundation of China(Grant Nos.52175509 and 52130504)National Key Research and Development Program of China(2017YFF0204705)2021 Postdoctoral Innovation Research Plan of Hubei Province(0106100226)。
文摘Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this paper,we propose pixelated programmable Si_(3)N_(4)PICs with record-high 20-level intermediate states at 785 nm wavelength.Such flexibility in phase or amplitude modulation is achieved by a programmable Sb_(2)S_(3)matrix,the footprint of whose elements can be as small as 1.2μm,limited only by the optical diffraction limit of anin-house developed pulsed laser writing system.We believe our work lays the foundation for laser-writing ultra-high-level(20 levels and even more)programmable photonic systems and metasurfaces based on phase change materials,which could catalyze diverse applications such as programmable neuromorphic photonics,biosensing,optical computing,photonic quantum computing,and reconfigurable metasurfaces.
基金Ministry of Electronics and Information Technology(GG-11/15/2020/EMCD)。
文摘A programmable silicon photonic multiband microwave filter with tunable bandwidths has been demonstrated.The filter has been successfully used to set up a radio-over-fiber link operating in the X-band as a proof of concept.For this purpose,we have investigated the programmable photonic integrated circuit comprising 14 tunable balanced Mach–Zehnder interferometers designed into a square mesh architecture and fabricated using CMOS-compatible silicon photonic technology.
基金Supported by the CAS/SAFEA International Partnership Program for Creative Research Teams,National High Technology Research and Develop Program of China(2012AA012301)National Science and Technology Major Project of China(2013ZX03006004)
文摘The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays(FPAAs),which are the analogue counterparts of Field Programmable Gate Arrays(FPGAs).In this paper,we present a new design methodology which using FPAA as a powerful analog front-end processing platform in the smart sensory microsystem.The proposed FPAA contains 16 homogeneous mixed-grained Configurable Analog Blocks(CABs) which house a variety of processing elements especially the proposed fine-grained Core Configurable Amplifiers(CCAs).The high flexible CABs allow the FPAA operating in both continuous-time and discrete-time approaches suitable to support variety of sensors.To reduce the nonideal parasitic effects and save area,the fat-tree interconnection network is adopted in this FPAA.The functionality of this FPAA is demonstrated through embedding of voltage and capacitive sensor signal readout circuits and a configurable band pass filter.The minimal detectable voltage and capacitor achieves 38 uV and 8.3 aF respectively within 100 Hz sensor bandwidth.The power consumption comparison of CCA in three applications shows that the FPAA has high power efficiency.And the simulation results also show that the FPAA has good tolerance with wide PVT variations.
基金Shandong University of Science and Technology Spring Buds Program(No.2010AZZ170)
文摘The control method of rubber tyre gantry （RTG） spreader in Qingdao Port Container Terminal is logic board control,which has many shortcomings such as expensive spare parts and high faults.This paper designs a new control system using programmable logic controller （PLC） centralized control to replace the original logic board control.The new system mainly contains complete ELME spreader control scheme design,hardware selection and PLC control program development.Its field application shows that the system has characteristics of high efficiency,low running cost,easy maintenance.
文摘The widely used sensitive elements of humidity sensors can be divided into 3 types,i.e.,resistor,capacitor,and electrolyte.Humidity sensors consisting of these sensitive elements have corresponding signal processing circuit unique to each type of sensitive elements.This paper presents an ispPAC (in-system programmable Programmable Analog Circuit) -based humidity sensor signal processing circuit designed with software method and implemented with in-system programmable simulators.Practical operation shows that humidity sensor signal processing circuits of this kind,exhibit stable and reliable performance.
基金This work was supported in part by the Geran Galakan Penyelidik Muda Grant(GGPM),Universiti Kebangsaan Malaysia,Selangor,Malaysia under grant GGPM-2021-055.
文摘This article presents an integrated current mode configurable analog block(CAB)system for field-programmable analog array(FPAA).The proposed architecture is based on the complementary metal-oxide semiconductor(CMOS)transistor level design where MOSFET transistors operating in the saturation region are adopted.The proposed CAB architecture is designed to implement six of thewidely used current mode operations in analog processing systems:addition,subtraction,integration,multiplication,division,and pass operation.The functionality of the proposed CAB is demonstrated through these six operations,where each operation is chosen based on the user’s selection in the CAB interface system.The architecture of the CAB system proposes an optimized way of designing and integrating only three functional cells with the interface circuitry to achieve the six operations.Furthermore,optimized programming and digital tuning circuitry are implemented in the architecture to control and interface with the functional cells.Moreover,these designed programming and tuning circuitries play an essential role in optimizing the performance of the proposed design.Simulation of the proposed CMOS Transistor Based CAB system is carried out using Tanner EDA Tools in 0.35μm standard CMOS technology.The design uses a±1.5 V power supply and results in maximum 3 dB bandwidth of 34.9 MHz and an approximate size of 0.0537 mm2.This demonstrates the advantages of the design over the current state-of-the-art designs presented for comparison in this article.Consequently,the proposed design has a clear aspect of simplicity,low power consumption,and high bandwidth operation,which makes it a suitable candidate for mobile telecommunications applications.
基金Supported by the Commission of Science Technology and Industry for National Defense and the National Natural Science Foundation of China (No. 90307011)
文摘Programmable Logic Array (PLA) is an important building circuit of VLSI chips and some of the FPGA architectures have evolved from the basic PLA architectures. In this letter, a dynamic and static mixed PLA with single-phased clock is presented. Combining both dynamic and static design style rather than introducing additional interface-buffers overcomes the racing problem, thereby saves the chip area. Besides inheriting the advantages of dynamic circuit-low power dissipation and compact structure, this approach also provides high-speed operation.
文摘Several new components for biological circuits have been developed by researchers,These components are key building blocks for constructing precisely functioning and programmable bio-computers."The ability to combine biological components at will in a modular,plug-and-play fashion means that we now approach the stage when the concept of programming as we know it from software engineering can be applied to
文摘This paper will provide some insights on the application of Field Programmable Gate Array (FPGA) in process tomography. The focus of this paper will be to investigate the performance of the technology with respect to various tomography systems and comparison to other similar technologies including the Application Specific Integrated Circuit (ASIC), Graphics Processing Unit (GPU) and the microcontroller. Fundamentally, the FPGA is primarily used in the Data Acquisition System (DAQ) due to its better performance and better trade-off as compared to competitor technologies. However, the drawback of using FPGA is that it is relatively more expensive.
基金National High Technology Research and Development Program of China(863 Program)(No.2009AA7010102)
文摘The time delay integration charge coupled device(TDI CCD)is the key component in remote sensing systems.The paper analyzes the structure and the working principles of the device according to a customized TDI CCD chip.Employing the special clock resources and large-scale phase locked logic(PLL)in field-programmable gate arrays(FPGA),a timing-driven approach is proposed,using which all timing signals including reset gate,horizontal and vertical timing signals,are implemented in one chip.This not only reduces printed circuit board(PCB)space,but also enhances the portability of the system.By studying and calculating CCD parameters thoroughly,load capacity and power consumption,package,etc,are compared between various candidates chips,and detailed comparison results are also listed in table.Experimental results show that clock generator and driving circuit satisfy the requirements of high speed TDI CCD.
基金Youth Innovation Promotion Association of the Chinese Academy of Sciences(2022111)International Partnership Program of Chinese Academy of Sciences(100GJHZ2022028GC)+1 种基金Natural Science Foundation of Beijing Municipality(Z210005)National Natural Science Foundation of China(62135014,62235011)。
文摘Programmable photonic integrated circuits(PICs)have emerged as a promising platform for analog signal processing.Programmable PICs,as versatile photonic integrated platforms,can realize a wide range of functionalities through software control.However,a significant challenge lies in the efficient management of a large number of programmable units,which is essential for the realization of complex photonic applications.In this paper,we propose an innovative approach using Ising-model-based intelligent computing to enable dynamic reconfiguration of large-scale programmable PICs.In the theoretical framework,we model the Mach–Zehnder interferometer(MZI)fundamental units within programmable PICs as spin qubits with binary decision variables,forming the basis for the Ising model.The function of programmable PIC implementation can be reformulated as a path-planning problem,which is then addressed using the Ising model.The states of MZI units are accordingly determined as the Ising model evolves toward the lowest Ising energy.This method facilitates the simultaneous configuration of a vast number of MZI unit states,unlocking the full potential of programmable PICs for high-speed,large-scale analog signal processing.To demonstrate the efficacy of our approach,we present two distinct photonic systems:a 4×4 wavelength routing system for balanced transmission of four-channel NRZ/PAM-4 signals and an optical neural network that achieves a recognition accuracy of 96.2%.Additionally,our system demonstrates a reconfiguration speed of 30 ms and scalability to a 56×56 port network with 2000 MZI units.This work provides a groundbreaking theoretical framework and paves the way for scalable,high-speed analog signal processing in large-scale programmable PICs.
基金We are grateful for financial supports from National Major Research and Development Program(No.2018YFB2200200)National Science Fund for Distinguished Young Scholars(61725503)+1 种基金Zhejiang Provincial Natural Science Foundation(LZ18F050001,LGF21F050003)National Natural Science Foundation of China(NSFC)(91950205,6191101294,11861121002,61905209,62175214,62111530147).
文摘Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon photonics has unique advantages of ultra-high integration density as well as CMOS compatibility,and thus makes it possible to develop large-scale programmable optical signal processors.The challenge is the high silicon waveguides propagation losses and the high calibration complexity for all tuning elements due to the random phase errors.In this paper,we propose and demonstrate a programmable silicon photonic processor for the first time by introducing low-loss multimode photonic waveguide spirals and low-random-phase-error Mach-Zehnder switches.The present chip-scale programmable silicon photonic processor comprises a 1×4 variable power splitter based on cascaded Mach-Zehnder couplers(MZCs),four Ge/Si photodetectors,four channels of thermally-tunable optical delaylines.Each channel consists of a continuously-tuning phase shifter based on a waveguide spiral with a micro-heater and a digitally-tuning delayline realized with cascaded waveguide-spiral delaylines and MZSs for 5.68 ps time-delay step.Particularly,these waveguide spirals used here are designed to be as wide as 2μm,enabling an ultralow propagation loss of 0.28 dB/cm.Meanwhile,these MZCs and MZSs are designed with 2-μm-wide arm waveguides,and thus the random phase errors in the MZC/MZS arms are negligible,in which case the calibration for these MZSs/MZCs becomes easy and furthermore the power consumption for compensating the phase errors can be reduced greatly.Finally,this programmable silicon photonic processor is demonstrated successfully to verify a number of distinctively different functionalities,including tunable time-delay,microwave photonic beamforming,arbitrary optical signal filtering,and arbitrary waveform generation.
基金Project supported by the National Natural Science Foundation of China(Grant No.61073049)the Shanghai Leading Academic Discipline Project(Grant No.J50103)the Doctorate Foundation of Education Ministry of China(Grant No.20093108110016)
文摘Reconfiguration is the key to produce an applicable ternary optical computer （TOC）. The method to implement the reconfiguration function determines whether a TOC can step into applied fields or not. In this work, a design of the reconfiguration circuit based on field programmable gates array （FPGA） is proposed, and the structure of the entire hardware system is discussed.
文摘An optical fiber control and transmission module is designed and realized based on Virtex-7 field programmable gata array(FPGA), which can be applied in multi-channel broadband digital receivers. The module consists of sampling data transfer submodule and multi-channel synchronous sampling control submodule. The sampling data transmission in 4× fiber link channel is realized with the self-defined transfer protocol. The measured maximum data rate is 4.97 Gbyte/s. By connecting coherent clocks to the transmitter and receiver endpoints and using the self-defined transfer protocol, multi-channel sampling control signals transferred in optical fibers can be received synchronously by each analog-to-digital converter(ADC) with high accuracy and strong anti-interference ability. The module designed in this paper has certain reference value in increasing the transmission bandwidth and the synchronous sampling accuracy of multi-channel broadband digital receivers.
