Reconfiguration is the key to produce an applicable ternary optical computer （TOC）. The method to implement the reconfiguration function determines whether a TOC can step into applied fields or not. In this work, a ...Reconfiguration is the key to produce an applicable ternary optical computer （TOC）. The method to implement the reconfiguration function determines whether a TOC can step into applied fields or not. In this work, a design of the reconfiguration circuit based on field programmable gates array （FPGA） is proposed, and the structure of the entire hardware system is discussed.展开更多
t In this paper an overall scheme of the task management system of ternary optical computer （TOC） is proposed, and the software architecture chart is given. The function and accomplishment of each module in the syst...t In this paper an overall scheme of the task management system of ternary optical computer （TOC） is proposed, and the software architecture chart is given. The function and accomplishment of each module in the system are described in general. In addition, according to the aforementioned scheme a prototype of TOC task management system is implemented, and the feasibility, rationality and completeness of the scheme are verified via running and testing the prototype.展开更多
The division operation is not frequent relatively in traditional applications, but it is increasingly indispensable and important in many modern applications. In this paper, the implementation of modified signed-digit...The division operation is not frequent relatively in traditional applications, but it is increasingly indispensable and important in many modern applications. In this paper, the implementation of modified signed-digit （MSD） floating-point division using Newton-Raphson method on the system of ternary optical computer （TOC） is studied. Since the addition of MSD floating-point is carry-free and the digit width of the system of TOC is large, it is easy to deal with the enough wide data and transform the division operation into multiplication and addition operations. And using data scan and truncation the problem of digits expansion is effectively solved in the range of error limit. The division gets the good results and the efficiency is high. The instance of MSD floating-point division shows that the method is feasible.展开更多
As a typical in-memory computing hardware design, nonvolatile ternary content-addressable memories(TCAMs) enable the logic operation and data storage for high throughout in parallel big data processing. However,TCAM c...As a typical in-memory computing hardware design, nonvolatile ternary content-addressable memories(TCAMs) enable the logic operation and data storage for high throughout in parallel big data processing. However,TCAM cells based on conventional silicon-based devices suffer from structural complexity and large footprintlimitations. Here, we demonstrate an ultrafast nonvolatile TCAM cell based on the MoTe2/hBN/multilayergraphene (MLG) van der Waals heterostructure using a top-gated partial floating-gate field-effect transistor(PFGFET) architecture. Based on its ambipolar transport properties, the carrier type in the source/drain andcentral channel regions of the MoTe2 channel can be efficiently tuned by the control gate and top gate, respectively,enabling the reconfigurable operation of the device in either memory or FET mode. When working inthe memory mode, it achieves an ultrafast 60 ns programming/erase speed with a current on-off ratio of ∼105,excellent retention capability, and robust endurance. When serving as a reconfigurable transistor, unipolar p-typeand n-type FETs are obtained by adopting ultrafast 60 ns control-gate voltage pulses with different polarities.The monolithic integration of memory and logic within a single device enables the content-addressable memory(CAM) functionality. Finally, by integrating two PFGFETs in parallel, a TCAM cell with a high current ratioof ∼10^(5) between the match and mismatch states is achieved without requiring additional peripheral circuitry.These results provide a promising route for the design of high-performance TCAM devices for future in-memorycomputing applications.展开更多
针对三值光学计算机(ternary optical computer,TOC)中可变位数改良符号数字(modified signed digit,MSD)加法器所面临的移位效率问题,提出了一种全新的数据移位方式,并设计了相应的可变距离移位寄存器.该移位方式为寄存器每个位的输入...针对三值光学计算机(ternary optical computer,TOC)中可变位数改良符号数字(modified signed digit,MSD)加法器所面临的移位效率问题,提出了一种全新的数据移位方式,并设计了相应的可变距离移位寄存器.该移位方式为寄存器每个位的输入线和输出线分别设置了对应数据总线不同位线的跨接旁路,每个旁路的电子开关由一位锁存器控制,通过给锁存器赋值来改变移位的距离,从而实现指定距离的快速移位,解决了当前移位寄存器因采用D触发器(D flip-flop,DFF)串连结构只能实现逐位移动而效率低下的问题.讨论了该新型移位技术的原理和可变距离移位寄存器的实现方案,给出了6个可变距离移位寄存器实例,并将这些实例与传统移位寄存器进行了对比实验.研究结果表明,该新型移位技术在时钟频率、移位延迟、硬件资源消耗和功耗方面明显优于传统移位技术,能够显著提升三值光学计算机中MSD加法器的性能.展开更多
基金Project supported by the National Natural Science Foundation of China(Grant No.61073049)the Shanghai Leading Academic Discipline Project(Grant No.J50103)the Doctorate Foundation of Education Ministry of China(Grant No.20093108110016)
文摘Reconfiguration is the key to produce an applicable ternary optical computer （TOC）. The method to implement the reconfiguration function determines whether a TOC can step into applied fields or not. In this work, a design of the reconfiguration circuit based on field programmable gates array （FPGA） is proposed, and the structure of the entire hardware system is discussed.
基金Project supported by the National Natural Science Foundation of China(Grant No.61073049)the Ph D Programs Foundation of the Ministry of Education of China(Grant No.20093108110016)the Shanghai Leading Academic Discipline Project(Grant No.J50103)
文摘t In this paper an overall scheme of the task management system of ternary optical computer （TOC） is proposed, and the software architecture chart is given. The function and accomplishment of each module in the system are described in general. In addition, according to the aforementioned scheme a prototype of TOC task management system is implemented, and the feasibility, rationality and completeness of the scheme are verified via running and testing the prototype.
基金Project supported by the Shanghai Leading Academic Discipline Project(Grant No.J50103)the National Natural Science Foundation of China(Grant No.61073049)
文摘The division operation is not frequent relatively in traditional applications, but it is increasingly indispensable and important in many modern applications. In this paper, the implementation of modified signed-digit （MSD） floating-point division using Newton-Raphson method on the system of ternary optical computer （TOC） is studied. Since the addition of MSD floating-point is carry-free and the digit width of the system of TOC is large, it is easy to deal with the enough wide data and transform the division operation into multiplication and addition operations. And using data scan and truncation the problem of digits expansion is effectively solved in the range of error limit. The division gets the good results and the efficiency is high. The instance of MSD floating-point division shows that the method is feasible.
基金supported by the National Key Research&Development Projects of China(Grant No.2022YFA1204100)National Natural Science Foundation of China(Grant No.62488201)+1 种基金CAS Project for Young Scientists in Basic Research(YSBR-003)the Innovation Program of Quantum Science and Technology(2021ZD0302700)。
文摘As a typical in-memory computing hardware design, nonvolatile ternary content-addressable memories(TCAMs) enable the logic operation and data storage for high throughout in parallel big data processing. However,TCAM cells based on conventional silicon-based devices suffer from structural complexity and large footprintlimitations. Here, we demonstrate an ultrafast nonvolatile TCAM cell based on the MoTe2/hBN/multilayergraphene (MLG) van der Waals heterostructure using a top-gated partial floating-gate field-effect transistor(PFGFET) architecture. Based on its ambipolar transport properties, the carrier type in the source/drain andcentral channel regions of the MoTe2 channel can be efficiently tuned by the control gate and top gate, respectively,enabling the reconfigurable operation of the device in either memory or FET mode. When working inthe memory mode, it achieves an ultrafast 60 ns programming/erase speed with a current on-off ratio of ∼105,excellent retention capability, and robust endurance. When serving as a reconfigurable transistor, unipolar p-typeand n-type FETs are obtained by adopting ultrafast 60 ns control-gate voltage pulses with different polarities.The monolithic integration of memory and logic within a single device enables the content-addressable memory(CAM) functionality. Finally, by integrating two PFGFETs in parallel, a TCAM cell with a high current ratioof ∼10^(5) between the match and mismatch states is achieved without requiring additional peripheral circuitry.These results provide a promising route for the design of high-performance TCAM devices for future in-memorycomputing applications.
