Satellite disciplined clock system(SDCS)composed of satellite timing receiver and local frequency synthesis is widely applied for its high accuracy and low cost.This paper provides a review of SDCS.Key technologies su...Satellite disciplined clock system(SDCS)composed of satellite timing receiver and local frequency synthesis is widely applied for its high accuracy and low cost.This paper provides a review of SDCS.Key technologies such as phase difference measurement,pulse noise process and frequency calibration are surveyed in detail.Disciplined clock model based on PI controller is built and disciplined process is analyzed.The methods of realizing the disciplined clock circuit are classified and summarized.A prototype based on FPGA is proposed.At last development trend of SDCS is discussed.展开更多
文摘Satellite disciplined clock system(SDCS)composed of satellite timing receiver and local frequency synthesis is widely applied for its high accuracy and low cost.This paper provides a review of SDCS.Key technologies such as phase difference measurement,pulse noise process and frequency calibration are surveyed in detail.Disciplined clock model based on PI controller is built and disciplined process is analyzed.The methods of realizing the disciplined clock circuit are classified and summarized.A prototype based on FPGA is proposed.At last development trend of SDCS is discussed.
