In order to suppress drain-induced barrier lowering in dual material gate SOI MOSFETs,halo doping is used in the channel near the source. Two-dimensional analytical models of surface potential and threshold voltage fo...In order to suppress drain-induced barrier lowering in dual material gate SOI MOSFETs,halo doping is used in the channel near the source. Two-dimensional analytical models of surface potential and threshold voltage for the novel SOI MOSFET are developed based on the explicit solution of the two-dimensional Poisson＇s equation. Its characteristic improvement is investigated. It is concluded that the novel structure exhibits better suppression of drain-induced barrier lowering and higher carrier transport efficiency than conventional dual material gate SOI MOSFETs. Its drain-induced barrier lowering decreases with increasing halo doping concentration but does not change monotonically with halo length. The analytical models agree well with the two-dimensional device simulator MEDICI.展开更多
Drug delivery systems(DDS) are used to deliver therapeutic drugs to improve selectivity and reduce side effects. With the development of nanotechnology, many nanocarriers have been developed and applied to drug delive...Drug delivery systems(DDS) are used to deliver therapeutic drugs to improve selectivity and reduce side effects. With the development of nanotechnology, many nanocarriers have been developed and applied to drug delivery, including mesoporous silica. Mesoporous silica nanoparticles(MSNs) have attracted a lot of attention for simple synthesis, biocompatibility, high surface area and pore volume. Based on the pore system and surface modification, gated mesoporous silica nanoparticles can be designed to realize on-command drug release, which provides a new approach for selective delivery of antitumor drugs.Herein, this review mainly focuses on the “gate keepers” of mesoporous silica for drug controlled release in nearly few years(2017–2020). We summarize the mechanism of drug controlled release in gated MSNs and different gated materials: inorganic gated materials, organic gated materials, self-gated drug molecules, and biological membranes. The facing challenges and future prospects of gated MSNs are discussed rationally in the end.展开更多
Sub-threshold characteristics of the dual material gate 4H-SiC MESFET （DMGFET） are investigated and the analytical models to describe the drain-induced barrier lowering （DIBL） effect are derived by solving one- an...Sub-threshold characteristics of the dual material gate 4H-SiC MESFET （DMGFET） are investigated and the analytical models to describe the drain-induced barrier lowering （DIBL） effect are derived by solving one- and two- dimensional Poisson＇s equations. Using these models, we calculate the bottom potential of the channel and the threshold voltage shift, which characterize the drain-induced barrier lowering （DIBL） effect. The calculated results reveal that the dual material gate （DMG） structure alleviates the deterioration of the threshold voltage and thus suppresses the DIBL effect due to the introduced step function, which originates from the work function difference of the two gate materials when compared with the conventional single material gate metal-semiconductor field-effect transistor （SMGFET）.展开更多
Dual material gate SOI MOSFET with asymmetrical halo can suppress short channel effect and increase carriers transport efficiency. The analytical model of its subthreshold drain current is derived based on the explici...Dual material gate SOI MOSFET with asymmetrical halo can suppress short channel effect and increase carriers transport efficiency. The analytical model of its subthreshold drain current is derived based on the explicit solution of two-dimensional Poisson’s equation in the depletion region. The model takes into consideration the channel length modulation effect and the contribution of the back channel current component. Its validation is verified by comparision with two dimensional device simulator MEDICI.展开更多
A dual material gate silicon-on-insulator MOSFET with asymmetrical halo is presented to improve short channel effect and carder transport efficiency for the first time. The front gate consists of two metal gates with ...A dual material gate silicon-on-insulator MOSFET with asymmetrical halo is presented to improve short channel effect and carder transport efficiency for the first time. The front gate consists of two metal gates with different work functions by making them contacting laterally, and the channel is more heavily doped near the source than in the rest. Using a three-region polynomial potential distribution and a universal boundary condition, a two-dimensional analytical model for the fully depleted silicon-on-insulator MOSFET is developed based on the explicit solution of two-dimensional Poisson＇s equation. The model includes the calculation of potential distribution along the channel and subthreshold current. The performance improvement of the novel silicon-on-insulator MOSFET is examined and compared with the traditional silicon-on-insulator MOSFET using the analytical model and two-dimensional device simulator MEDICI. It is found that the novel silicon-on-insulator MOSFET could not only suppress short channel effect, but also increase cartier transoort efficiency noticeably. The derived analytical model agrees well with MEDICI.展开更多
In the present work, a two-dimensional（2D） analytical framework of triple material symmetrical gate stack（TMGS）DG-MOSFET is presented in order to subdue the short channel effects. A lightly doped channel along wit...In the present work, a two-dimensional（2D） analytical framework of triple material symmetrical gate stack（TMGS）DG-MOSFET is presented in order to subdue the short channel effects. A lightly doped channel along with triple material gate having different work functions and symmetrical gate stack structure, showcases substantial betterment in quashing short channel effects to a good extent. The device functioning amends in terms of improved exemption to threshold voltage roll-off, thereby suppressing the short channel effects. The encroachments of respective device arguments on the threshold voltage of the proposed structure are examined in detail. The significant outcomes are compared with the numerical simulation data obtained by using 2D ATLAS;device simulator to affirm and formalize the proposed device structure.展开更多
On the basis of the exact resultant solution of two dimensional Poisson’s equations,a new accurate two-dimensional analytical model comprising surface channel potentials,a surface channel electric field and a thresho...On the basis of the exact resultant solution of two dimensional Poisson’s equations,a new accurate two-dimensional analytical model comprising surface channel potentials,a surface channel electric field and a threshold voltage for fully depleted asymmetrical dual material gate double-gate strained-Si MOSFETs is successfully developed. The model shows its validity by good agreement with the simulated results from a two-dimensional numerical simulator.Besides offering a physical insight into device physics,the model provides basic design guidance for fully depleted asymmetrical dual material gate double-gate strained-Si MOSFETs.展开更多
The evolution of the traditional metal oxide semiconductor field effect transistor(MOSFET) from planar single gate devices into 3 D multiple gates has led to higher package density and high current drive.However, due ...The evolution of the traditional metal oxide semiconductor field effect transistor(MOSFET) from planar single gate devices into 3 D multiple gates has led to higher package density and high current drive.However, due to continuous scaling and as a consequent close proximity between source and drain in the nano-regime, these multigate devices have been found to suffer from performance degrading short channel effects(SCEs).In this paper, a three dimensional analytical model of a trigate MOSFET incorporating non-conventional structural techniques like silicon-on-insulator, gate and channel engineering in addition to gate oxide stack is presented.The electrostatic integrity and device capability of suppressing SCEs is investigated by deriving the potential distribution profile using the three dimensional Poisson’s equation along with suitable boundary conditions. The other device parameters like threshold voltage and subthreshold swing are produced from the surface potential model.The validity of the proposed structure is established by the close agreement among the results obtained from the analytical model and simulation results.展开更多
An impact ionization MOSFET （IMOS） is evolved for overcoming the constraint of less than 60 mV/decade sub-threshold slope （SS） of conventional MOSFET at room temperature. In this work, first, the device performanc...An impact ionization MOSFET （IMOS） is evolved for overcoming the constraint of less than 60 mV/decade sub-threshold slope （SS） of conventional MOSFET at room temperature. In this work, first, the device performance of the p-type double gate impact ionization MOSFET （DG-IMOS） is optimized by adjusting the device design parameters. The adjusted parameters are ratio of gate and intrinsic length, gate dielectric thickness and gate work function. Secondly, the DMG （dual material gate） DG-IMOS is proposed and investigated. This DMG DG-IMOS is further optimized to obtain the best possible performance parameters. Simulation results reveal that DMG DG-IMOS when compared to DG-IMOS, shows better IoN, ION/IoFF ratio, and RF parameters. Results show that by properly tuning the lengths of two materials at a ratio of 1.5 in DMG DG-IMOS, optimized perform- ance is achieved including ION/IoFF ratio of 2.87 × 10^9 A/μm with/ON as 11.87 × 10^-4 A/μm and transconductance of 1.06× 10^-3 S/μm. It is analyzed that length of drain side material should be greater than the length of source side material to attain the higher transconductance in DMG DG-IMOS.展开更多
The analog performance of gate misaligned dual material double gate junctionless transistor is demonstrated for the first time. The cases considered are where misalignment occurs towards source side and towards drain ...The analog performance of gate misaligned dual material double gate junctionless transistor is demonstrated for the first time. The cases considered are where misalignment occurs towards source side and towards drain side. The analog performance parameters analyzed are： transconductance, output conductance, intrinsic gain and cut-off frequency. These figures of merits （FOMs） are compared with a dual material double gate inversion mode transistor under same gate misalignment condition. The impacts of different length of control gate （L 1） for a given gate length （L） are also studied and the optimum lengths La under misalignment condition to have better analog FOMs and high tolerance to misalignment are presented.展开更多
An analytical surface potential model for the single material double work function gate （SMDWG） MOSFET is developed based on the exact resultant solution of the two-dimensional Poisson equation. The model includes t...An analytical surface potential model for the single material double work function gate （SMDWG） MOSFET is developed based on the exact resultant solution of the two-dimensional Poisson equation. The model includes the effects of drain biases, gate oxide thickness, different combinations of S-gate and D-gate length and values of substrate doping concentration. More attention has been paid to seeking to explain the attributes of the SMDWG MOSFET, such as suppressing drain-induced barrier lowering （DIBL）, accelerating carrier drift velocity and device speed. The model is verified by comparison to the simulated results using the device simulator MEDICI. The accuracy of the results obtained using our analytical model is verified using numerical simulations. The model not only offers the physical insight into device physics but also provides the basic designing guideline for the device.展开更多
In this paper, charge-plasma-based tunnel FET is proposed by employing dual material gate with hetero gate dielectric technique and it is named hetero-dielectric dual material gate doping-less TFET（HD_DMG_DLTFET）. I...In this paper, charge-plasma-based tunnel FET is proposed by employing dual material gate with hetero gate dielectric technique and it is named hetero-dielectric dual material gate doping-less TFET（HD_DMG_DLTFET）. It is compared with conventional doping-less TFET（DLTFET） and dual material gate doping-less TFET（DMG_DLTFET） on the basis of analog and RF performance. The HD_DMG_DLTFET provides better ON state current（I_（ON） =94 μA/ μm）, I_（ON）/I_（OFF）（≈1.36×10^（13））, point（≈3 mV/dec） and average subthreshold slope（AV-SSD40.40 mV/dec）. The proposed device offers low total gate capacitance（C_（gg）/ along with higher drive current. However, with a better transconductance（g_m） and cut-off frequency（f_T）, the HD_DMG_DLTFET can be a good candidate for RF circuitry. The early voltage（V_（EA）/ and output conductance（gd/ are also moderate for the proposed device with comparison to other devices and therefore can be a candidate for analog devices.From all these simulation results and their study, it is observed that HD_DMG_DLTFET has improved analog/RF performance compared to DLTFET and DMG_DLTFET.展开更多
文摘In order to suppress drain-induced barrier lowering in dual material gate SOI MOSFETs,halo doping is used in the channel near the source. Two-dimensional analytical models of surface potential and threshold voltage for the novel SOI MOSFET are developed based on the explicit solution of the two-dimensional Poisson＇s equation. Its characteristic improvement is investigated. It is concluded that the novel structure exhibits better suppression of drain-induced barrier lowering and higher carrier transport efficiency than conventional dual material gate SOI MOSFETs. Its drain-induced barrier lowering decreases with increasing halo doping concentration but does not change monotonically with halo length. The analytical models agree well with the two-dimensional device simulator MEDICI.
基金the financial support from the National Natural Science Foundation of China (No. 32071342)Guangdong Special Support Program (No. 2019TQ05Y209)+5 种基金Natural Science Foundation of Guangdong Province (No. 2021A1515010431)Shenzhen Fund for Guangdong Provincial High-level Clinical Key Specialties (No. SZGSP001)Shenzhen Key Laboratory of Kindey Diseases(No. ZDSYS201504301616234)the Key Project of Basic Research of Shenzhen (No. JCYJ20200109113603854)the International Cooperation Research Project of Shenzhen (No. GJHZ20180418190557102)the Special Funds of Key Disciplines Construction from Guangdong and Zhongshan Cooperating。
文摘Drug delivery systems(DDS) are used to deliver therapeutic drugs to improve selectivity and reduce side effects. With the development of nanotechnology, many nanocarriers have been developed and applied to drug delivery, including mesoporous silica. Mesoporous silica nanoparticles(MSNs) have attracted a lot of attention for simple synthesis, biocompatibility, high surface area and pore volume. Based on the pore system and surface modification, gated mesoporous silica nanoparticles can be designed to realize on-command drug release, which provides a new approach for selective delivery of antitumor drugs.Herein, this review mainly focuses on the “gate keepers” of mesoporous silica for drug controlled release in nearly few years(2017–2020). We summarize the mechanism of drug controlled release in gated MSNs and different gated materials: inorganic gated materials, organic gated materials, self-gated drug molecules, and biological membranes. The facing challenges and future prospects of gated MSNs are discussed rationally in the end.
基金Project supported by the Pre-research Foundation from the National Ministries and Commissions of China (GrantNo.51308030201)
文摘Sub-threshold characteristics of the dual material gate 4H-SiC MESFET （DMGFET） are investigated and the analytical models to describe the drain-induced barrier lowering （DIBL） effect are derived by solving one- and two- dimensional Poisson＇s equations. Using these models, we calculate the bottom potential of the channel and the threshold voltage shift, which characterize the drain-induced barrier lowering （DIBL） effect. The calculated results reveal that the dual material gate （DMG） structure alleviates the deterioration of the threshold voltage and thus suppresses the DIBL effect due to the introduced step function, which originates from the work function difference of the two gate materials when compared with the conventional single material gate metal-semiconductor field-effect transistor （SMGFET）.
基金This work was supported by the National Natural Science Foundation of China (No60472003)
文摘Dual material gate SOI MOSFET with asymmetrical halo can suppress short channel effect and increase carriers transport efficiency. The analytical model of its subthreshold drain current is derived based on the explicit solution of two-dimensional Poisson’s equation in the depletion region. The model takes into consideration the channel length modulation effect and the contribution of the back channel current component. Its validation is verified by comparision with two dimensional device simulator MEDICI.
基金Project 60472003 supported by National Natural Science Foundation of China and 2005CB321701 by the State Key Development Program for BasicResearch of China
文摘A dual material gate silicon-on-insulator MOSFET with asymmetrical halo is presented to improve short channel effect and carder transport efficiency for the first time. The front gate consists of two metal gates with different work functions by making them contacting laterally, and the channel is more heavily doped near the source than in the rest. Using a three-region polynomial potential distribution and a universal boundary condition, a two-dimensional analytical model for the fully depleted silicon-on-insulator MOSFET is developed based on the explicit solution of two-dimensional Poisson＇s equation. The model includes the calculation of potential distribution along the channel and subthreshold current. The performance improvement of the novel silicon-on-insulator MOSFET is examined and compared with the traditional silicon-on-insulator MOSFET using the analytical model and two-dimensional device simulator MEDICI. It is found that the novel silicon-on-insulator MOSFET could not only suppress short channel effect, but also increase cartier transoort efficiency noticeably. The derived analytical model agrees well with MEDICI.
文摘In the present work, a two-dimensional（2D） analytical framework of triple material symmetrical gate stack（TMGS）DG-MOSFET is presented in order to subdue the short channel effects. A lightly doped channel along with triple material gate having different work functions and symmetrical gate stack structure, showcases substantial betterment in quashing short channel effects to a good extent. The device functioning amends in terms of improved exemption to threshold voltage roll-off, thereby suppressing the short channel effects. The encroachments of respective device arguments on the threshold voltage of the proposed structure are examined in detail. The significant outcomes are compared with the numerical simulation data obtained by using 2D ATLAS;device simulator to affirm and formalize the proposed device structure.
基金Project supported by the National Natural Science Foundation of China(Nos60976068,60936005)the Cultivation Fund of the Key Scientific and Technical Innovation Project,Ministry of Education of China(No708083)the Specialized Research Fund for the Doctoral Program of Higher Education(No200807010010)
文摘On the basis of the exact resultant solution of two dimensional Poisson’s equations,a new accurate two-dimensional analytical model comprising surface channel potentials,a surface channel electric field and a threshold voltage for fully depleted asymmetrical dual material gate double-gate strained-Si MOSFETs is successfully developed. The model shows its validity by good agreement with the simulated results from a two-dimensional numerical simulator.Besides offering a physical insight into device physics,the model provides basic design guidance for fully depleted asymmetrical dual material gate double-gate strained-Si MOSFETs.
基金Project supported by the Ministry of Electronics and Information Technology(MEITy),Govt. of India under its Visvesvaraya PhD Scheme(PhD-MLA/4(55)/2015-16)
文摘The evolution of the traditional metal oxide semiconductor field effect transistor(MOSFET) from planar single gate devices into 3 D multiple gates has led to higher package density and high current drive.However, due to continuous scaling and as a consequent close proximity between source and drain in the nano-regime, these multigate devices have been found to suffer from performance degrading short channel effects(SCEs).In this paper, a three dimensional analytical model of a trigate MOSFET incorporating non-conventional structural techniques like silicon-on-insulator, gate and channel engineering in addition to gate oxide stack is presented.The electrostatic integrity and device capability of suppressing SCEs is investigated by deriving the potential distribution profile using the three dimensional Poisson’s equation along with suitable boundary conditions. The other device parameters like threshold voltage and subthreshold swing are produced from the surface potential model.The validity of the proposed structure is established by the close agreement among the results obtained from the analytical model and simulation results.
文摘An impact ionization MOSFET （IMOS） is evolved for overcoming the constraint of less than 60 mV/decade sub-threshold slope （SS） of conventional MOSFET at room temperature. In this work, first, the device performance of the p-type double gate impact ionization MOSFET （DG-IMOS） is optimized by adjusting the device design parameters. The adjusted parameters are ratio of gate and intrinsic length, gate dielectric thickness and gate work function. Secondly, the DMG （dual material gate） DG-IMOS is proposed and investigated. This DMG DG-IMOS is further optimized to obtain the best possible performance parameters. Simulation results reveal that DMG DG-IMOS when compared to DG-IMOS, shows better IoN, ION/IoFF ratio, and RF parameters. Results show that by properly tuning the lengths of two materials at a ratio of 1.5 in DMG DG-IMOS, optimized perform- ance is achieved including ION/IoFF ratio of 2.87 × 10^9 A/μm with/ON as 11.87 × 10^-4 A/μm and transconductance of 1.06× 10^-3 S/μm. It is analyzed that length of drain side material should be greater than the length of source side material to attain the higher transconductance in DMG DG-IMOS.
文摘The analog performance of gate misaligned dual material double gate junctionless transistor is demonstrated for the first time. The cases considered are where misalignment occurs towards source side and towards drain side. The analog performance parameters analyzed are： transconductance, output conductance, intrinsic gain and cut-off frequency. These figures of merits （FOMs） are compared with a dual material double gate inversion mode transistor under same gate misalignment condition. The impacts of different length of control gate （L 1） for a given gate length （L） are also studied and the optimum lengths La under misalignment condition to have better analog FOMs and high tolerance to misalignment are presented.
基金supported by the National Youth Science Foundation of China(No.61006064)the Natural Science Foundation of Education Office,Anhui Province(No.KJ2013A071)
文摘An analytical surface potential model for the single material double work function gate （SMDWG） MOSFET is developed based on the exact resultant solution of the two-dimensional Poisson equation. The model includes the effects of drain biases, gate oxide thickness, different combinations of S-gate and D-gate length and values of substrate doping concentration. More attention has been paid to seeking to explain the attributes of the SMDWG MOSFET, such as suppressing drain-induced barrier lowering （DIBL）, accelerating carrier drift velocity and device speed. The model is verified by comparison to the simulated results using the device simulator MEDICI. The accuracy of the results obtained using our analytical model is verified using numerical simulations. The model not only offers the physical insight into device physics but also provides the basic designing guideline for the device.
文摘In this paper, charge-plasma-based tunnel FET is proposed by employing dual material gate with hetero gate dielectric technique and it is named hetero-dielectric dual material gate doping-less TFET（HD_DMG_DLTFET）. It is compared with conventional doping-less TFET（DLTFET） and dual material gate doping-less TFET（DMG_DLTFET） on the basis of analog and RF performance. The HD_DMG_DLTFET provides better ON state current（I_（ON） =94 μA/ μm）, I_（ON）/I_（OFF）（≈1.36×10^（13））, point（≈3 mV/dec） and average subthreshold slope（AV-SSD40.40 mV/dec）. The proposed device offers low total gate capacitance（C_（gg）/ along with higher drive current. However, with a better transconductance（g_m） and cut-off frequency（f_T）, the HD_DMG_DLTFET can be a good candidate for RF circuitry. The early voltage（V_（EA）/ and output conductance（gd/ are also moderate for the proposed device with comparison to other devices and therefore can be a candidate for analog devices.From all these simulation results and their study, it is observed that HD_DMG_DLTFET has improved analog/RF performance compared to DLTFET and DMG_DLTFET.
