Gate drivers for high-voltage silicon carbide(SiC)converters require a reliable power supply with strong isolation and compact size.However,existing gate driver power supplies(GDPS)with the transformer structure make ...Gate drivers for high-voltage silicon carbide(SiC)converters require a reliable power supply with strong isolation and compact size.However,existing gate driver power supplies(GDPS)with the transformer structure make it difficult to enhance the isolation performance while keeping the small coupling capacitance and volume.This paper firstly presents a novel wireless GDPS with an improved Class-E inverter for high-voltage energy harvesting applications.The proposed design requires only one switch and reduces the input inductor significantly.Meanwhile,it solves the issue of harmful surge currents and maintains a zero-voltage-switching state when the load changes.Finally,a compact wireless GDPS prototype is developed and the insulation characteristics are studied.Results demonstrate that the proposed design achieves isolation voltage up to 17.7 kV with the smallest size volume and extra-low coupling capacitance of 1.83 pF.展开更多
Abstract： This paper presents results from an on-going research project on pressure tolerant power electronics at SINTEF Energy Research, Norway. The driving force for this research is to enable power electronic comp...Abstract： This paper presents results from an on-going research project on pressure tolerant power electronics at SINTEF Energy Research, Norway. The driving force for this research is to enable power electronic components to operate in pressurized dielectric environment. The intended application is the converters for operation down to 3,000 meters ocean depth, primarily for subsea oil and gas processing. The paper focuses on the needed modifications to a general purpose gate driver for IGBT （insulated gate bipolar transistors） that will give pressure tolerance. Adaptations and modifications of the individual driver components are presented.The results from preliminary testing are promising, which shows that the considered adaptations give feasible solutions.展开更多
New semiconductor materials offer several advantages for modern power systems,including low switching and conduction losses,excellent thermal conduction of a die,and high operation temperature.Avionics is one of the m...New semiconductor materials offer several advantages for modern power systems,including low switching and conduction losses,excellent thermal conduction of a die,and high operation temperature.Avionics is one of the main beneficiaries of the progress in power devices,as it enables more compact and lighter converters for future More Electrical Aircraft.However,these advancements also come with new challenges that must be addressed to avoid potentially dangerous situations and fully utilize the capabilities of fast SiC MOSFETs.One such challenge is the high drain voltage rate during the switching process,which leads to a significant injection of current into the gate circuit(crosstalk effect).This increased current injection increases the risk of shoot-through conduction and thermal runaway.Although preventive measures are well-known,they offer limited protection in the case of parallel MOSFET connections.Therefore,this paper considers crosstalk features for parallel MOSFET connections,such as parasitic inductance of gate driver trace and gate voltage distribution.A special model is proposed to predict the magnitude of induced gate voltage under different conditions considering the nonlinear behavior of the MOSFET reverse capacitance.A new clamp circuit with an individual low-inductance path for each parallel switch is also proposed to suppress the consequences of crosstalk.The modified circuit operates independently from the main gate driver circuit;therefore,it does not change the switching time and electromagnetic interference pattern of the inverter.The efficiency of the new gate driver is confirmed through simulation and experimental results.展开更多
When using traditional drive circuits,the enhancement-mode GaN(eGaN)HEMT will be affected by high switching speed characteristics and parasitic parameters leading to worse crosstalk problems.Currently,the existing cro...When using traditional drive circuits,the enhancement-mode GaN(eGaN)HEMT will be affected by high switching speed characteristics and parasitic parameters leading to worse crosstalk problems.Currently,the existing crosstalk suppression drive circuits often have the disadvantages of increased switching loss,control complexity,and overall electromagnetic interference(EMI).Therefore,this paper combines the driving loop impedance control and the active Miller clamp method to propose an improved active Miller clamp drive circuit.First,the crosstalk mechanism is analyzed,and the crosstalk voltage model is established.Through the crosstalk voltage evaluation platform,the influencing factors are evaluated experimentally.Then,the operating principle of the improved active Miller clamp drive circuit is discussed,and the optimized parameter design method is given.Finally,the effect of the improved active Miller clamp method for suppressing crosstalk is experimentally verified.The crosstalk voltage was suppressed from 3.5 V and-3.5 V to 1 V and-1.3 V,respectively,by the improved circuit.展开更多
With the increasing demand for high power density,and to meet extreme working conditions,research has been focused on inves-tigating the performance of power electronics devices at cryogenic temperatures.The aim of th...With the increasing demand for high power density,and to meet extreme working conditions,research has been focused on inves-tigating the performance of power electronics devices at cryogenic temperatures.The aim of this paper is to review the performance of power semiconductor devices,passive components,gate drivers,sensors,and eventually power electronics converters at cryogenic temperatures.By comparing the physical properties of semiconductor materials and the electrical performance of commercial power semiconductor devices,silicon carbide switches show obvious disadvantages due to the increased on-resistance and switching time at cryogenic temperature.In contrast,silicon and gallium nitride devices exhibit improved performance when tem-perature is decreased.The performance ceiling of power semiconductor devices can be influenced by gate drivers,within which the commercial alternatives show deteriorated performance at cryogenic temperature compared to room temperature.Moreover,options for voltage and current sense in cryogenic environments are justified.Based on the cryogenic performance of the various components afore-discussed,this paper ends by presenting an overview of the published converter,which are either partially or fully tested in a cryogenic environment.展开更多
This paper presents a fully customised integrated gate commutated thyristor(IGCT)gate driver monolithic integrated circuit(GDMIC),aiming to address the many shortcomings of traditional IGCT gate driver units composed ...This paper presents a fully customised integrated gate commutated thyristor(IGCT)gate driver monolithic integrated circuit(GDMIC),aiming to address the many shortcomings of traditional IGCT gate driver units composed of discrete components,such as the excessive number of components,low reliability,and complex development processes.The current-source driving characteristics of IGCTs pose significant technical challenges for developing fully customised integrated circuits(IC).The customised requirements of IGCT gate driver chips under various operating conditions are explored regarding functional module division,power sequencing,and chip parameter specifications.However,existing high-side(HS)driver methods exhibit limitations in functional monolithic integration and bipolar complementary metal-oxide-semiconductor compat-ibility.To address these challenges,a novel HS driving topology based on floating linear regulators is proposed.It can achieve synchronised control of multi-channel floating power transistors while supporting 100%duty cycle continuous conduction.The pro-posed GDMIC reduces the three independent HS power supplies to a single multiplexed topology,significantly decreasing circuit complexity.Experimental results validate the feasibility and performance of a 4-inch gate driver prototype based on IGCT current-source management IC,demonstrating significant advantages in reducing the number of components,enhancing device reliability,and simplifying development.The proposed GDMIC offers an innovative development path for future high-power IGCT drivers.展开更多
By integrating a temperature-adaptive function, an active gate driver (AGD) enhances the switching performance of silicon carbide (SiC) MOSFETs under varying temperature conditions. However, the lack of analytical exp...By integrating a temperature-adaptive function, an active gate driver (AGD) enhances the switching performance of silicon carbide (SiC) MOSFETs under varying temperature conditions. However, the lack of analytical expressions describing the coupling between AGD parameters and temperature variation limits the broader application of this method, particularly in SiC modules that exhibit complicated device transient behaviors. To address this challenge, a mathematical model of the transient behavior of an SiC module is developed to investigate the relationship among AGD parameters, junction temperature, and switching performance. The analysis reveals that the impact of temperature on switching performance is directly linked to the duration of each gate resistance. Accordingly, a temperature-adaptive AGD for SiC MOSFET modules is proposed. Online junction temperature monitoring is achieved using turn-on delay detection, and the duration of each gate’s driving resistance is dynamically adjusted. The proposed temperature-adaptive AGD is validated experimentally using a commercial 1.2 kV/560 A SiC MOSFET at 600 V/200 A. Experimental results across a temperature range of 20 ℃ to 100 ℃ demonstrate that electrical stress variation remains within 15%, while loss variation does not exceed 10%.展开更多
MOSFETs are widely used in power electronics converters.Due to the high di/dt and dv/dt of the MOSFET and parasitic parameters in the circuit,drain voltage spikes and oscillations will be generated during turn-off,whi...MOSFETs are widely used in power electronics converters.Due to the high di/dt and dv/dt of the MOSFET and parasitic parameters in the circuit,drain voltage spikes and oscillations will be generated during turn-off,which can affect the safety of the device and degrade the system's electromagnetic compatibility.This paper first studies the relationship between drain voltage spike and gate voltage during turn-off.Based on the effect of gate voltage on drain voltage spike,a new active gate driver that optimizes gate voltage is proposed.The proposed active gate driver detects the slope of the drain voltage and generates a positive pulse in the drain current fall phase to increase the gate voltage,thereby suppressing drain voltage spike and oscillation.In order to verify the effectiveness of the proposed active gate driver,a simulation circuit and an experimental platform are constructed and compared with the conventional gate driver.Simulation and experimental results show that the new active gate driver can effectively suppress the drain voltage spike and oscillation of MOSFETs,and can effectively reduce high-frequency EMI.展开更多
A p-type low-temperature poly-Si thin film transistors（LTPS TFTs） integrated gate driver using 2 nonoverlapped clocks is proposed.This gate driver features charge-sharing structure to turn off buffer TFT and suppres...A p-type low-temperature poly-Si thin film transistors（LTPS TFTs） integrated gate driver using 2 nonoverlapped clocks is proposed.This gate driver features charge-sharing structure to turn off buffer TFT and suppresses voltage feed-through effects.It is analyzed that the conventional gate driver suffers from waveform distortions due to voltage uncertainty of internal nodes for the initial period.The proposed charge-sharing structure also helps to suppress the unexpected pulses during the initialization phases.The proposed gate driver shows a simple circuit,as only 6 TFTs and 1 capacitor are used for single-stage,and the buffer TFT is used for both pulling-down and pulling-up of output electrode.Feasibility of the proposed gate driver is proven through detailed analyses.Investigations show that voltage bootrapping can be maintained once the bootrapping capacitance is larger than0.8 pF,and pulse of gate driver outputs can be reduced to 5μs.The proposed gate driver can still function properly with positive V（TH）shift within 0.4 V and negative V（TH） shift within-1.2 V and it is robust and promising for high-resolution display.展开更多
With high-frequency,low power dissipation and high-efficiency characteristics,Gallium nitride(GaN)power devices are of significant benefit in designing high-speed motor drives,as they improve performance and reduce we...With high-frequency,low power dissipation and high-efficiency characteristics,Gallium nitride(GaN)power devices are of significant benefit in designing high-speed motor drives,as they improve performance and reduce weight.However,due to the cascode structure,coupling with the parasitics in gate driver and power circuits,power converters based on cascode GaN are prone to overshoot and oscillate on switching waveforms,which may lead to serious EMC problems,or even device breakdown.The complicated structure of cascode GaN device makes the gate driver design comparatively complex.An analytical model of the switching process considering gate driver parameters is proposed in this article.The influence of gate driver parameters on switching behavior is investigated from the perspective of switching speed,waveform overshoot,and power loss.Trade-offs among overshoot,switching speed,and power loss are discussed;guidelines to design gate driver parameters are given.展开更多
A novel level shift circuit featuring with high dV/dt noise immunity and improved negative V_S capacity is proposed in this paper.Compared with the conventional structure,the proposed circuit adopting two cross-couple...A novel level shift circuit featuring with high dV/dt noise immunity and improved negative V_S capacity is proposed in this paper.Compared with the conventional structure,the proposed circuit adopting two cross-coupled PMOS transistors realizes the selective filtering ability by exploiting the path which filters out the noise introduced by the dV/dt.In addition,a differential noise cancellation circuit is proposed to enhance the noise immunity further.Meanwhile,the negative V_S capacity is improved by unifying the detected reference voltage and the logic block＇s threshold voltage.A high voltage half bridge gate drive IC adopting the presented structure is experimentally realized by using a usual 600 V BCD process and achieves the stable operation up to 65 V/ns of the dV/dt characteristics.展开更多
This paper introduces the concept of modular design methodology for hardware design and development of motor drives.The modular design process is first introduced separating the hardware development into three parts:c...This paper introduces the concept of modular design methodology for hardware design and development of motor drives.The modular design process is first introduced separating the hardware development into three parts:controller,mother board and phase-leg module.The control and circuit function can be decoupled from the phase-leg module development.The hardware update can be simplified with the phase-leg module development and verification.Two design examples are used to demonstrate this method:a DC-fed motor drive with Si IGBTs and an AC-fed motor drive with SiC devices.Design of DC-fed motor drive aims at developing the converter with customized IGBT package for high temperature.Experience with development of the converter with commercial IGBTs simplifies the process.As the AC-fed motor drive is a more complex topology using more advanced devices,the modular design method can simplify and improve the development especially for new packaged devices.Also,the modular design method can help to study the electromagnetic interference(EMI)issue for motor drives,which is presented with an extra design example.展开更多
Because it is magnet-free and can achieve a high integration level,the switched-capacitor(SC)converter acting as a direct current transformer has many promising applications in modern electronics.However,designing an ...Because it is magnet-free and can achieve a high integration level,the switched-capacitor(SC)converter acting as a direct current transformer has many promising applications in modern electronics.However,designing an SC converter with large current capability and high power efficiency is still challenging.This paper proposes a dual-branch SC voltage divider and presents its integrated circuit(IC)implementation.The designed SC converter is capable of driving large current load,thus widening the use of SC converters to high-power applications.This SC converter has a constant conversion ratio of 1/2 and its dual-branch interleaved operation ensures a continuous input current.An effective on-chip gate-driving method using a capacitively coupled floating-voltage level shifter is proposed to drive the all-NMOS power train.Due to the self-powered structure,the flying capacitor itself is also a bootstrap capacitor for gate driving and thus reduces the number of needed components.A digital frequency modulation method is adopted and the switching frequency decreases automatically at light load to improve light load efficiency.The converter IC is implemented using a 180 nm triple-well BCD process.Experimental results verify the effectiveness of the dual-branch interleaved operation and the self-powered gate-driving method.The proposed SC divider can drive up to 4 A load current with 5–12 V input voltage and its power efficiency is as high as 96.5%.At light load,using the proposed optimization method,the power efficiency is improved by 30%.展开更多
基金Chongqing Technological Innovation and Application Development Major Project,Grant/Award Number:CSTB2024TIAD-STX0024.
文摘Gate drivers for high-voltage silicon carbide(SiC)converters require a reliable power supply with strong isolation and compact size.However,existing gate driver power supplies(GDPS)with the transformer structure make it difficult to enhance the isolation performance while keeping the small coupling capacitance and volume.This paper firstly presents a novel wireless GDPS with an improved Class-E inverter for high-voltage energy harvesting applications.The proposed design requires only one switch and reduces the input inductor significantly.Meanwhile,it solves the issue of harmful surge currents and maintains a zero-voltage-switching state when the load changes.Finally,a compact wireless GDPS prototype is developed and the insulation characteristics are studied.Results demonstrate that the proposed design achieves isolation voltage up to 17.7 kV with the smallest size volume and extra-low coupling capacitance of 1.83 pF.
文摘Abstract： This paper presents results from an on-going research project on pressure tolerant power electronics at SINTEF Energy Research, Norway. The driving force for this research is to enable power electronic components to operate in pressurized dielectric environment. The intended application is the converters for operation down to 3,000 meters ocean depth, primarily for subsea oil and gas processing. The paper focuses on the needed modifications to a general purpose gate driver for IGBT （insulated gate bipolar transistors） that will give pressure tolerance. Adaptations and modifications of the individual driver components are presented.The results from preliminary testing are promising, which shows that the considered adaptations give feasible solutions.
基金supported by Natural Science Foundation of China with grant No.52250610219the Ningbo National Science Foundation grant 2023J025。
文摘New semiconductor materials offer several advantages for modern power systems,including low switching and conduction losses,excellent thermal conduction of a die,and high operation temperature.Avionics is one of the main beneficiaries of the progress in power devices,as it enables more compact and lighter converters for future More Electrical Aircraft.However,these advancements also come with new challenges that must be addressed to avoid potentially dangerous situations and fully utilize the capabilities of fast SiC MOSFETs.One such challenge is the high drain voltage rate during the switching process,which leads to a significant injection of current into the gate circuit(crosstalk effect).This increased current injection increases the risk of shoot-through conduction and thermal runaway.Although preventive measures are well-known,they offer limited protection in the case of parallel MOSFET connections.Therefore,this paper considers crosstalk features for parallel MOSFET connections,such as parasitic inductance of gate driver trace and gate voltage distribution.A special model is proposed to predict the magnitude of induced gate voltage under different conditions considering the nonlinear behavior of the MOSFET reverse capacitance.A new clamp circuit with an individual low-inductance path for each parallel switch is also proposed to suppress the consequences of crosstalk.The modified circuit operates independently from the main gate driver circuit;therefore,it does not change the switching time and electromagnetic interference pattern of the inverter.The efficiency of the new gate driver is confirmed through simulation and experimental results.
基金supported by the Foundation of State Key Laboratory of Wide-Bandgap Semi-conductor Power Electronic Devices(No.2019KF001)National Natural Science Foundation of China(No.51677089)。
文摘When using traditional drive circuits,the enhancement-mode GaN(eGaN)HEMT will be affected by high switching speed characteristics and parasitic parameters leading to worse crosstalk problems.Currently,the existing crosstalk suppression drive circuits often have the disadvantages of increased switching loss,control complexity,and overall electromagnetic interference(EMI).Therefore,this paper combines the driving loop impedance control and the active Miller clamp method to propose an improved active Miller clamp drive circuit.First,the crosstalk mechanism is analyzed,and the crosstalk voltage model is established.Through the crosstalk voltage evaluation platform,the influencing factors are evaluated experimentally.Then,the operating principle of the improved active Miller clamp drive circuit is discussed,and the optimized parameter design method is given.Finally,the effect of the improved active Miller clamp method for suppressing crosstalk is experimentally verified.The crosstalk voltage was suppressed from 3.5 V and-3.5 V to 1 V and-1.3 V,respectively,by the improved circuit.
文摘With the increasing demand for high power density,and to meet extreme working conditions,research has been focused on inves-tigating the performance of power electronics devices at cryogenic temperatures.The aim of this paper is to review the performance of power semiconductor devices,passive components,gate drivers,sensors,and eventually power electronics converters at cryogenic temperatures.By comparing the physical properties of semiconductor materials and the electrical performance of commercial power semiconductor devices,silicon carbide switches show obvious disadvantages due to the increased on-resistance and switching time at cryogenic temperature.In contrast,silicon and gallium nitride devices exhibit improved performance when tem-perature is decreased.The performance ceiling of power semiconductor devices can be influenced by gate drivers,within which the commercial alternatives show deteriorated performance at cryogenic temperature compared to room temperature.Moreover,options for voltage and current sense in cryogenic environments are justified.Based on the cryogenic performance of the various components afore-discussed,this paper ends by presenting an overview of the published converter,which are either partially or fully tested in a cryogenic environment.
基金National Key Research and Development Program of China,Grant/Award Number:2021YFB2401604The Integration Projects of National Natural Science Foundation of China-State Grid Joint Fund for Smart Grid,Grant/Award Number:U2166602National Natural Science Foundation of China,Grant/Award Number:52241701。
文摘This paper presents a fully customised integrated gate commutated thyristor(IGCT)gate driver monolithic integrated circuit(GDMIC),aiming to address the many shortcomings of traditional IGCT gate driver units composed of discrete components,such as the excessive number of components,low reliability,and complex development processes.The current-source driving characteristics of IGCTs pose significant technical challenges for developing fully customised integrated circuits(IC).The customised requirements of IGCT gate driver chips under various operating conditions are explored regarding functional module division,power sequencing,and chip parameter specifications.However,existing high-side(HS)driver methods exhibit limitations in functional monolithic integration and bipolar complementary metal-oxide-semiconductor compat-ibility.To address these challenges,a novel HS driving topology based on floating linear regulators is proposed.It can achieve synchronised control of multi-channel floating power transistors while supporting 100%duty cycle continuous conduction.The pro-posed GDMIC reduces the three independent HS power supplies to a single multiplexed topology,significantly decreasing circuit complexity.Experimental results validate the feasibility and performance of a 4-inch gate driver prototype based on IGCT current-source management IC,demonstrating significant advantages in reducing the number of components,enhancing device reliability,and simplifying development.The proposed GDMIC offers an innovative development path for future high-power IGCT drivers.
基金Supported by the National Natural Science Foundation of China (52177199).
文摘By integrating a temperature-adaptive function, an active gate driver (AGD) enhances the switching performance of silicon carbide (SiC) MOSFETs under varying temperature conditions. However, the lack of analytical expressions describing the coupling between AGD parameters and temperature variation limits the broader application of this method, particularly in SiC modules that exhibit complicated device transient behaviors. To address this challenge, a mathematical model of the transient behavior of an SiC module is developed to investigate the relationship among AGD parameters, junction temperature, and switching performance. The analysis reveals that the impact of temperature on switching performance is directly linked to the duration of each gate resistance. Accordingly, a temperature-adaptive AGD for SiC MOSFET modules is proposed. Online junction temperature monitoring is achieved using turn-on delay detection, and the duration of each gate’s driving resistance is dynamically adjusted. The proposed temperature-adaptive AGD is validated experimentally using a commercial 1.2 kV/560 A SiC MOSFET at 600 V/200 A. Experimental results across a temperature range of 20 ℃ to 100 ℃ demonstrate that electrical stress variation remains within 15%, while loss variation does not exceed 10%.
基金Supported in part by the General Program of National Natural Science Foundation of China under Grant 51577010,51777012in part by the Fundamental Research Funds for the Central Universities under Grant 2017JBM054.
文摘MOSFETs are widely used in power electronics converters.Due to the high di/dt and dv/dt of the MOSFET and parasitic parameters in the circuit,drain voltage spikes and oscillations will be generated during turn-off,which can affect the safety of the device and degrade the system's electromagnetic compatibility.This paper first studies the relationship between drain voltage spike and gate voltage during turn-off.Based on the effect of gate voltage on drain voltage spike,a new active gate driver that optimizes gate voltage is proposed.The proposed active gate driver detects the slope of the drain voltage and generates a positive pulse in the drain current fall phase to increase the gate voltage,thereby suppressing drain voltage spike and oscillation.In order to verify the effectiveness of the proposed active gate driver,a simulation circuit and an experimental platform are constructed and compared with the conventional gate driver.Simulation and experimental results show that the new active gate driver can effectively suppress the drain voltage spike and oscillation of MOSFETs,and can effectively reduce high-frequency EMI.
基金Project supported by the Science and Technology Project of Hunan Province,China(No.2015JC3401)
文摘A p-type low-temperature poly-Si thin film transistors（LTPS TFTs） integrated gate driver using 2 nonoverlapped clocks is proposed.This gate driver features charge-sharing structure to turn off buffer TFT and suppresses voltage feed-through effects.It is analyzed that the conventional gate driver suffers from waveform distortions due to voltage uncertainty of internal nodes for the initial period.The proposed charge-sharing structure also helps to suppress the unexpected pulses during the initialization phases.The proposed gate driver shows a simple circuit,as only 6 TFTs and 1 capacitor are used for single-stage,and the buffer TFT is used for both pulling-down and pulling-up of output electrode.Feasibility of the proposed gate driver is proven through detailed analyses.Investigations show that voltage bootrapping can be maintained once the bootrapping capacitance is larger than0.8 pF,and pulse of gate driver outputs can be reduced to 5μs.The proposed gate driver can still function properly with positive V（TH）shift within 0.4 V and negative V（TH） shift within-1.2 V and it is robust and promising for high-resolution display.
基金supported in part by the National Natural Science Foundation of China(51707161).
文摘With high-frequency,low power dissipation and high-efficiency characteristics,Gallium nitride(GaN)power devices are of significant benefit in designing high-speed motor drives,as they improve performance and reduce weight.However,due to the cascode structure,coupling with the parasitics in gate driver and power circuits,power converters based on cascode GaN are prone to overshoot and oscillate on switching waveforms,which may lead to serious EMC problems,or even device breakdown.The complicated structure of cascode GaN device makes the gate driver design comparatively complex.An analytical model of the switching process considering gate driver parameters is proposed in this article.The influence of gate driver parameters on switching behavior is investigated from the perspective of switching speed,waveform overshoot,and power loss.Trade-offs among overshoot,switching speed,and power loss are discussed;guidelines to design gate driver parameters are given.
文摘A novel level shift circuit featuring with high dV/dt noise immunity and improved negative V_S capacity is proposed in this paper.Compared with the conventional structure,the proposed circuit adopting two cross-coupled PMOS transistors realizes the selective filtering ability by exploiting the path which filters out the noise introduced by the dV/dt.In addition,a differential noise cancellation circuit is proposed to enhance the noise immunity further.Meanwhile,the negative V_S capacity is improved by unifying the detected reference voltage and the logic block＇s threshold voltage.A high voltage half bridge gate drive IC adopting the presented structure is experimentally realized by using a usual 600 V BCD process and achieves the stable operation up to 65 V/ns of the dV/dt characteristics.
基金Supported by the National Science Foundation of China(51607077).
文摘This paper introduces the concept of modular design methodology for hardware design and development of motor drives.The modular design process is first introduced separating the hardware development into three parts:controller,mother board and phase-leg module.The control and circuit function can be decoupled from the phase-leg module development.The hardware update can be simplified with the phase-leg module development and verification.Two design examples are used to demonstrate this method:a DC-fed motor drive with Si IGBTs and an AC-fed motor drive with SiC devices.Design of DC-fed motor drive aims at developing the converter with customized IGBT package for high temperature.Experience with development of the converter with commercial IGBTs simplifies the process.As the AC-fed motor drive is a more complex topology using more advanced devices,the modular design method can simplify and improve the development especially for new packaged devices.Also,the modular design method can help to study the electromagnetic interference(EMI)issue for motor drives,which is presented with an extra design example.
基金supported by the Zhejiang Provincial Natural Science Foundation of China(No.LY18F040001)。
文摘Because it is magnet-free and can achieve a high integration level,the switched-capacitor(SC)converter acting as a direct current transformer has many promising applications in modern electronics.However,designing an SC converter with large current capability and high power efficiency is still challenging.This paper proposes a dual-branch SC voltage divider and presents its integrated circuit(IC)implementation.The designed SC converter is capable of driving large current load,thus widening the use of SC converters to high-power applications.This SC converter has a constant conversion ratio of 1/2 and its dual-branch interleaved operation ensures a continuous input current.An effective on-chip gate-driving method using a capacitively coupled floating-voltage level shifter is proposed to drive the all-NMOS power train.Due to the self-powered structure,the flying capacitor itself is also a bootstrap capacitor for gate driving and thus reduces the number of needed components.A digital frequency modulation method is adopted and the switching frequency decreases automatically at light load to improve light load efficiency.The converter IC is implemented using a 180 nm triple-well BCD process.Experimental results verify the effectiveness of the dual-branch interleaved operation and the self-powered gate-driving method.The proposed SC divider can drive up to 4 A load current with 5–12 V input voltage and its power efficiency is as high as 96.5%.At light load,using the proposed optimization method,the power efficiency is improved by 30%.
