Abstract： This paper presents results from an on-going research project on pressure tolerant power electronics at SINTEF Energy Research, Norway. The driving force for this research is to enable power electronic comp...Abstract： This paper presents results from an on-going research project on pressure tolerant power electronics at SINTEF Energy Research, Norway. The driving force for this research is to enable power electronic components to operate in pressurized dielectric environment. The intended application is the converters for operation down to 3,000 meters ocean depth, primarily for subsea oil and gas processing. The paper focuses on the needed modifications to a general purpose gate driver for IGBT （insulated gate bipolar transistors） that will give pressure tolerance. Adaptations and modifications of the individual driver components are presented.The results from preliminary testing are promising, which shows that the considered adaptations give feasible solutions.展开更多
New semiconductor materials offer several advantages for modern power systems,including low switching and conduction losses,excellent thermal conduction of a die,and high operation temperature.Avionics is one of the m...New semiconductor materials offer several advantages for modern power systems,including low switching and conduction losses,excellent thermal conduction of a die,and high operation temperature.Avionics is one of the main beneficiaries of the progress in power devices,as it enables more compact and lighter converters for future More Electrical Aircraft.However,these advancements also come with new challenges that must be addressed to avoid potentially dangerous situations and fully utilize the capabilities of fast SiC MOSFETs.One such challenge is the high drain voltage rate during the switching process,which leads to a significant injection of current into the gate circuit(crosstalk effect).This increased current injection increases the risk of shoot-through conduction and thermal runaway.Although preventive measures are well-known,they offer limited protection in the case of parallel MOSFET connections.Therefore,this paper considers crosstalk features for parallel MOSFET connections,such as parasitic inductance of gate driver trace and gate voltage distribution.A special model is proposed to predict the magnitude of induced gate voltage under different conditions considering the nonlinear behavior of the MOSFET reverse capacitance.A new clamp circuit with an individual low-inductance path for each parallel switch is also proposed to suppress the consequences of crosstalk.The modified circuit operates independently from the main gate driver circuit;therefore,it does not change the switching time and electromagnetic interference pattern of the inverter.The efficiency of the new gate driver is confirmed through simulation and experimental results.展开更多
Gate drivers for high-voltage silicon carbide(SiC)converters require a reliable power supply with strong isolation and compact size.However,existing gate driver power supplies(GDPS)with the transformer structure make ...Gate drivers for high-voltage silicon carbide(SiC)converters require a reliable power supply with strong isolation and compact size.However,existing gate driver power supplies(GDPS)with the transformer structure make it difficult to enhance the isolation performance while keeping the small coupling capacitance and volume.This paper firstly presents a novel wireless GDPS with an improved Class-E inverter for high-voltage energy harvesting applications.The proposed design requires only one switch and reduces the input inductor significantly.Meanwhile,it solves the issue of harmful surge currents and maintains a zero-voltage-switching state when the load changes.Finally,a compact wireless GDPS prototype is developed and the insulation characteristics are studied.Results demonstrate that the proposed design achieves isolation voltage up to 17.7 kV with the smallest size volume and extra-low coupling capacitance of 1.83 pF.展开更多
This paper presents a fully customised integrated gate commutated thyristor(IGCT)gate driver monolithic integrated circuit(GDMIC),aiming to address the many shortcomings of traditional IGCT gate driver units composed ...This paper presents a fully customised integrated gate commutated thyristor(IGCT)gate driver monolithic integrated circuit(GDMIC),aiming to address the many shortcomings of traditional IGCT gate driver units composed of discrete components,such as the excessive number of components,low reliability,and complex development processes.The current-source driving characteristics of IGCTs pose significant technical challenges for developing fully customised integrated circuits(IC).The customised requirements of IGCT gate driver chips under various operating conditions are explored regarding functional module division,power sequencing,and chip parameter specifications.However,existing high-side(HS)driver methods exhibit limitations in functional monolithic integration and bipolar complementary metal-oxide-semiconductor compat-ibility.To address these challenges,a novel HS driving topology based on floating linear regulators is proposed.It can achieve synchronised control of multi-channel floating power transistors while supporting 100%duty cycle continuous conduction.The pro-posed GDMIC reduces the three independent HS power supplies to a single multiplexed topology,significantly decreasing circuit complexity.Experimental results validate the feasibility and performance of a 4-inch gate driver prototype based on IGCT current-source management IC,demonstrating significant advantages in reducing the number of components,enhancing device reliability,and simplifying development.The proposed GDMIC offers an innovative development path for future high-power IGCT drivers.展开更多
By integrating a temperature-adaptive function, an active gate driver (AGD) enhances the switching performance of silicon carbide (SiC) MOSFETs under varying temperature conditions. However, the lack of analytical exp...By integrating a temperature-adaptive function, an active gate driver (AGD) enhances the switching performance of silicon carbide (SiC) MOSFETs under varying temperature conditions. However, the lack of analytical expressions describing the coupling between AGD parameters and temperature variation limits the broader application of this method, particularly in SiC modules that exhibit complicated device transient behaviors. To address this challenge, a mathematical model of the transient behavior of an SiC module is developed to investigate the relationship among AGD parameters, junction temperature, and switching performance. The analysis reveals that the impact of temperature on switching performance is directly linked to the duration of each gate resistance. Accordingly, a temperature-adaptive AGD for SiC MOSFET modules is proposed. Online junction temperature monitoring is achieved using turn-on delay detection, and the duration of each gate’s driving resistance is dynamically adjusted. The proposed temperature-adaptive AGD is validated experimentally using a commercial 1.2 kV/560 A SiC MOSFET at 600 V/200 A. Experimental results across a temperature range of 20 ℃ to 100 ℃ demonstrate that electrical stress variation remains within 15%, while loss variation does not exceed 10%.展开更多
A p-type low-temperature poly-Si thin film transistors（LTPS TFTs） integrated gate driver using 2 nonoverlapped clocks is proposed.This gate driver features charge-sharing structure to turn off buffer TFT and suppres...A p-type low-temperature poly-Si thin film transistors（LTPS TFTs） integrated gate driver using 2 nonoverlapped clocks is proposed.This gate driver features charge-sharing structure to turn off buffer TFT and suppresses voltage feed-through effects.It is analyzed that the conventional gate driver suffers from waveform distortions due to voltage uncertainty of internal nodes for the initial period.The proposed charge-sharing structure also helps to suppress the unexpected pulses during the initialization phases.The proposed gate driver shows a simple circuit,as only 6 TFTs and 1 capacitor are used for single-stage,and the buffer TFT is used for both pulling-down and pulling-up of output electrode.Feasibility of the proposed gate driver is proven through detailed analyses.Investigations show that voltage bootrapping can be maintained once the bootrapping capacitance is larger than0.8 pF,and pulse of gate driver outputs can be reduced to 5μs.The proposed gate driver can still function properly with positive V（TH）shift within 0.4 V and negative V（TH） shift within-1.2 V and it is robust and promising for high-resolution display.展开更多
MOSFETs are widely used in power electronics converters.Due to the high di/dt and dv/dt of the MOSFET and parasitic parameters in the circuit,drain voltage spikes and oscillations will be generated during turn-off,whi...MOSFETs are widely used in power electronics converters.Due to the high di/dt and dv/dt of the MOSFET and parasitic parameters in the circuit,drain voltage spikes and oscillations will be generated during turn-off,which can affect the safety of the device and degrade the system's electromagnetic compatibility.This paper first studies the relationship between drain voltage spike and gate voltage during turn-off.Based on the effect of gate voltage on drain voltage spike,a new active gate driver that optimizes gate voltage is proposed.The proposed active gate driver detects the slope of the drain voltage and generates a positive pulse in the drain current fall phase to increase the gate voltage,thereby suppressing drain voltage spike and oscillation.In order to verify the effectiveness of the proposed active gate driver,a simulation circuit and an experimental platform are constructed and compared with the conventional gate driver.Simulation and experimental results show that the new active gate driver can effectively suppress the drain voltage spike and oscillation of MOSFETs,and can effectively reduce high-frequency EMI.展开更多
With high-frequency,low power dissipation and high-efficiency characteristics,Gallium nitride(GaN)power devices are of significant benefit in designing high-speed motor drives,as they improve performance and reduce we...With high-frequency,low power dissipation and high-efficiency characteristics,Gallium nitride(GaN)power devices are of significant benefit in designing high-speed motor drives,as they improve performance and reduce weight.However,due to the cascode structure,coupling with the parasitics in gate driver and power circuits,power converters based on cascode GaN are prone to overshoot and oscillate on switching waveforms,which may lead to serious EMC problems,or even device breakdown.The complicated structure of cascode GaN device makes the gate driver design comparatively complex.An analytical model of the switching process considering gate driver parameters is proposed in this article.The influence of gate driver parameters on switching behavior is investigated from the perspective of switching speed,waveform overshoot,and power loss.Trade-offs among overshoot,switching speed,and power loss are discussed;guidelines to design gate driver parameters are given.展开更多
This paper presents the implementation of an embedded automotive system that detects and recognizes traffic signs within a video stream. In addition, it discusses the recent advances in driver assistance technologies ...This paper presents the implementation of an embedded automotive system that detects and recognizes traffic signs within a video stream. In addition, it discusses the recent advances in driver assistance technologies and highlights the safety motivations for smart in-car embedded systems. An algorithm is presented that processes RGB image data, extracts relevant pixels, filters the image, labels prospective traffic signs and evaluates them against template traffic sign images. A reconfigurable hardware system is described which uses the Virtex-5 Xilinx FPGA and hardware/software co-design tools in order to create an embedded processor and the necessary hardware IP peripherals. The implementation is shown to have robust performance results, both in terms of timing and accuracy.展开更多
文摘Abstract： This paper presents results from an on-going research project on pressure tolerant power electronics at SINTEF Energy Research, Norway. The driving force for this research is to enable power electronic components to operate in pressurized dielectric environment. The intended application is the converters for operation down to 3,000 meters ocean depth, primarily for subsea oil and gas processing. The paper focuses on the needed modifications to a general purpose gate driver for IGBT （insulated gate bipolar transistors） that will give pressure tolerance. Adaptations and modifications of the individual driver components are presented.The results from preliminary testing are promising, which shows that the considered adaptations give feasible solutions.
基金supported by Natural Science Foundation of China with grant No.52250610219the Ningbo National Science Foundation grant 2023J025。
文摘New semiconductor materials offer several advantages for modern power systems,including low switching and conduction losses,excellent thermal conduction of a die,and high operation temperature.Avionics is one of the main beneficiaries of the progress in power devices,as it enables more compact and lighter converters for future More Electrical Aircraft.However,these advancements also come with new challenges that must be addressed to avoid potentially dangerous situations and fully utilize the capabilities of fast SiC MOSFETs.One such challenge is the high drain voltage rate during the switching process,which leads to a significant injection of current into the gate circuit(crosstalk effect).This increased current injection increases the risk of shoot-through conduction and thermal runaway.Although preventive measures are well-known,they offer limited protection in the case of parallel MOSFET connections.Therefore,this paper considers crosstalk features for parallel MOSFET connections,such as parasitic inductance of gate driver trace and gate voltage distribution.A special model is proposed to predict the magnitude of induced gate voltage under different conditions considering the nonlinear behavior of the MOSFET reverse capacitance.A new clamp circuit with an individual low-inductance path for each parallel switch is also proposed to suppress the consequences of crosstalk.The modified circuit operates independently from the main gate driver circuit;therefore,it does not change the switching time and electromagnetic interference pattern of the inverter.The efficiency of the new gate driver is confirmed through simulation and experimental results.
基金Chongqing Technological Innovation and Application Development Major Project,Grant/Award Number:CSTB2024TIAD-STX0024.
文摘Gate drivers for high-voltage silicon carbide(SiC)converters require a reliable power supply with strong isolation and compact size.However,existing gate driver power supplies(GDPS)with the transformer structure make it difficult to enhance the isolation performance while keeping the small coupling capacitance and volume.This paper firstly presents a novel wireless GDPS with an improved Class-E inverter for high-voltage energy harvesting applications.The proposed design requires only one switch and reduces the input inductor significantly.Meanwhile,it solves the issue of harmful surge currents and maintains a zero-voltage-switching state when the load changes.Finally,a compact wireless GDPS prototype is developed and the insulation characteristics are studied.Results demonstrate that the proposed design achieves isolation voltage up to 17.7 kV with the smallest size volume and extra-low coupling capacitance of 1.83 pF.
基金National Key Research and Development Program of China,Grant/Award Number:2021YFB2401604The Integration Projects of National Natural Science Foundation of China-State Grid Joint Fund for Smart Grid,Grant/Award Number:U2166602National Natural Science Foundation of China,Grant/Award Number:52241701。
文摘This paper presents a fully customised integrated gate commutated thyristor(IGCT)gate driver monolithic integrated circuit(GDMIC),aiming to address the many shortcomings of traditional IGCT gate driver units composed of discrete components,such as the excessive number of components,low reliability,and complex development processes.The current-source driving characteristics of IGCTs pose significant technical challenges for developing fully customised integrated circuits(IC).The customised requirements of IGCT gate driver chips under various operating conditions are explored regarding functional module division,power sequencing,and chip parameter specifications.However,existing high-side(HS)driver methods exhibit limitations in functional monolithic integration and bipolar complementary metal-oxide-semiconductor compat-ibility.To address these challenges,a novel HS driving topology based on floating linear regulators is proposed.It can achieve synchronised control of multi-channel floating power transistors while supporting 100%duty cycle continuous conduction.The pro-posed GDMIC reduces the three independent HS power supplies to a single multiplexed topology,significantly decreasing circuit complexity.Experimental results validate the feasibility and performance of a 4-inch gate driver prototype based on IGCT current-source management IC,demonstrating significant advantages in reducing the number of components,enhancing device reliability,and simplifying development.The proposed GDMIC offers an innovative development path for future high-power IGCT drivers.
基金Supported by the National Natural Science Foundation of China (52177199).
文摘By integrating a temperature-adaptive function, an active gate driver (AGD) enhances the switching performance of silicon carbide (SiC) MOSFETs under varying temperature conditions. However, the lack of analytical expressions describing the coupling between AGD parameters and temperature variation limits the broader application of this method, particularly in SiC modules that exhibit complicated device transient behaviors. To address this challenge, a mathematical model of the transient behavior of an SiC module is developed to investigate the relationship among AGD parameters, junction temperature, and switching performance. The analysis reveals that the impact of temperature on switching performance is directly linked to the duration of each gate resistance. Accordingly, a temperature-adaptive AGD for SiC MOSFET modules is proposed. Online junction temperature monitoring is achieved using turn-on delay detection, and the duration of each gate’s driving resistance is dynamically adjusted. The proposed temperature-adaptive AGD is validated experimentally using a commercial 1.2 kV/560 A SiC MOSFET at 600 V/200 A. Experimental results across a temperature range of 20 ℃ to 100 ℃ demonstrate that electrical stress variation remains within 15%, while loss variation does not exceed 10%.
基金Project supported by the Science and Technology Project of Hunan Province,China(No.2015JC3401)
文摘A p-type low-temperature poly-Si thin film transistors（LTPS TFTs） integrated gate driver using 2 nonoverlapped clocks is proposed.This gate driver features charge-sharing structure to turn off buffer TFT and suppresses voltage feed-through effects.It is analyzed that the conventional gate driver suffers from waveform distortions due to voltage uncertainty of internal nodes for the initial period.The proposed charge-sharing structure also helps to suppress the unexpected pulses during the initialization phases.The proposed gate driver shows a simple circuit,as only 6 TFTs and 1 capacitor are used for single-stage,and the buffer TFT is used for both pulling-down and pulling-up of output electrode.Feasibility of the proposed gate driver is proven through detailed analyses.Investigations show that voltage bootrapping can be maintained once the bootrapping capacitance is larger than0.8 pF,and pulse of gate driver outputs can be reduced to 5μs.The proposed gate driver can still function properly with positive V（TH）shift within 0.4 V and negative V（TH） shift within-1.2 V and it is robust and promising for high-resolution display.
基金Supported in part by the General Program of National Natural Science Foundation of China under Grant 51577010,51777012in part by the Fundamental Research Funds for the Central Universities under Grant 2017JBM054.
文摘MOSFETs are widely used in power electronics converters.Due to the high di/dt and dv/dt of the MOSFET and parasitic parameters in the circuit,drain voltage spikes and oscillations will be generated during turn-off,which can affect the safety of the device and degrade the system's electromagnetic compatibility.This paper first studies the relationship between drain voltage spike and gate voltage during turn-off.Based on the effect of gate voltage on drain voltage spike,a new active gate driver that optimizes gate voltage is proposed.The proposed active gate driver detects the slope of the drain voltage and generates a positive pulse in the drain current fall phase to increase the gate voltage,thereby suppressing drain voltage spike and oscillation.In order to verify the effectiveness of the proposed active gate driver,a simulation circuit and an experimental platform are constructed and compared with the conventional gate driver.Simulation and experimental results show that the new active gate driver can effectively suppress the drain voltage spike and oscillation of MOSFETs,and can effectively reduce high-frequency EMI.
基金supported in part by the National Natural Science Foundation of China(51707161).
文摘With high-frequency,low power dissipation and high-efficiency characteristics,Gallium nitride(GaN)power devices are of significant benefit in designing high-speed motor drives,as they improve performance and reduce weight.However,due to the cascode structure,coupling with the parasitics in gate driver and power circuits,power converters based on cascode GaN are prone to overshoot and oscillate on switching waveforms,which may lead to serious EMC problems,or even device breakdown.The complicated structure of cascode GaN device makes the gate driver design comparatively complex.An analytical model of the switching process considering gate driver parameters is proposed in this article.The influence of gate driver parameters on switching behavior is investigated from the perspective of switching speed,waveform overshoot,and power loss.Trade-offs among overshoot,switching speed,and power loss are discussed;guidelines to design gate driver parameters are given.
文摘This paper presents the implementation of an embedded automotive system that detects and recognizes traffic signs within a video stream. In addition, it discusses the recent advances in driver assistance technologies and highlights the safety motivations for smart in-car embedded systems. An algorithm is presented that processes RGB image data, extracts relevant pixels, filters the image, labels prospective traffic signs and evaluates them against template traffic sign images. A reconfigurable hardware system is described which uses the Virtex-5 Xilinx FPGA and hardware/software co-design tools in order to create an embedded processor and the necessary hardware IP peripherals. The implementation is shown to have robust performance results, both in terms of timing and accuracy.
