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基于FPGA的永磁同步电机零计算延迟扩张控制集模型预测电流控制 被引量:2
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作者 杨辰宇 刘凯 +1 位作者 胡铭觐 花为 《中国电机工程学报》 EI CSCD 北大核心 2024年第S01期264-273,共10页
该文基于现场可编程门阵列(field-programmable gate array,FPGA),为永磁同步电机驱动提出一种扩张控制集模型预测电流控制策略(model predictive current control,MPCC)。由于在每个控制周期内只有8个基本电压矢量可供选择,传统有限控... 该文基于现场可编程门阵列(field-programmable gate array,FPGA),为永磁同步电机驱动提出一种扩张控制集模型预测电流控制策略(model predictive current control,MPCC)。由于在每个控制周期内只有8个基本电压矢量可供选择,传统有限控制集模型预测电流控制(finite control set MPCC,FCS-MPCC)稳态性能较低。为此,文中采用具有818个可选矢量的ECS来实现更精细的电压输出。为减轻因电压矢量大幅增加而带来的计算负担,设计一种简化的最优矢量搜索策略,且可推广用于其他多目标成本函数。基于算法固有并行性,将所提ECS-MPCC方法在FPGA中进行实现,使电流环总控制时间缩短至0.59μs,从而可以消除计算延迟,提高电流环动态性能。最后,通过仿真和实验,验证所提ECS-MPCC策略的有效性。实验结果表明,与传统FCS-MPCC相比,ECS-MPCC的相电流总谐波失真降低77%。 展开更多
关键词 模型预测控制 扩张控制集 零计算延迟 现场可编程门阵列实施 永磁同步电机
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A SWITCHED HYPERCHAOTIC SYSTEM AND ITS FPGA CIRCUITRY IMPLEMENTATION 被引量:1
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作者 Qi Aixue Zhang Chengliang Wang Honggang 《Journal of Electronics(China)》 2011年第3期383-388,共6页
This paper introduces a switched hyperchaotic system that changes its behavior randomly from one subsystem to another via two switch functions, and its characteristics of symmetry, dissipation, equilibrium, bifurcatio... This paper introduces a switched hyperchaotic system that changes its behavior randomly from one subsystem to another via two switch functions, and its characteristics of symmetry, dissipation, equilibrium, bifurcation diagram, basic dynamics have been analyzed. The hardware implementation of the system is based on Field Programmable Gate Array (FPGA). It is shown that the experimental results are identical with numerical simulations, and the chaotic trajectories are much more complex. 展开更多
关键词 Chaotic sequence HYPERCHAOS Field Programmable gate array (fpga) circuitry implementation
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Machine learning algorithm partially reconfigured on FPGA for an image edge detection system 被引量:1
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作者 Gracieth Cavalcanti Batista Johnny Oberg +3 位作者 Osamu Saotome Haroldo F.de Campos Velho Elcio Hideiti Shiguemori Ingemar Soderquist 《Journal of Electronic Science and Technology》 EI CAS CSCD 2024年第2期48-68,共21页
Unmanned aerial vehicles(UAVs)have been widely used in military,medical,wireless communications,aerial surveillance,etc.One key topic involving UAVs is pose estimation in autonomous navigation.A standard procedure for... Unmanned aerial vehicles(UAVs)have been widely used in military,medical,wireless communications,aerial surveillance,etc.One key topic involving UAVs is pose estimation in autonomous navigation.A standard procedure for this process is to combine inertial navigation system sensor information with the global navigation satellite system(GNSS)signal.However,some factors can interfere with the GNSS signal,such as ionospheric scintillation,jamming,or spoofing.One alternative method to avoid using the GNSS signal is to apply an image processing approach by matching UAV images with georeferenced images.But a high effort is required for image edge extraction.Here a support vector regression(SVR)model is proposed to reduce this computational load and processing time.The dynamic partial reconfiguration(DPR)of part of the SVR datapath is implemented to accelerate the process,reduce the area,and analyze its granularity by increasing the grain size of the reconfigurable region.Results show that the implementation in hardware is 68 times faster than that in software.This architecture with DPR also facilitates the low power consumption of 4 mW,leading to a reduction of 57%than that without DPR.This is also the lowest power consumption in current machine learning hardware implementations.Besides,the circuitry area is 41 times smaller.SVR with Gaussian kernel shows a success rate of 99.18%and minimum square error of 0.0146 for testing with the planning trajectory.This system is useful for adaptive applications where the user/designer can modify/reconfigure the hardware layout during its application,thus contributing to lower power consumption,smaller hardware area,and shorter execution time. 展开更多
关键词 Dynamic partial reconfiguration(DPR) Field programmable gate array(fpga)implementation Image edge detection Support vector regression(SVR) Unmanned aerial vehicle(UAV) pose estimation
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Exploring Dynamics and Hardware Implementation of an Enhanced 5D Hyperchaotic Memristive System Inspired by Sprott-C System
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作者 Abdulmajeed Abdullah Mohammed Mokbel Fei Yu +3 位作者 Yumba Musoya Gracia Bohong Tan Hairong Lin Herbert Ho-Ching Iu 《Complex System Modeling and Simulation》 2025年第1期34-45,共12页
This paper proposes a novel 5D hyperchaotic memristive system based on the Sprott-C system configuration,which greatly improves the complexity of the system to be used for secure communication and signal processing.A ... This paper proposes a novel 5D hyperchaotic memristive system based on the Sprott-C system configuration,which greatly improves the complexity of the system to be used for secure communication and signal processing.A critical aspect of this research work is the introduction of a flux-controlled memristor that exhibits chaotic behavior and dynamic responses of the system.To this respect,detailed mathematical modeling and numerical simulations about the stability of the system’s equilibria,bifurcations,and hyperchaotic dynamics were conducted and showed a very wide variety of behaviors of great potential in cryptographic applications and secure data transmission.Then,the flexibility and efficiency of the real-time operating environment were demonstrated,and the system was actually implemented on a field-programmable gate array(FPGA)hardware platform.A prototype that confirms the theoretical framework was presented,providing new insights for chaotic systems with practical significance.Finally,we conducted National Institute of Standards and Technology(NIST)testing on the proposed 5D hyperchaotic memristive system,and the results showed that the system has good randomness. 展开更多
关键词 Sprott-C system field-programmable gate array(fpga)implementation hyperchaotic system MEMRISTOR numerical simulation
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Development of readout electronics for bunch arrival-time monitor system at SXFEL 被引量:3
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作者 Jin-Guo Wang Bo Liu 《Nuclear Science and Techniques》 SCIE CAS CSCD 2019年第5期113-121,共9页
A bunch arrival-time monitor(BAM) system,based on electro-optical intensity modulation scheme, is under study at Shanghai Soft X-ray Free Electron Laser.The aim of the study is to achieve high-precision time measureme... A bunch arrival-time monitor(BAM) system,based on electro-optical intensity modulation scheme, is under study at Shanghai Soft X-ray Free Electron Laser.The aim of the study is to achieve high-precision time measurement for minimizing bunch fluctuations. A readout electronics is developed to fulfill the requirements of the BAM system. The readout electronics is mainly composed of a signal conditioning circuit, field-programmable gate array(FPGA), mezzanine card(FMC150), and powerful FPGA carrier board. The signal conditioning circuit converts the laser pulses into electrical pulse signals using a photodiode. Thereafter, it performs splitting and low-noise amplification to achieve the best voltage sampling performance of the dual-channel analog-to-digital converter(ADC) in FMC150. The FMC150 ADC daughter card includes a 14-bit 250 Msps dual-channel high-speed ADC,a clock configuration, and a management module. The powerful FPGA carrier board is a commercial high-performance Xilinx Kintex-7 FPGA evaluation board. To achieve clock and data alignment for ADC data capture at a high sampling rate, we used ISERDES, IDELAY, and dedicated carry-in resources in the Kintex-7 FPGA. This paper presents a detailed development of the readout electronics in the BAM system and its performance. 展开更多
关键词 BUNCH arrival-time monitor (BAM) SHANGHAI Soft X-ray Free Electron Laser (SXFEL) fieldprogrammable gate array (fpga) Signal CONDITIONING High-speed analog-to-digital converter (ADC)
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Modular chaotification model with FPGA implementation 被引量:2
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作者 HUA Zhong Yun ZHOU BingHang +1 位作者 ZHANG YinXing ZHOU YiCong 《Science China(Technological Sciences)》 SCIE EI CAS CSCD 2021年第7期1472-1484,共13页
Chaotic systems are an effective tool for various applications, including information security and internet of things. Many chaotic systems may have the weaknesses of incomplete output distributions, discontinuous cha... Chaotic systems are an effective tool for various applications, including information security and internet of things. Many chaotic systems may have the weaknesses of incomplete output distributions, discontinuous chaotic regions, and simple chaotic behaviors.These may result in many negative influences in practical applications utilizing chaos. To deal with these issues, this study introduces a modular chaotification model(MCM) to increase the dynamic properties of current one-dimensional(1 D) chaotic maps. To exhibit the effect of the MCM, three 1 D chaotic maps are improved using the MCM as examples. Studies of the resulting properties show the robust and complex dynamics of these improved chaotic maps. Moreover, we implement these improved chaotic maps of MCM in a field-programmable gate array hardware platform and apply them to the application of PRNG. Performance analyses verify that these chaotic maps improved by the MCM have more complicated chaotic behaviors and wider chaotic ranges than the existing and several new chaotic maps. 展开更多
关键词 nonlinear system chaotic system field-programmable gate array(fpga) pseudorandom number generator(PRNG) hardware implementation
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A reordered first fit algorithm based novel storage scheme for parallel turbo decoder
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作者 张乐 贺翔 +1 位作者 徐友云 罗汉文 《Journal of Shanghai University(English Edition)》 CAS 2007年第4期380-384,共5页
In this paper we discuss a novel storage scheme for simultaneous memory access in parallel turbo decoder. The new scheme employs vertex coloring in graph theory. Compared to a similar method that also uses unnatural o... In this paper we discuss a novel storage scheme for simultaneous memory access in parallel turbo decoder. The new scheme employs vertex coloring in graph theory. Compared to a similar method that also uses unnatural order in storage, our scheme requires 25 more memory blocks but allows a simpler configuration for variable sizes of code lengths that can be implemented on-chip. Experiment shows that for a moderate to high decoding throughput (40-100 Mbps), the hardware cost is still affordable for 3GPP's (3rd generation partnership project) interleaver. 展开更多
关键词 turbo codes parallel turbo decoding INTERLEAVER vertex coloring reordered first fit algorithm (RFFA) fieldprogrammable gate array fpga).
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Beyond Pure Frequency and Phases Exploiting: Color Influence in SSVEP Based on BCl
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作者 Mustafa Aljshamee Mahdi Q. Mohammed Riaz-U1-Ahsan Choudhury Abbas Malekpour Peter Luksch 《Computer Technology and Application》 2014年第2期111-118,共8页
A BCI (brain computer interface) established a new direct communication channel using the brain activity between the human brain and machine. The visual stimulus with a certain frequency is present to the BCI users;... A BCI (brain computer interface) established a new direct communication channel using the brain activity between the human brain and machine. The visual stimulus with a certain frequency is present to the BCI users; it exists in a particular condition to observe a continuous brain response respect to frequent of visual stimuli. A significant problem when engaged the SSVEP (steady-state visual evoked potential) based on BCI, it will be exhausted and may suffer for the users when staring at flashing stimuli. This experimental study investigates how the differences in LED's-colors influence of SSVEP with respect to (i.e., frequencies and phases). The result shows that the visualization of phase delays in lower frequencies greater than in higher frequencies. 展开更多
关键词 SSVEP BCI EEG (electroencephalograms) FFT (fast fourier transform) ERP (event related potential) fpga fieldprogrammable gate array LED (light emitting diode).
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Optimized parallel architecture of evolutionary neural network for mass spectrometry data processing
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作者 Amin Jarrah Bashar Haddad +1 位作者 Mohammad A.Al-Jarrah Muhammad Bassam Obeidat 《International Journal of Modeling, Simulation, and Scientific Computing》 EI 2017年第1期231-257,共27页
Evolutionary neural network(ENN)shows high performance in function optimization and in finding approximately global optima from searching large and complex spaces.It is one of the most efficient and adaptive optimizat... Evolutionary neural network(ENN)shows high performance in function optimization and in finding approximately global optima from searching large and complex spaces.It is one of the most efficient and adaptive optimization techniques used widely to provide candidate solutions that lead to the fitness of the problem.ENN has the extraordinary ability to search the global and learning the approximate optimal solution regardless of the gradient information of the error functions.However,ENN requires high computation and processing which requires parallel processing platforms such as field programmable gate arrays(FPGAs)and graphic processing units(GPUs)to achieve a good performance.This work involves different new implementations of ENN by exploring and adopting different techniques and opportunities for parallel processing.Different versions of ENN algorithm have also been implemented and parallelized on FPGAs platform for low latency by exploiting the parallelism and pipelining approaches.Real data form mass spectrometry data(MSD)application was tested to examine and verify our implementations.This is a very important and extensive computation application which needs to search and find the optimal features(peaks)in MSD in order to distinguish cancer patients from control patients.ENN algorithm is also implemented and parallelized on single core and GPU platforms for comparison purposes.The computation time of our optimized algorithm on FPGA and GPU has been improved by a factor of 6.75 and 6,respectively. 展开更多
关键词 Genetic algorithm neural networks evolutionary neural network fieldprogrammable gate array(fpga) graphic processing unit(GPU) parallel architecture optimization techniques
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