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Design and Manufacture of Dual-gate DDSCR with High Failure Current and Holding Voltage
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作者 Xingtao Bao Yang Wang +1 位作者 Yujie Liu Xiangliang Jin 《Chinese Journal of Electrical Engineering》 EI CSCD 2024年第2期116-125,共10页
High-voltage controller area network(CAN)buses have a harsh working environment and require a robust electrostatic discharge(ESD)design window.Thus,ordinary silicon-controlled rectifier(SCR)devices do not satisfy thes... High-voltage controller area network(CAN)buses have a harsh working environment and require a robust electrostatic discharge(ESD)design window.Thus,ordinary silicon-controlled rectifier(SCR)devices do not satisfy these design requirements.To streamline the design and manufacturing of SCRs,this study proposes a novel dual-gate dual-direction SCR(DG-DDSCR)with a high failure current and holding voltage.First,four polysilicon gates,GateA1,GateA2,GateC1,and GateC2,were introduced to the N+and P+middle regions of the anode and cathode.When the voltage acts on the anode,the electric field generated by the polysilicon gate strengthens the SCR current path while promoting the release of ESD current in the substrate path.Specifically,the holding voltage of the DG-DDSCR and failure current derived from the test results of a transmission line pulse(TLP)are 29.4 V and 16.7 A,respectively.When the clamping voltage was 40 V,the transient current release of the structure can reach 11.61 A,which met the specifications of the CAN bus ESD window and was suitable for the ESD protection of the target application. 展开更多
关键词 High failure current high holding voltage CMOS technology dual-direction SCR gate controlled device
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Elimination of ESD Events and Optimizing Waterjet Deflash Process for Reduction of Leakage Current Failures on QFN-mr Leadframe Devices
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作者 Frederick Ray I.Gomez Tito T.Mangaoang Jr. 《Journal of Electrical Engineering》 2018年第4期238-243,共6页
This technical paper presents the resolution of high leakage current failures on QFN-mr (Quad-Flat No-leads Multi-Row) LF (leadframe) devices by optimizing the waterjet deflash process and eliminating the ESD (el... This technical paper presents the resolution of high leakage current failures on QFN-mr (Quad-Flat No-leads Multi-Row) LF (leadframe) devices by optimizing the waterjet deflash process and eliminating the ESD (electrostatic discharge) events. ESD damage to units can cause permanent or latent product failures which results in low final test yield, and worse, possible external customer complaints. The use of CO2 (carbon dioxide) bubbler was able to reduce the DI (deionized) water’s equivalent resistivity from 17 M? to 0.30 M?, minimizing the tribocharging effect produced during the waterjet deflash process. Moreover, ESD events were eliminated by grounding the floating assembly equipment parts and installing appropriate ESD controls. It is of high importance to reduce or eliminate the leakage current failures to ensure the product quality, especially as the market becomes more demanding. After the optimization and implementation of the corrective and improvement actions, high leakage current occurrence was significantly reduced from baseline of 5,784 ppm to 20 ppm. 展开更多
关键词 Leakage current failure ESD QFN-mr LF waterjet deflash process.
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The Effect of Extrogenous Phosphocreatine on L-type Calcium Current in Ischemic Guinea Pig Ventricular Myocytes
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作者 时向民 李天德 +2 位作者 杨庭树 王玉堂 单兆亮 《South China Journal of Cardiology》 CAS 2005年第2期72-76,共5页
Objectives Heart failure (HF) is one of the most common outcome for all kinds of heart diseases, the effects of energetic therapy on HF remains controversial, especially to ischemic HF. The aim of this study was to ... Objectives Heart failure (HF) is one of the most common outcome for all kinds of heart diseases, the effects of energetic therapy on HF remains controversial, especially to ischemic HF. The aim of this study was to explore the effect of exogenous phosphocreatine with different concentration on L-type calcium(I Cc-L) current in ischemic ventricular myocytes of guinea pig and to investigate its underlying electrophysiological mechanism for the treatment of ischemic HF. Methods Single ventricular myocytes were isolated enzymatically from left ventricle of guinea pig. Peak I Ca-L current were recorded using patch clamp techniques in the whole-cell configuration when myocytes had been superfused with normal Tyrode solution, simple ischemic solution, ischemic solution containing phosphocreatine with different concentration for 10 minutes respectively. Results Peak I Ca-L current density of myocytes superfused with simple simulated ischemic solution was remarkably inhibited by 80.6 ± 5.2% compared with myocytes superfused with normal Tyrode solution(P〈0.05). Ischemic solution containing phosphocreatine of 5, 10, 20, 30mmol/L inhibited Peak I Ca-L current density by (53.8±6.7)%, (41.8 ± 8.2)%, (38.1±7.4)%, (36.6±9.7)% respectively. There was no statistical significance among phosphocreation of 10, 20, 30 mmol / L. Conclusions Extrogenous phosphocreatine could reverse the inhibition of I Ca-L current under ischemic condition, which could be the ionic basis for the treatment of ischemic heart failure. 0-10 mmol/L phosphocreatine exerted significant dose-effect relationship which no longer existed as concentration more than 10 mmol/L. It is supposed that phosphocreatine increased I Ca-L current by many pathways rather than simple substrate for ATP synthesis. 展开更多
关键词 Patch clamp L-type calcium current Ischemia heart failure Phosphocreatine
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New DDSCR structure with high holding voltage for robust ESD applications 被引量:1
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作者 Zi-Jie Zhou Xiang-Liang Jin +1 位作者 Yang Wang Peng Dong 《Chinese Physics B》 SCIE EI CAS CSCD 2021年第3期529-539,共11页
A novel dual direction silicon-controlled rectifier(DDSCR)with an additional P-type doping and gate(APGDDSCR)is proposed and demonstrated.Compared with the conventional low-voltage trigger DDSCR(LVTDDSCR)that has posi... A novel dual direction silicon-controlled rectifier(DDSCR)with an additional P-type doping and gate(APGDDSCR)is proposed and demonstrated.Compared with the conventional low-voltage trigger DDSCR(LVTDDSCR)that has positive and negative holding voltages of 13.371 V and 14.038 V,respectively,the new DDSCR has high positive and negative holding voltages of 18.781 V and 18.912 V in a single finger device,respectively,and it exhibits suitable enough positive and negative holding voltages of 14.60 V and 14.319 V in a four-finger device for±12-V application.The failure current of APGDDSCR is almost the same as that of LVT-DDSCR in the single finger device,and the four-finger APGDDSCR can achieve positive and negative human-body model(HBM)protection capabilities of 22.281 kV and 23.45 kV,respectively,under 40-V voltage of core circuit failure,benefitting from the additional structure.The new structure can generate a snapback voltage on gate A to increase the current gain of the parasitic PNP in holding voltage.Thus,a sufficiently high holding voltage increased by the structure can ensure that a multi-finger device can also reach a sufficient holding voltage,it is equivalent to solving the non-uniform triggering problem of multi-finger device.The operating mechanism and the gate voltage are both discussed and verified in two-dimensional(2D)simulation and experiemnt. 展开更多
关键词 dual direction silicon-controlled rectifier(DDSCR) failure current snapback gate voltage simulation transmission line pulsing(TLP)
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High holding voltage SCR for robust electrostatic discharge protection
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作者 齐钊 乔明 +1 位作者 何逸涛 张波 《Chinese Physics B》 SCIE EI CAS CSCD 2017年第7期346-351,共6页
A novel silicon controlled rectifier(SCR) with high holding voltage(Vh) for electrostatic discharge(ESD) protection is proposed and investigated in this paper. The proposed SCR obtains high Vhby adding a long N... A novel silicon controlled rectifier(SCR) with high holding voltage(Vh) for electrostatic discharge(ESD) protection is proposed and investigated in this paper. The proposed SCR obtains high Vhby adding a long N+ layer(LN+) and a long P+ layer(LP+), which divide the conventional low voltage trigger silicon controlled rectifier(LVTSCR) into two SCRs(SCR1: P+/Nwell/Pwell/N+ and SCR2: P+/LN+/LP+/N+) with a shared emitter. Under the low ESD current(IESD), the two SCRs are turned on at the same time to induce the first snapback with high V_h(V_(h1)). As the IESDincreases, the SCR2 will be turned off because of its low current gain. Therefore, the IESDwill flow through the longer SCR1 path, bypassing SCR2, which induces the second snapback with high V_h(V_(h2)). The anti-latch-up ability of the proposed SCR for ESD protection is proved by a dynamic TLP-like(Transmission Line Pulse-like) simulation. An optimized V_(h2) of 7.4 V with a maximum failure current(I_(t2)) of 14.7 m A/μm is obtained by the simulation. 展开更多
关键词 electrostatic discharge holding voltage latch-up-free failure current
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New embedded DDSCR structure with high holding voltage and high robustness for 12-V applications
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作者 Jie-Yu Li Yang Wang +2 位作者 Dan-Dan Jia Wei-Peng Wei Peng Dong 《Chinese Physics B》 SCIE EI CAS CSCD 2020年第10期550-555,共6页
A new dual directional silicon-controlled rectifier based electrostatic discharge (ESD) protection device suitable for 12-V applications is proposed in this paper. The proposed device (NPEMDDSCR) is based on the embed... A new dual directional silicon-controlled rectifier based electrostatic discharge (ESD) protection device suitable for 12-V applications is proposed in this paper. The proposed device (NPEMDDSCR) is based on the embedded DDSCR (EMDDSCR) structure, in which the P+ electrode and P+ injection are removed from the inner finger. Compared with the conventional modified DDSCR (MDDSCR), its high holding voltage meets the requirements for applications. Compared with the embedded DDSCR (EMDDSCR), it has good conduction uniformity. The MDDSCR, EMDDSCR, and NPEMDDSCR are fabricated with an identical width in a 0.5-μm CDMOS process. In order to verify and predict the characteristics of the proposed ESD protection device, a transmission line pulse (TLP) testing system and a two-dimensional device simulation platform are used in this work. The measurements demonstrate that the NPEMDDSCR provides improved reliability and higher area efficiency for 12 V or similar applications. The measurement results also show that the NPEMDDSCR provides higher robustness and better latch-up immunity capability. 展开更多
关键词 DDSCR holding voltage failure current conduction uniformity
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Enhanced gated-diode-triggered silicon-controlled rectifier for robust electrostatic discharge (ESD) protection applications
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作者 Wenqiang Song Fei Hou +2 位作者 Feibo Du Zhiwei Liu Juin JLiou 《Chinese Physics B》 SCIE EI CAS CSCD 2020年第9期559-563,共5页
A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/2... A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/24-V BCD process. The proposed EGDTSCR is constructed by adding two gated diodes into a conventional ESD device called the modified lateral silicon-controlled rectifier (MLSCR). With the shunting effect of the surface gated diode path, the proposed EGDTSCR, with a width of 50 μm, exhibits a higher failure current (i.e., 3.82 A) as well as a higher holding voltage (i.e., 10.21 V) than the MLSCR. 展开更多
关键词 electrostatic discharge(ESD) enhanced gated-diode-triggered silicon-controlled rectifier(EGDTSCR) modified lateral silicon-controlled rectifier(MLSCR) failure current holding voltage
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