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Rubyphi:面向gem5的Cache一致性协议自动化模型检验
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作者 徐学政 方健 +4 位作者 梁少杰 王璐 黄安文 隋京高 李琼 《计算机工程与科学》 北大核心 2025年第7期1141-1151,共11页
Cache一致性协议是多核系统数据一致性的保障,也直接影响内存子系统的性能,一直是微处理器设计和验证的重点。Cache一致性协议的设计和优化通常需借助gem5等软件模拟器快速实现。同时,由于协议设计中存在的错误在仿真测试中具有难触发... Cache一致性协议是多核系统数据一致性的保障,也直接影响内存子系统的性能,一直是微处理器设计和验证的重点。Cache一致性协议的设计和优化通常需借助gem5等软件模拟器快速实现。同时,由于协议设计中存在的错误在仿真测试中具有难触发、难定位和难修复的特点,需借助Murphi等模型检验工具进行形式化验证。然而,基于模拟器的协议设计优化和基于模型检验的协议验证在编程语言和抽象层次上存在巨大差异,设计者需要分别进行模拟器实现和模型检验建模,这不仅增加了时间成本,也为二者的等价性带来了隐患。设计并实现了面向gem5模拟器的Cache一致性协议自动化模型检验方法Rubyphi,通过提取gem5中实现的协议,自动完成基于Murphi的模型检验建模,进而对协议进行形式化验证。实验表明,Rubyphi能够有效地完成gem5中一致性协议的建模和验证,并成功发现了2个gem5现有协议中存在的错误,相关问题和解决方案已得到社区确认。 展开更多
关键词 cache一致性协议 多核处理器 模型检验 形式化验证
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一种嵌入式微控制器的指令Cache设计方案
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作者 王睿 张艳花 《电子制作》 2025年第4期22-25,共4页
在传统的指令Cache设计方案中,VTag存储器大小取决于处理器的总线宽度以及指令Cache的Cache行数和Cache行大小。本文提出了一种优化指令Cache的电路设计,通过减小指令Cache覆盖的取指空间,在不影响指令Cache对外接口的总线宽度以及Cach... 在传统的指令Cache设计方案中,VTag存储器大小取决于处理器的总线宽度以及指令Cache的Cache行数和Cache行大小。本文提出了一种优化指令Cache的电路设计,通过减小指令Cache覆盖的取指空间,在不影响指令Cache对外接口的总线宽度以及Cache行数和Cache大小的情况下,进一步减小了VTag存储器的大小。本文用DC(Design Compiler)对指令Cache进行综合,结果表明,本文设计实现的指令Cache较传统方案在减少芯片面积的同时,显著提升了电路频率,对嵌入式微控制器的指令Cache设计具有重要的实用价值。 展开更多
关键词 嵌入式 微控制器 处理器 指令cache
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FlyCache:Recommendation-driven edge caching architecture for full life cycle of video streaming
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作者 Shaohua Cao Quancheng Zheng +4 位作者 Zijun Zhan Yansheng Yang Huaqi Lv Danyang Zheng Weishan Zhang 《Digital Communications and Networks》 2025年第4期961-973,共13页
With the rapid development of 5G technology,the proportion of video traffic on the Internet is increasing,bringing pressure on the network infrastructure.Edge computing technology provides a feasible solution for opti... With the rapid development of 5G technology,the proportion of video traffic on the Internet is increasing,bringing pressure on the network infrastructure.Edge computing technology provides a feasible solution for optimizing video content distribution.However,the limited edge node cache capacity and dynamic user requests make edge caching more complex.Therefore,we propose a recommendation-driven edge Caching network architecture for the Full life cycle of video streaming(FlyCache)designed to improve users’Quality of Experience(QoE)and reduce backhaul traffic consumption.FlyCache implements intelligent caching management across three key stages:before-playback,during-playback,and after-playback.Specifically,we introduce a cache placement policy for the before-playback stage,a dynamic prefetching and cache admission policy for the during-playback stage,and a progressive cache eviction policy for the after-playback stage.To validate the effectiveness of FlyCache,we developed a user behavior-driven edge caching simulation framework incorporating recommendation mechanisms.Experiments conducted on the MovieLens and synthetic datasets demonstrate that FlyCache outperforms other caching strategies in terms of byte hit rate,backhaul traffic,and delayed startup rate. 展开更多
关键词 Edge caching cache architecture cache placement cache admission caching eviction
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Superconductivity and band topology of double-layer honeycomb structure M_(2)N_(2)(M=Nb,Ta)
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作者 Jin-Han Tan Na Jiao +2 位作者 Meng-Meng Zheng Ping Zhang Hong-Yan Lu 《Chinese Physics B》 2025年第9期581-587,共7页
Two-dimensional double-layer honeycomb(DLHC)materials are known for their diverse physical properties,but superconductivity has been a notably absent characteristic in this structure.We address this gap by investigati... Two-dimensional double-layer honeycomb(DLHC)materials are known for their diverse physical properties,but superconductivity has been a notably absent characteristic in this structure.We address this gap by investigating M_(2)N_(2)(M=Nb,Ta)with DLHC structure using first-principles calculations.Our results show that M_(2)N_(2)are stable and metallic,exhibiting superconducting behavior.Specifically,Nb_(2)N_(2)and Ta_(2)N_(2)display superconducting transition temperatures of 6.8 K and 8.8 K,respectively.Their electron-phonon coupling is predominantly driven by the coupling between metal d-orbitals and low-frequency metal-dominated vibration modes.Interestingly,two compounds also exhibit non-trivial band topology.Thus,M_(2)N_(2)are promising platforms for studying the interplay between topology and superconductivity and fill the gap in superconductivity research for DLHC materials. 展开更多
关键词 first-principles calculations phonon-mediated superconductivity double-layer honeycomb structure band topology
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Age-Optimal Cached Distribution in the Satellite-Integrated Internet of Things via Cross-Slot Directed Graph
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作者 Hu Zhouyong Li Yue +1 位作者 Zhang Hanxu Yang Zhihua 《China Communications》 2025年第6期300-318,共19页
In the Satellite-integrated Internet of Things(S-IoT),data freshness in the time-sensitive scenarios could not be guaranteed over the timevarying topology with current distribution strategies aiming to reduce the tran... In the Satellite-integrated Internet of Things(S-IoT),data freshness in the time-sensitive scenarios could not be guaranteed over the timevarying topology with current distribution strategies aiming to reduce the transmission delay.To address this problem,in this paper,we propose an age-optimal caching distribution mechanism for the high-timeliness data collection in S-IoT by adopting a freshness metric,as called age of information(AoI)through the caching-based single-source multidestinations(SSMDs)transmission,namely Multi-AoI,with a well-designed cross-slot directed graph(CSG).With the proposed CSG,we make optimizations on the locations of cache nodes by solving a nonlinear integer programming problem on minimizing Multi-AoI.In particular,we put up forward three specific algorithms respectively for improving the Multi-AoI,i.e.,the minimum queuing delay algorithm(MQDA)based on node deviation from average level,the minimum propagation delay algorithm(MPDA)based on the node propagation delay reduction,and a delay balanced algorithm(DBA)based on node deviation from average level and propagation delay reduction.The simulation results show that the proposed mechanism can effectively improve the freshness of information compared with the random selection algorithm. 展开更多
关键词 age of information cached distribution satellite-integrated internet of things time-varying graph
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内存高效的持久性分布式文件系统客户端缓存DFS-Cache 被引量:4
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作者 倪瑞轩 蔡淼 叶保留 《计算机应用》 CSCD 北大核心 2024年第4期1172-1179,共8页
为了在数据密集型工作流下有效降低缓存碎片整理开销并提高缓存命中率,提出一种持久性分布式文件系统客户端缓存DFS-Cache(Distributed File System Cache)。DFS-Cache基于非易失性内存(NVM)设计实现,能够保证数据的持久性和崩溃一致性... 为了在数据密集型工作流下有效降低缓存碎片整理开销并提高缓存命中率,提出一种持久性分布式文件系统客户端缓存DFS-Cache(Distributed File System Cache)。DFS-Cache基于非易失性内存(NVM)设计实现,能够保证数据的持久性和崩溃一致性,并大幅减少冷启动时间。DFS-Cache包括基于虚拟内存重映射的缓存碎片整理机制和基于生存时间(TTL)的缓存空间管理策略。前者基于NVM可被内存控制器直接寻址的特性,动态修改虚拟地址和物理地址之间的映射关系,实现零拷贝的内存碎片整理;后者是一种冷热分离的分组管理策略,借助重映射的缓存碎片整理机制,提升缓存空间的管理效率。实验采用真实的Intel傲腾持久性内存设备,对比商用的分布式文件系统MooseFS和GlusterFS,采用Fio和Filebench等标准测试程序,DFS-Cache最高能提升5.73倍和1.89倍的系统吞吐量。 展开更多
关键词 非易失性内存 分布式文件系统 客户端缓存 缓存碎片整理 冷热数据分组 缓存设计
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多核处理器共享Cache的划分算法 被引量:1
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作者 吕海玉 罗广 +1 位作者 朱嘉炜 张凤登 《电子科技》 2024年第9期27-33,共7页
针对多核处理器性能优化问题,文中深入研究多核处理器上共享Cache的管理策略,提出了基于缓存时间公平性与吞吐率的共享Cache划分算法MT-FTP(Memory Time based Fair and Throughput Partitioning)。以公平性和吞吐率两个评价性指标建立... 针对多核处理器性能优化问题,文中深入研究多核处理器上共享Cache的管理策略,提出了基于缓存时间公平性与吞吐率的共享Cache划分算法MT-FTP(Memory Time based Fair and Throughput Partitioning)。以公平性和吞吐率两个评价性指标建立数学模型,并分析了算法的划分流程。仿真实验结果表明,MT-FTP算法在系统吞吐率方面表现较好,其平均IPC(Instructions Per Cycles)值比UCP(Use Case Point)算法高1.3%,比LRU(Least Recently Used)算法高11.6%。MT-FTP算法对应的系统平均公平性比LRU算法的系统平均公平性高17%,比UCP算法的平均公平性高16.5%。该算法实现了共享Cache划分公平性并兼顾了系统的吞吐率。 展开更多
关键词 片上多核处理器 内存墙 划分 公平性 吞吐率 共享cache 缓存时间 集成计算机
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Jet formation and penetration performance of a double-layer charge liner with chemically-deposited tungsten as the inner liner 被引量:3
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作者 Bihui Hong Wenbin Li +2 位作者 Yiming Li Zhiwei Guo Binyou Yan 《Defence Technology(防务技术)》 SCIE EI CAS CSCD 2024年第3期374-385,共12页
This paper proposes a type of double-layer charge liner fabricated using chemical vapor deposition(CVD)that has tungsten as its inner liner.The feasibility of this design was evaluated through penetration tests.Double... This paper proposes a type of double-layer charge liner fabricated using chemical vapor deposition(CVD)that has tungsten as its inner liner.The feasibility of this design was evaluated through penetration tests.Double-layer charge liners were fabricated by using CVD to deposit tungsten layers on the inner surfaces of pure T2 copper liners.The microstructures of the tungsten layers were analyzed using a scanning electron microscope(SEM).The feasibility analysis was carried out by pulsed X-rays,slug-retrieval test and static penetration tests.The shaped charge jet forming and penetration law of inner tungsten-coated double-layer liner were studied by numerical simulation method.The results showed that the double-layer liners could form well-shaped jets.The errors between the X-ray test results and the numerical results were within 11.07%.A slug-retrieval test was found that the retrieved slug was similar to a numerically simulated slug.Compared with the traditional pure copper shaped charge jet,the penetration depth of the double-layer shaped charge liner increased by 11.4% and>10.8% respectively.In summary,the test results are good,and the numerical simulation is in good agreement with the test,which verified the feasibility of using the CVD method to fabricate double-layer charge liners with a high-density and high-strength refractory metal as the inner liner. 展开更多
关键词 Shaped charge Chemical vapor deposition TUNGSTEN double-layer charge liner X-ray PENETRATION
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Discovery and Significance of the Triassic–Late Paleozoic Double-layered Basement in the Songliao Basin:Based on the Complete Coring Data from ICDP Borehole SK2 被引量:2
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作者 YANG Zhuolong WANG Pujun +2 位作者 GAO Youfeng GAO Chuancheng TANG Xin 《Acta Geologica Sinica(English Edition)》 SCIE CAS CSCD 2024年第S01期75-76,共2页
The Songliao Basin(SLB)covers an area of approximately 260,000 km2in northeastern Asia and preserves a continuous and complete Cretaceous terrestrial record(Wang et al.,2021).The region is the most important petrolife... The Songliao Basin(SLB)covers an area of approximately 260,000 km2in northeastern Asia and preserves a continuous and complete Cretaceous terrestrial record(Wang et al.,2021).The region is the most important petroliferous sedimentary basin in China because of its continual annual oil and gas equivalent production of tens of millions of tons(ca.220–440 million barrels per year)since 1959.The SLB was previously thought to have developed on Hercynian basement and accumulated continuous sedimentary deposits during the Late Jurassic and Cretaceous(Wan et al.,2013;Wang et al.,2016). 展开更多
关键词 double-layered basement ICDP Triassic and Paleozoic Songliao Basin
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Double-layered skeleton of Li alloy anchored on 3D metal foam enabling ultralong lifespan of Li anode under high rate 被引量:1
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作者 Chaohui Wei Zeyu Yao +7 位作者 Jin Ruan Zhicui Song Aijun Zhou Yingze Song Donghuang Wang Jicheng Jiang Xin Wang Jingze Li 《Chinese Chemical Letters》 SCIE CAS CSCD 2024年第3期479-485,共7页
The high specific capacity and low negative electrochemical potential of lithium metal anodes(LMAs),may allow the energy density threshold of Li metal batteries(LMBs)to be pushed higher.However,the existing detrimenta... The high specific capacity and low negative electrochemical potential of lithium metal anodes(LMAs),may allow the energy density threshold of Li metal batteries(LMBs)to be pushed higher.However,the existing detrimental issues,such as dendritic growth and volume expansion,have hindered the practical implementation of LMBs.Introducing three-dimensional frameworks(e.g.,copper and nickel foam),have been regarded as one of the fundamental strategies to reduce the local current density,aiming to extend the Sand'time.Nevertheless,the local environment far from the skeleton is almost the same as the typical plane Li,due to macroporous space of metal foam.Herein,we built a double-layered 3D current collector of Li alloy anchored on the metal foam,with micropores interconnected macropores,via a viable thermal infiltration and cooling strategy.Due to the excellent electronic and ionic conductivity coupled with favorable lithiophilicity,the Li alloy can effectively reduce the nucleation barrier and enhance the Li^(+)transportation rate,while the metal foam can role as the primary promotor to enlarge the surface area and buffer the dimensional variation.Synergistically,the Li composite anode with hierarchical structure of primary and secondary scaffolds realized the even deposition behavior and minimum volume expansion,outputting preeminent prolonged cycling performances under high rate. 展开更多
关键词 double-layered skeleton Li alloy 3D Metal foam Ultralong lifespan Lithium metal batteries High rate
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Graph4Cache:一种用于缓存预取的图神经网络模型 被引量:1
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作者 尚晶 武智晖 +1 位作者 肖智文 张逸飞 《计算机研究与发展》 EI CSCD 北大核心 2024年第8期1945-1956,共12页
大多数计算系统利用缓存来减少数据访问时间,加快数据处理并平衡服务负载.缓存管理的关键在于确定即将被加载到缓存中或从缓存中丢弃的合适数据,以及进行缓存置换的合适时机,这对于提高缓存命中率至关重要.现有的缓存方案面临2个问题:... 大多数计算系统利用缓存来减少数据访问时间,加快数据处理并平衡服务负载.缓存管理的关键在于确定即将被加载到缓存中或从缓存中丢弃的合适数据,以及进行缓存置换的合适时机,这对于提高缓存命中率至关重要.现有的缓存方案面临2个问题:在实时的、在线的缓存场景下难以洞察用户访问数据的热度信息,以及忽略了数据访问序列之间复杂的高阶信息.提出了一个基于GNN的缓存预取网络Graph4Cache.通过将单个访问序列建模为有向图(ASGraph),并引入虚拟节点聚合图中所有节点的信息和表示整个序列.然后由ASGraph的虚拟节点构造一个跨序列无向图(CSGraph)来学习跨序列特征,这极大地丰富了单个序列中有限的数据项转换模式.通过融合这2种图结构的信息,学习到了序列之间的高阶关联信息,并获取了丰富的用户意图.在多个公共数据集上的实验结果证明了该方法的有效性.Graph4Cache在P@20和MRR@20上均优于现有的缓存预测算法. 展开更多
关键词 图神经网络 缓存预取 访问序列图 跨序列图 缓存预测
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R-DSP中二级Cache控制器的优化设计
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作者 谭露露 谭勋琼 白创 《电子与封装》 2024年第7期63-68,共6页
针对二级Cache控制器(L2)对于提升R数字信号处理器(R-DSP)访存效率和整体性能的重要作用,结合L2中涉及的内存安全维护和多请求访存仲裁问题,在现有R-DSP中L2基础上实现优化。首先,采用多重分块的存储组织结构,提高访存效率;其次,并行处... 针对二级Cache控制器(L2)对于提升R数字信号处理器(R-DSP)访存效率和整体性能的重要作用,结合L2中涉及的内存安全维护和多请求访存仲裁问题,在现有R-DSP中L2基础上实现优化。首先,采用多重分块的存储组织结构,提高访存效率;其次,并行处理一级Cache控制器请求与外存请求,减小请求处理周期;最后,增加带宽管理与存储保护功能,合理仲裁访存请求并维护存储安全。实验结果表明,相较于传统设计,新设计在保护二级存储安全的同时实现带宽管理式访存仲裁。与现有R-DSP中的L2相比,新设计的存储体单拍最大可响应访存请求数量提升了1倍,一级请求和外存请求的平均处理时钟周期数分别降低了25%和19.6%。 展开更多
关键词 DSP 二级cache 存储结构 并行处理 存储保护 带宽管理
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一种带Cache加速的HyperRAM控制器设计与验证
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作者 邹敏 鲁澳宇 +1 位作者 邹望辉 喻华 《现代电子技术》 北大核心 2024年第6期91-96,共6页
针对目前可穿戴设备上对存储设备性能要求高、体积小、功耗低等问题,在FPGA上实现了一款可拓展的高性能HyperRAM控制器,并引入Cache缓存加速设计,以提高对频繁访问数据的命中率和优化存储器访问模式,实现更高速的数据传输和优化的系统... 针对目前可穿戴设备上对存储设备性能要求高、体积小、功耗低等问题,在FPGA上实现了一款可拓展的高性能HyperRAM控制器,并引入Cache缓存加速设计,以提高对频繁访问数据的命中率和优化存储器访问模式,实现更高速的数据传输和优化的系统性能。运用UVM验证方法学和FPGA进行验证,结果表明,带有Cache缓存的HyperRAM控制器相较于普通HyperRAM,在读写连续地址时性能提高61%,并具有较好的可靠性与有效性,可为嵌入式系统提供高效、灵活的存储器解决方案。 展开更多
关键词 HyperRAM控制器 cache缓存 可穿戴设备 存储器 UVM验证方法学 FPGA
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Cache侧信道攻击防御量化研究
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作者 王占鹏 朱子元 王立敏 《信息安全学报》 CSCD 2024年第4期107-124,共18页
芯片安全防护技术关系到国家、企业和个人的信息安全,相关的研究一直是计算机安全领域的热点。片上高速缓存对芯片性能起着重要作用,可以有效提升芯片内核访问效率。传统的缓存设计并没有充分考虑安全性,侧信道攻击会对Cache造成巨大威... 芯片安全防护技术关系到国家、企业和个人的信息安全,相关的研究一直是计算机安全领域的热点。片上高速缓存对芯片性能起着重要作用,可以有效提升芯片内核访问效率。传统的缓存设计并没有充分考虑安全性,侧信道攻击会对Cache造成巨大威胁,可以窃取加密密钥等内存存储敏感信息。攻击者利用侧信道的技术窃取用户的隐私数据或加密算法密钥时不会改变片上系统芯片的运行状态,从而使计算机系统很难检测是否受到了攻击。与基于电磁信号和基于能量检测的侧信道攻击相比,基于存储共享的侧信道攻击只需要利用软件测量就可以实现,对芯片安全的威胁更大。目前存在多种侧信道攻击和防御手段,但缺乏一套完善的关于系统架构的安全度量方法,对Cache的安全性进行有效评估。本文对Cache侧信道攻击和防御手段进行模型化分析,提出一套Cache安全性量化研究方法。首先,我们采用CVSS漏洞评分模型对Cache侧信道攻击进行量化评分。然后,利用贝叶斯公式,构建侧信道攻击和防御的关系模型。最后,通过图模型对Cache侧信道攻击机理进行建模,计算在防御架构基础上不同威胁的攻击成功率,并结合CVSS防御得分求得不同防御方法的得分。本文针对Cache侧信道攻击进行机理建模,对攻击和防御进行评估和探索,为硬件安全人员提供理论支持。 展开更多
关键词 cache侧信道 CVSS 贝叶斯模型 安全量化 安全架构
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基于Cache优化的服务调用方法
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作者 杨国胜 杨毅 +1 位作者 王海 段锴 《数字技术与应用》 2024年第4期60-63,共4页
集中式服务网关通常使用共享内存进行服务实例与治理参数的本地化生产与消费,实现业务处理与服务发现逻辑的解耦,增强系统的稳定性,但频繁的共享内存操作往往带来系统资源利用率和请求处理耗时上的低效。通过引入缓存机制,在服务网关的... 集中式服务网关通常使用共享内存进行服务实例与治理参数的本地化生产与消费,实现业务处理与服务发现逻辑的解耦,增强系统的稳定性,但频繁的共享内存操作往往带来系统资源利用率和请求处理耗时上的低效。通过引入缓存机制,在服务网关的路由组件内部实现并利用针对服务调用优化的Cache,热点数据请求直接从Cache中读取结构化信息,避免了共享内存操作与存储块的编解码,有效地利用缓存空间,提高了数据访问速度,同时减少了共享内存操作中的资源竞争,提高了系统并发。 展开更多
关键词 共享内存 服务网关 缓存机制 服务实例 cache 结构化信息 热点数据 缓存空间
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Performance and Application of Double-layered Microcapsule Corrosion Inhibitors
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作者 余海燕 WANG Yingxiang +2 位作者 WANG Ruizhi HU Lintong WANG Tianlei 《Journal of Wuhan University of Technology(Materials Science)》 SCIE EI CAS CSCD 2024年第4期845-853,共9页
Double-layered microcapsule corrosion inhibitors were developed by sodium monofluorophosphate as the core material,polymethyl methacrylate as the inner wall material,and polyvinyl alcohol as the outer wall material co... Double-layered microcapsule corrosion inhibitors were developed by sodium monofluorophosphate as the core material,polymethyl methacrylate as the inner wall material,and polyvinyl alcohol as the outer wall material combining the solvent evaporation method and spray drying method.The protection by the outer capsule wall was used to prolong the service life of the corrosion inhibitor.The dispersion,encapsulation,thermal stability of microcapsules,and the degradation rate of capsule wall in concrete pore solution were analyzed by ultra-deep field microscopy,scanning electron microscopy,thermal analyzer,and sodium ion release rate analysis.The microcapsules were incorporated into mortar samples containing steel reinforcement,and the effects of double-layered microcapsule corrosion inhibitors on the performance of the cement matrix and the actual corrosion-inhibiting effect were analyzed.The experimental results show that the double-layered microcapsules have a moderate particle size and uniform distribution,and the capsules were completely wrapped.The microcapsules as a whole have good thermal stability below 230 ℃.The monolayer membrane structure microcapsules completely broke within 1 day in the simulated concrete pore solution,and the double-layer membrane structure prolonged the service life of the microcapsules to 80 days in the simulated concrete pore solution before the core material was completely released.The mortar samples containing steel reinforcement incorporated with the double-layered microcapsule corrosion inhibitors still maintained a higher corrosion potential than the monolayer microcapsule corrosion inhibitors control group at 60 days.The incorporation of double-layered microcapsules into the cement matrix has no significant adverse effect on the setting time and early strength. 展开更多
关键词 corrosion inhibitors MICROCAPSULE double-layer structure potentiodynamic polarization curve
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EBCache:A Novel Cache-Based Mechanism for Mitigating the Spectre Attacks for RISC-V Processor
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作者 Wu Dehua Xiao Wan’ang Gao Wanlin 《China Communications》 SCIE CSCD 2024年第12期166-185,共20页
The cache-based covert channel is one of the common vulnerabilities exploited in the Spectre attacks.Current mitigation strategies focus on blocking the eviction-based channel by using a random/encrypted mapping funct... The cache-based covert channel is one of the common vulnerabilities exploited in the Spectre attacks.Current mitigation strategies focus on blocking the eviction-based channel by using a random/encrypted mapping function to translate memory address to the cache address,while the updated-based channel is still vulnerable.In addition,some mitigation strategies are also costly as it needs software and hardware modifications.In this paper,our objective is to devise low-cost,comprehensive-protection techniques for mitigating the Spectre attacks.We proposed a novel cache structure,named EBCache,which focuses on the RISC-V processor and applies the address encryption and blacklist to resist the Spectre attacks.The addresses encryption mechanism increases the difficulty of pruning a minimal eviction set.The blacklist mechanism makes the updated cache lines loaded by the malicious updates invisible.Our experiments demonstrated that the EBCache can prevent malicious modifications.The EBCache,however,reduces the processor’s performance by about 23%but involves only a low-cost modification in the hardware. 展开更多
关键词 cache structure out-of-order execution side-channel attacks the Spectre attacks
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Efficient cache replacement framework based on access hotness for spacecraft processors
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作者 GAO Xin NIAN Jiawei +1 位作者 LIU Hongjin YANG Mengfei 《中国空间科学技术(中英文)》 CSCD 北大核心 2024年第2期74-88,共15页
A notable portion of cachelines in real-world workloads exhibits inner non-uniform access behaviors.However,modern cache management rarely considers this fine-grained feature,which impacts the effective cache capacity... A notable portion of cachelines in real-world workloads exhibits inner non-uniform access behaviors.However,modern cache management rarely considers this fine-grained feature,which impacts the effective cache capacity of contemporary high-performance spacecraft processors.To harness these non-uniform access behaviors,an efficient cache replacement framework featuring an auxiliary cache specifically designed to retain evicted hot data was proposed.This framework reconstructs the cache replacement policy,facilitating data migration between the main cache and the auxiliary cache.Unlike traditional cacheline-granularity policies,the approach excels at identifying and evicting infrequently used data,thereby optimizing cache utilization.The evaluation shows impressive performance improvement,especially on workloads with irregular access patterns.Benefiting from fine granularity,the proposal achieves superior storage efficiency compared with commonly used cache management schemes,providing a potential optimization opportunity for modern resource-constrained processors,such as spacecraft processors.Furthermore,the framework complements existing modern cache replacement policies and can be seamlessly integrated with minimal modifications,enhancing their overall efficacy. 展开更多
关键词 spacecraft processors cache management replacement policy storage efficiency memory hierarchy MICROARCHITECTURE
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基于SOA架构的M-Cache 对供应链安全风险预警系统研究 被引量:1
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作者 丁晓 周红勇 陈继宁 《粘接》 CAS 2024年第12期193-196,共4页
针对数据篡改攻击的增多以及瞬态故障问题,提出用于系统安全监控的面向服务的架构(SOA),并利用该架构构建监控缓存(M-Cache),以检查供应链风险预警与决策系统的数据完整性。实验结果表明,与系统动态篡改数据相比,对系统代码攻击和对内... 针对数据篡改攻击的增多以及瞬态故障问题,提出用于系统安全监控的面向服务的架构(SOA),并利用该架构构建监控缓存(M-Cache),以检查供应链风险预警与决策系统的数据完整性。实验结果表明,与系统动态篡改数据相比,对系统代码攻击和对内存数据的攻击更容易被检测,内存数据的攻击检测率最大为99.6%,最小为98.6%。且监控缓存方法的检测准确率达到99.07%,优于随机森林模型与深度学习模型,进一步降低了漏检率。当攻击功率达到6 w时,基于SOA的监控缓存方法具有出色的检测效果,检测准确率为98.03%。随着攻击功率增大,检测准确率仍呈上升趋势。 展开更多
关键词 面向服务的架构 供应链系统 监控缓存 检测准确率
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Analytical modeling of cache-enabled heterogeneous networks using Poisson cluster processes
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作者 Junhui Zhao Lihua Yang +1 位作者 Xiaoting Ma Ziyang Zhang 《Digital Communications and Networks》 CSCD 2024年第5期1439-1447,共9页
The dual frequency Heterogeneous Network(HetNet),including sub-6 GHz networks together with Millimeter Wave(mmWave),achieves the high data rates of user in the networks with hotspots.The cache-enabled HetNets with hot... The dual frequency Heterogeneous Network(HetNet),including sub-6 GHz networks together with Millimeter Wave(mmWave),achieves the high data rates of user in the networks with hotspots.The cache-enabled HetNets with hotspots are investigated using an analytical framework in which Macro Base Stations(MBSs)and hotspot centers are treated as two independent homogeneous Poisson Point Processes(PPPs),and locations of Small Base Stations(SBSs)and users are modeled as two Poisson Cluster Processes(PCPs).Under the PCP-based modeling method and the Most Popular Caching(MPC)scheme,we propose a cache-enabled association strategy for HetNets with limited storage capacity.The performance of association probability and coverage probability is explicitly derived,and Monte Carlo simulation is utilized to verify that the results are correct.The outcomes of the simulation present the influence of antenna configuration and cache capacities of MBSs and SBSs on network performance.Numerical optimization of the standard deviation ratio of SBSs and users of association probability is enabled by our analysis. 展开更多
关键词 Heterogeneous networks Millimeter wave Poisson cluster processes cachING Stochastic geometry
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