Ge2Sb2Te5 gap filling is one of the key processes for phase-change random access memory manufacture. Physical vapor deposition is the mainstream method of Ge2Sb2Te5 film deposition due to its advantages of film qualit...Ge2Sb2Te5 gap filling is one of the key processes for phase-change random access memory manufacture. Physical vapor deposition is the mainstream method of Ge2Sb2Te5 film deposition due to its advantages of film quality, purity, and accurate composition control. However,the conventional physical vapor deposition process cannot meet the gap- filling requirement with the critical device dimension scaling down to 90 nm or below. In this study, we find that the deposit-etch-deposit process shows better gap-filling capability and scalability than the single-step deposition process, especially at the nano-scale critical dimension. The gap-filling mechanism of the deposit-etch-deposit process was briefly discussed. We also find that re-deposition of phase-change material from via the sidewall to via the bottom by argon ion bombardment during the etch step was a key ingredient for the final good gap filling. We achieve void-free gap filling of phase-change material on the 45-nm via the two-cycle deposit-etch-deposit process. We gain a rather comprehensive insight into the mechanism of deposit-etch-deposit process and propose a potential gap-filling solution for over 45-nm technology nodes for phase-change random access memory.展开更多
针对背沟道刻蚀(Back Channel Etch,BCE)技术的非晶铟镓锌氧化物(a-IGZO)薄膜晶体管(Thin Film Transistor,TFTs),建立了一种高浓度掺杂态密度模型(High Concentration Doping Density Of States model,HCD-DOS model),并通过数值模拟...针对背沟道刻蚀(Back Channel Etch,BCE)技术的非晶铟镓锌氧化物(a-IGZO)薄膜晶体管(Thin Film Transistor,TFTs),建立了一种高浓度掺杂态密度模型(High Concentration Doping Density Of States model,HCD-DOS model),并通过数值模拟研究态密度关键参数对器件性能的影响,以此揭示a-IGZO TFTs中制备工艺对导电沟道修复的物理机理.首先,采用结合强度较高的钼/铜双层结构作为栅/源/漏电极,引入BCE方法制备了底栅顶接触(BottomGate Top-Contact,BG-TC)TFTs.其次,建立了适用于BCE技术的a-IGZO TFTs的HCD-DOS模型.随后,基于TCAD(Technology Computer Aided Design)仿真器对态密度关键参数进行数值研究,结果表明,不同态密度参数对a-IGZO TFTs器件转移特性曲线、电学特性以及沟道内部电子浓度分布的影响有所差异.最后,基于HCD-DOS模型探索SiO_(x)钝化层沉积和N_(2)O等离子体处理对器件内部机理的影响.研究发现,N2O等离子体处理对态密度分布和沟道载流子浓度有显著影响,进而导致阈值电压正向漂移.展开更多
基金Project supported by the National Basic Research Program of China (Grant Nos.2010CB934300,2011CBA00607,and 2011CB932800)the National Integrate Circuit Research Program of China (Grant No. 2009ZX02023-003)+1 种基金the National Natural Science Foundation of China (Grant Nos. 60906004,60906003,61006087,and 61076121)the Science and Technology Council of Shanghai,China (Grant No. 1052nm07000)
文摘Ge2Sb2Te5 gap filling is one of the key processes for phase-change random access memory manufacture. Physical vapor deposition is the mainstream method of Ge2Sb2Te5 film deposition due to its advantages of film quality, purity, and accurate composition control. However,the conventional physical vapor deposition process cannot meet the gap- filling requirement with the critical device dimension scaling down to 90 nm or below. In this study, we find that the deposit-etch-deposit process shows better gap-filling capability and scalability than the single-step deposition process, especially at the nano-scale critical dimension. The gap-filling mechanism of the deposit-etch-deposit process was briefly discussed. We also find that re-deposition of phase-change material from via the sidewall to via the bottom by argon ion bombardment during the etch step was a key ingredient for the final good gap filling. We achieve void-free gap filling of phase-change material on the 45-nm via the two-cycle deposit-etch-deposit process. We gain a rather comprehensive insight into the mechanism of deposit-etch-deposit process and propose a potential gap-filling solution for over 45-nm technology nodes for phase-change random access memory.
文摘针对背沟道刻蚀(Back Channel Etch,BCE)技术的非晶铟镓锌氧化物(a-IGZO)薄膜晶体管(Thin Film Transistor,TFTs),建立了一种高浓度掺杂态密度模型(High Concentration Doping Density Of States model,HCD-DOS model),并通过数值模拟研究态密度关键参数对器件性能的影响,以此揭示a-IGZO TFTs中制备工艺对导电沟道修复的物理机理.首先,采用结合强度较高的钼/铜双层结构作为栅/源/漏电极,引入BCE方法制备了底栅顶接触(BottomGate Top-Contact,BG-TC)TFTs.其次,建立了适用于BCE技术的a-IGZO TFTs的HCD-DOS模型.随后,基于TCAD(Technology Computer Aided Design)仿真器对态密度关键参数进行数值研究,结果表明,不同态密度参数对a-IGZO TFTs器件转移特性曲线、电学特性以及沟道内部电子浓度分布的影响有所差异.最后,基于HCD-DOS模型探索SiO_(x)钝化层沉积和N_(2)O等离子体处理对器件内部机理的影响.研究发现,N2O等离子体处理对态密度分布和沟道载流子浓度有显著影响,进而导致阈值电压正向漂移.
