The worst-case radiation effect in deep-submicron SRAM （static random access memory） circuits is studied through theoretical analysis and experimental validation. Detailed analysis about the radiation effect in diff...The worst-case radiation effect in deep-submicron SRAM （static random access memory） circuits is studied through theoretical analysis and experimental validation. Detailed analysis about the radiation effect in different parts of circuitry is presented. For SRAM cells and a sense amplifier which includes flip-flop structures, their failure level against ionizing radiation will have a connection with the storage state during irradiation. They are inclined to store or read the same state as the one stored during irradiation. Worst-case test scheme for an SRAM circuit is presented, which contains a write operation that changes the storage states into the opposite ones after irradiation and then a read operation with opposite storage states. An irradiation experiment is designed for one 0.25 μm SRAM circuit which has a capacity of I k×8 bits. The failure level against ionizing radiation concluded from this test scheme （150 krad（Si）） is much lower than the one from the simplest test scheme （1 Mrad（Si））. It is obvious that the failure level will be overestimated if the simplest test scheme is chosen as the test standard for SRAM circuits against ionizing radiation.展开更多
基金supported by National Natural Science Foundation of China(No.11175271)
文摘The worst-case radiation effect in deep-submicron SRAM （static random access memory） circuits is studied through theoretical analysis and experimental validation. Detailed analysis about the radiation effect in different parts of circuitry is presented. For SRAM cells and a sense amplifier which includes flip-flop structures, their failure level against ionizing radiation will have a connection with the storage state during irradiation. They are inclined to store or read the same state as the one stored during irradiation. Worst-case test scheme for an SRAM circuit is presented, which contains a write operation that changes the storage states into the opposite ones after irradiation and then a read operation with opposite storage states. An irradiation experiment is designed for one 0.25 μm SRAM circuit which has a capacity of I k×8 bits. The failure level against ionizing radiation concluded from this test scheme （150 krad（Si）） is much lower than the one from the simplest test scheme （1 Mrad（Si））. It is obvious that the failure level will be overestimated if the simplest test scheme is chosen as the test standard for SRAM circuits against ionizing radiation.
