This paper investigates frequency limitations of calibration and de-embedding techniques for S parameter measurements. First, the TRL calibration methods are analysed and the error due to the probe movement when measu...This paper investigates frequency limitations of calibration and de-embedding techniques for S parameter measurements. First, the TRL calibration methods are analysed and the error due to the probe movement when measuring the different line lengths is quantified, next the coupling between the probe-heads and the wafer surface is investigated and finally an upper frequency validity limit for the standard Open-Short de-embedding method is given. The measured results have been confirmed thanks to the use of an electro-magnetic simulator.展开更多
The popular radio frequency(RF) chip on board(COB) test has gradually taken the place of onwafer test due to the high efficiency and high power. This paper presents the extended Open-Short-Load(OSL) that is one-port c...The popular radio frequency(RF) chip on board(COB) test has gradually taken the place of onwafer test due to the high efficiency and high power. This paper presents the extended Open-Short-Load(OSL) that is one-port calibration method to verify the error model de-embedding in S parameter measurement. Threelevel cascade structure on COB's system error model is proposed and analyzed. Four kinds of calibration plane solutions for de-embedding are verified. At last,on-board calibration(CAL) kits solution is established to decrease the system error to the least value. The maximum error shift can be controlled less than 0.1 dB comparing with the on-wafer test results. In general,the practical application results prove that this method is reasonable and effective and easy to be mastered.展开更多
This paper presents a novel de-embedding technique of packaged high-powertransistors. With the proposed technique, the packaged model of the power amplifier (PA)tube can be divided into the frequency independent de-em...This paper presents a novel de-embedding technique of packaged high-powertransistors. With the proposed technique, the packaged model of the power amplifier (PA)tube can be divided into the frequency independent de-embedded intrinsic device (DID)and the frequency dependent internal parasitic network (IPN), which is of great help in reducingthe design complexity of a broadband PA. Different from the conventional techniqueof parasitic extraction, the proposed technique only requires external measurements.The frequency independent characteristic of DID is verified and the IPN is modeledand calibrated for a 50 W gallium-nitride (GaN) transistor. At last, a broadbandDoherty PA is fabricated with the de-embedding technique. According to the measured results,the PA exhibits satisfactory power and efficiency performance.展开更多
Modeling of Schottky diodes in the CMOS process is a key step in ultra-high frequency （UHF） ra- dio frequency identification （RFID） transponder designs. Accurate Schottky diode models need both DC and RF models. C...Modeling of Schottky diodes in the CMOS process is a key step in ultra-high frequency （UHF） ra- dio frequency identification （RFID） transponder designs. Accurate Schottky diode models need both DC and RF models. Conventional DC models of the Schottky diode fail to predict the forward leakage current, which is crucial for precise simulation results. This paper presents a Schottky diode model with an additional diode which gives the correct forward leakage current. The RF model of the Schottky diode is constructed based on the measured S-parameters. Then, an on-chip de-embedding process is needed to remove the parasitics due to the pads and interconnection lines in the S-parameter test. A flexible ＂open-through＂ on-chip de-embedding method is proposed which only requires an ＂open＂ dummy and a ＂through＂ dummy, with all the lumped and distributed parasitics equivalent to two-port networks to give sufficient high-frequency de-embedding accuracy. By the help of this de-embedding method and the new DC model, the accuracy of the established diode model could be guaranteed. The Schottky diode model is verified by comparison between measurements and simulations and successfully applied to an RFID transponder design.展开更多
Two innovative de-embedding methods are proposed for extracting an electrical model for a through- silicon-via （TSV） pair consisting of a ground-signal （GS） structure. In addition, based on microwave network theor...Two innovative de-embedding methods are proposed for extracting an electrical model for a through- silicon-via （TSV） pair consisting of a ground-signal （GS） structure. In addition, based on microwave network theory, a new solution scheme is developed for dealing with multiple solutions of the transfer matrix during the process of de-embedding. A unique solution is determined based on the amplitude and the phase characteristic of S parameters. In the first de-embedding method, a typical ＂π＂ type model of the TSV pair is developed, which illustrates the need to allow for frequency dependence in the equivalent TSV pair Spice model. This de-embedding method is shown to be effective for extracting the electrical properties of the TSVs. The feasibility of a second de-embedding method is also investigated.展开更多
On-wafer S-parameter de-embedding techniques from 0.1 to 110 GHz are researched. The solving re- suits of thru-reflect-line （TRL） and line-reflect-match （LRM） de-embedding algorithms, when the input and output por...On-wafer S-parameter de-embedding techniques from 0.1 to 110 GHz are researched. The solving re- suits of thru-reflect-line （TRL） and line-reflect-match （LRM） de-embedding algorithms, when the input and output ports are asymmetric, are given. The de-embedding standards of TRL and LRM are designed on an InP substrate. The validity of the de-embedding results is demonstrated through two passive components, and the accuracy of TRL and LRM de-embedding techniques is compared from 0.1 to 110 GHz. By utilizing an LRM technique in 0.1- 40 GHz and a TRL technique in 75-110 GHz, the intrinsic S-parameters of active device HBT in two frequency bands are obtained, and comparisons of the extracted small-signal current gain and the unilateral power gain before and after de-embedding are presented. The whole S-parameters of actual DUT from 0.1 to 110 GHz can be obtained by interpolation.展开更多
文摘This paper investigates frequency limitations of calibration and de-embedding techniques for S parameter measurements. First, the TRL calibration methods are analysed and the error due to the probe movement when measuring the different line lengths is quantified, next the coupling between the probe-heads and the wafer surface is investigated and finally an upper frequency validity limit for the standard Open-Short de-embedding method is given. The measured results have been confirmed thanks to the use of an electro-magnetic simulator.
基金Sponsored by the National Science and Technology Major Project(Class B)(Grant No.2009ZX02306)
文摘The popular radio frequency(RF) chip on board(COB) test has gradually taken the place of onwafer test due to the high efficiency and high power. This paper presents the extended Open-Short-Load(OSL) that is one-port calibration method to verify the error model de-embedding in S parameter measurement. Threelevel cascade structure on COB's system error model is proposed and analyzed. Four kinds of calibration plane solutions for de-embedding are verified. At last,on-board calibration(CAL) kits solution is established to decrease the system error to the least value. The maximum error shift can be controlled less than 0.1 dB comparing with the on-wafer test results. In general,the practical application results prove that this method is reasonable and effective and easy to be mastered.
文摘This paper presents a novel de-embedding technique of packaged high-powertransistors. With the proposed technique, the packaged model of the power amplifier (PA)tube can be divided into the frequency independent de-embedded intrinsic device (DID)and the frequency dependent internal parasitic network (IPN), which is of great help in reducingthe design complexity of a broadband PA. Different from the conventional techniqueof parasitic extraction, the proposed technique only requires external measurements.The frequency independent characteristic of DID is verified and the IPN is modeledand calibrated for a 50 W gallium-nitride (GaN) transistor. At last, a broadbandDoherty PA is fabricated with the de-embedding technique. According to the measured results,the PA exhibits satisfactory power and efficiency performance.
基金Supported by the National High-Tech Research and Development (863) Program of China (No. 2006AA04A109)the National Natural Science Foundation of China (No. 60806008)
文摘Modeling of Schottky diodes in the CMOS process is a key step in ultra-high frequency （UHF） ra- dio frequency identification （RFID） transponder designs. Accurate Schottky diode models need both DC and RF models. Conventional DC models of the Schottky diode fail to predict the forward leakage current, which is crucial for precise simulation results. This paper presents a Schottky diode model with an additional diode which gives the correct forward leakage current. The RF model of the Schottky diode is constructed based on the measured S-parameters. Then, an on-chip de-embedding process is needed to remove the parasitics due to the pads and interconnection lines in the S-parameter test. A flexible ＂open-through＂ on-chip de-embedding method is proposed which only requires an ＂open＂ dummy and a ＂through＂ dummy, with all the lumped and distributed parasitics equivalent to two-port networks to give sufficient high-frequency de-embedding accuracy. By the help of this de-embedding method and the new DC model, the accuracy of the established diode model could be guaranteed. The Schottky diode model is verified by comparison between measurements and simulations and successfully applied to an RFID transponder design.
基金Project supported by the Opening Project of Key Laboratory of Microelectronics Devices & Integrated Technology,Institute of Microelectronics, Chinese Academy of Sciencessupport by 100 Talents Program(No.Y0YB049001) of Chinese Academy of Sciences
文摘Two innovative de-embedding methods are proposed for extracting an electrical model for a through- silicon-via （TSV） pair consisting of a ground-signal （GS） structure. In addition, based on microwave network theory, a new solution scheme is developed for dealing with multiple solutions of the transfer matrix during the process of de-embedding. A unique solution is determined based on the amplitude and the phase characteristic of S parameters. In the first de-embedding method, a typical ＂π＂ type model of the TSV pair is developed, which illustrates the need to allow for frequency dependence in the equivalent TSV pair Spice model. This de-embedding method is shown to be effective for extracting the electrical properties of the TSVs. The feasibility of a second de-embedding method is also investigated.
基金Project supported by the National Natural Science Foundation of China(No.61401457)
文摘On-wafer S-parameter de-embedding techniques from 0.1 to 110 GHz are researched. The solving re- suits of thru-reflect-line （TRL） and line-reflect-match （LRM） de-embedding algorithms, when the input and output ports are asymmetric, are given. The de-embedding standards of TRL and LRM are designed on an InP substrate. The validity of the de-embedding results is demonstrated through two passive components, and the accuracy of TRL and LRM de-embedding techniques is compared from 0.1 to 110 GHz. By utilizing an LRM technique in 0.1- 40 GHz and a TRL technique in 75-110 GHz, the intrinsic S-parameters of active device HBT in two frequency bands are obtained, and comparisons of the extracted small-signal current gain and the unilateral power gain before and after de-embedding are presented. The whole S-parameters of actual DUT from 0.1 to 110 GHz can be obtained by interpolation.
