A 0.20–2.43 GHz fractional-N frequency synthesizer is presented for multi-band wireless communication systems,in which the scheme adopts low phase noise voltage-controlled oscillators(VCOs)and a charge pump(CP)with r...A 0.20–2.43 GHz fractional-N frequency synthesizer is presented for multi-band wireless communication systems,in which the scheme adopts low phase noise voltage-controlled oscillators(VCOs)and a charge pump(CP)with reduced current mismatch.VCOs that determine the out-band phase noise of a phase-locked loop(PLL)based frequency synthesizer are optimized using an automatic amplitude control technique and a high-quality factor figure-8-shaped inductor.A CP with a mismatch suppression architecture is proposed to improve the current match of the CP and reduce the PLL phase errors.Theoretical analysis is presented to investigate the influence of the current mismatch on the output performance of PLLs.Fabricated in a TSMC 0.18-μm CMOS process,the prototype operates from 0.20 to 2.43 GHz.The PLL synthesizer achieves an in-band phase noise of-96.8 dBc/Hz and an out-band phase noise of-122.8 dBc/Hz at the 2.43-GHz carrier.The root-mean-square jitter is 1.2 ps under the worst case,and the measured reference spurs are less than-65.3 dBc.The current consumption is 15.2 mA and the die occupies 850μm×920μm.展开更多
Howland circuits have been widely used as powerful source for exciting tissue over a wide frequency range. When a Howland source is designed, the components are chosen so that the designed source has the desired chara...Howland circuits have been widely used as powerful source for exciting tissue over a wide frequency range. When a Howland source is designed, the components are chosen so that the designed source has the desired characteristics. However, the operational amplifier limitations and resistor tolerances cause undesired behaviors. This work proposes to take into account the influence of the random distribution of the resistors in the modified Howland circuit over the frequency range of 10 Hz to 10 MHz. Both output current and impedance of the circuit are deduced either considering or the operational amplifiers parameters. The probability density function due to small changes in the resistors of the circuit was calculated by using the analytical modeling. Results showed that both output current and impedance are very sensitive to the resistors variations. In order to get higher output impedances, high operational amplifier gains are required. The operational amplifier open-loop gain increases as increasing the sensitivity of the output impedance. The analysis done in this work can be used as a powerful co-adjuvant tool when projecting this type of circuit in Spice simulators. This might improve the implementations of practical current sources used in electrical bioimpedance.展开更多
永磁同步电机电流环控制性能是决定驱动系统性能的核心因素。电流预测控制能够使永磁同步电机电流控制获得良好的动态响应,但是控制器电机模型参数与实际电机参数不一致会引起电流静差,导致系统效率降低,无法输出额定转矩,以及无法工作...永磁同步电机电流环控制性能是决定驱动系统性能的核心因素。电流预测控制能够使永磁同步电机电流控制获得良好的动态响应,但是控制器电机模型参数与实际电机参数不一致会引起电流静差,导致系统效率降低,无法输出额定转矩,以及无法工作在力矩控制模式等问题。该文根据永磁同步电机预测控制模型,详细分析了控制器电机模型参数误差对电流控制的影响,并提出了一种静差消除算法。这种方法主要适用于控制器中电机模型电感及磁链参数不准的情况,通过在d轴电流控制中加入误差积分作用,并根据q轴电流的响应,动态调整控制器电机模型磁链参数,消除了控制器电机模型参数不准引起的静差。通过仿真分析和在3.3 k W永磁同步电机驱动平台上的实验,验证了该算法的有效性。展开更多
基金Project supported by the National Natural Science Foundation of China(No.61376031)。
文摘A 0.20–2.43 GHz fractional-N frequency synthesizer is presented for multi-band wireless communication systems,in which the scheme adopts low phase noise voltage-controlled oscillators(VCOs)and a charge pump(CP)with reduced current mismatch.VCOs that determine the out-band phase noise of a phase-locked loop(PLL)based frequency synthesizer are optimized using an automatic amplitude control technique and a high-quality factor figure-8-shaped inductor.A CP with a mismatch suppression architecture is proposed to improve the current match of the CP and reduce the PLL phase errors.Theoretical analysis is presented to investigate the influence of the current mismatch on the output performance of PLLs.Fabricated in a TSMC 0.18-μm CMOS process,the prototype operates from 0.20 to 2.43 GHz.The PLL synthesizer achieves an in-band phase noise of-96.8 dBc/Hz and an out-band phase noise of-122.8 dBc/Hz at the 2.43-GHz carrier.The root-mean-square jitter is 1.2 ps under the worst case,and the measured reference spurs are less than-65.3 dBc.The current consumption is 15.2 mA and the die occupies 850μm×920μm.
文摘Howland circuits have been widely used as powerful source for exciting tissue over a wide frequency range. When a Howland source is designed, the components are chosen so that the designed source has the desired characteristics. However, the operational amplifier limitations and resistor tolerances cause undesired behaviors. This work proposes to take into account the influence of the random distribution of the resistors in the modified Howland circuit over the frequency range of 10 Hz to 10 MHz. Both output current and impedance of the circuit are deduced either considering or the operational amplifiers parameters. The probability density function due to small changes in the resistors of the circuit was calculated by using the analytical modeling. Results showed that both output current and impedance are very sensitive to the resistors variations. In order to get higher output impedances, high operational amplifier gains are required. The operational amplifier open-loop gain increases as increasing the sensitivity of the output impedance. The analysis done in this work can be used as a powerful co-adjuvant tool when projecting this type of circuit in Spice simulators. This might improve the implementations of practical current sources used in electrical bioimpedance.
文摘永磁同步电机电流环控制性能是决定驱动系统性能的核心因素。电流预测控制能够使永磁同步电机电流控制获得良好的动态响应,但是控制器电机模型参数与实际电机参数不一致会引起电流静差,导致系统效率降低,无法输出额定转矩,以及无法工作在力矩控制模式等问题。该文根据永磁同步电机预测控制模型,详细分析了控制器电机模型参数误差对电流控制的影响,并提出了一种静差消除算法。这种方法主要适用于控制器中电机模型电感及磁链参数不准的情况,通过在d轴电流控制中加入误差积分作用,并根据q轴电流的响应,动态调整控制器电机模型磁链参数,消除了控制器电机模型参数不准引起的静差。通过仿真分析和在3.3 k W永磁同步电机驱动平台上的实验,验证了该算法的有效性。
