Binary analysis, as an important foundational technology, provides support for numerous applications in the fields of software engineering and security research. With the continuous expansion of software scale and the...Binary analysis, as an important foundational technology, provides support for numerous applications in the fields of software engineering and security research. With the continuous expansion of software scale and the complex evolution of software architecture, binary analysis technology is facing new challenges. To break through existing bottlenecks, researchers have applied artificial intelligence (AI) technology to the understanding and analysis of binary code. The core lies in characterizing binary code, i.e., how to use intelligent methods to generate representation vectors containing semantic information for binary code, and apply them to multiple downstream tasks of binary analysis. In this paper, we provide a comprehensive survey of recent advances in binary code representation technology, and introduce the workflow of existing research in two parts, i.e., binary code feature selection methods and binary code feature embedding methods. The feature selection section includes mainly two parts: definition and classification of features, and feature construction. First, the abstract definition and classification of features are systematically explained, and second, the process of constructing specific representations of features is introduced in detail. In the feature embedding section, based on the different intelligent semantic understanding models used, the embedding methods are classified into four categories based on the usage of text-embedding models and graph-embedding models. Finally, we summarize the overall development of existing research and provide prospects for some potential research directions related to binary code representation technology.展开更多
A robust progressive image transmission scheme over broadband wireless fading channels is developed for 4th generation wireless communication systems （4G） in this paper. The proposed scheme is based on space-time bl...A robust progressive image transmission scheme over broadband wireless fading channels is developed for 4th generation wireless communication systems （4G） in this paper. The proposed scheme is based on space-time block coded orthogonal frequency-division multiplexing （OFDM） with 4 transmit antennas and 2 receive antennas and uses a simplified minimum mean square error （MMSE） detector instead of maximum likelihood （ML） detectors. Considering DCT is simpler and more widely applied in the industry than wavelet transforms, a progressive image compression method based on DCT called mean-subtract embedded DCT （MSEDCT） is developed, with a simple mean-subtract method for the redundancy of reorganized DC blocks in addition to a structure similar to the embedded zerotree wavelet coding （EZW） method. Then after analyzing and testing bit importance of the progressive MSEDCT bitstreams, the layered unequal error protection method of joint source-channels coding based on Reed-Solomon （RS） codes is used to protect different parts of bitstreams, providing different QoS assurances and good flexibility. Simulation experiments show our proposed scheme can effectively degrade fading effects and obtain better image transmission effects with 10 -20 dB average peak-sig- nal-noise-ratio （PSNR） gains at the median Eb/No than those schemes without space-time coded OFDM or equal error protections with space-time coded OFDM.展开更多
The paper presents a new architecture composed of bit plane-parallel coder for Embedded Block Coding with Optimized Truncation (EBCOT) entropy encoder used in JPEG2000. In the architecture, the coding information of e...The paper presents a new architecture composed of bit plane-parallel coder for Embedded Block Coding with Optimized Truncation (EBCOT) entropy encoder used in JPEG2000. In the architecture, the coding information of each bit plane can be obtained simultaneously and processed parallel. Compared with other architectures, it has advantages of high parallelism, and no waste clock cycles for a single point. The experimental results show that it reduces the processing time about 86% than that of bit plane sequential scheme. A Field Programmable Gate Array (FPGA) prototype chip is designed and simulation results show that it can process 512×512 gray-scaled images with more than 30 frames per second at 52MHz.展开更多
In order to apply the Human Visual System (HVS) model to JPEG2000 standard,several implementation alternatives are discussed and a new scheme of visual optimization isintroduced with modifying the slope of rate-distor...In order to apply the Human Visual System (HVS) model to JPEG2000 standard,several implementation alternatives are discussed and a new scheme of visual optimization isintroduced with modifying the slope of rate-distortion. The novelty is that the method of visual weighting is not lifting the coefficients in wavelet domain, but is complemented by code stream organization. It remains all the features of Embedded Block Coding with Optimized Truncation (EBCOT) such as resolution progressive, good robust for error bit spread and compatibility of lossless compression. Well performed than other methods, it keeps the shortest standard codestream and decompression time and owns the ability of VIsual Progressive (VIP) coding.展开更多
文摘Binary analysis, as an important foundational technology, provides support for numerous applications in the fields of software engineering and security research. With the continuous expansion of software scale and the complex evolution of software architecture, binary analysis technology is facing new challenges. To break through existing bottlenecks, researchers have applied artificial intelligence (AI) technology to the understanding and analysis of binary code. The core lies in characterizing binary code, i.e., how to use intelligent methods to generate representation vectors containing semantic information for binary code, and apply them to multiple downstream tasks of binary analysis. In this paper, we provide a comprehensive survey of recent advances in binary code representation technology, and introduce the workflow of existing research in two parts, i.e., binary code feature selection methods and binary code feature embedding methods. The feature selection section includes mainly two parts: definition and classification of features, and feature construction. First, the abstract definition and classification of features are systematically explained, and second, the process of constructing specific representations of features is introduced in detail. In the feature embedding section, based on the different intelligent semantic understanding models used, the embedding methods are classified into four categories based on the usage of text-embedding models and graph-embedding models. Finally, we summarize the overall development of existing research and provide prospects for some potential research directions related to binary code representation technology.
文摘A robust progressive image transmission scheme over broadband wireless fading channels is developed for 4th generation wireless communication systems （4G） in this paper. The proposed scheme is based on space-time block coded orthogonal frequency-division multiplexing （OFDM） with 4 transmit antennas and 2 receive antennas and uses a simplified minimum mean square error （MMSE） detector instead of maximum likelihood （ML） detectors. Considering DCT is simpler and more widely applied in the industry than wavelet transforms, a progressive image compression method based on DCT called mean-subtract embedded DCT （MSEDCT） is developed, with a simple mean-subtract method for the redundancy of reorganized DC blocks in addition to a structure similar to the embedded zerotree wavelet coding （EZW） method. Then after analyzing and testing bit importance of the progressive MSEDCT bitstreams, the layered unequal error protection method of joint source-channels coding based on Reed-Solomon （RS） codes is used to protect different parts of bitstreams, providing different QoS assurances and good flexibility. Simulation experiments show our proposed scheme can effectively degrade fading effects and obtain better image transmission effects with 10 -20 dB average peak-sig- nal-noise-ratio （PSNR） gains at the median Eb/No than those schemes without space-time coded OFDM or equal error protections with space-time coded OFDM.
基金Supported in part by the "863" Program (No.2003 AA1ZB10)
文摘The paper presents a new architecture composed of bit plane-parallel coder for Embedded Block Coding with Optimized Truncation (EBCOT) entropy encoder used in JPEG2000. In the architecture, the coding information of each bit plane can be obtained simultaneously and processed parallel. Compared with other architectures, it has advantages of high parallelism, and no waste clock cycles for a single point. The experimental results show that it reduces the processing time about 86% than that of bit plane sequential scheme. A Field Programmable Gate Array (FPGA) prototype chip is designed and simulation results show that it can process 512×512 gray-scaled images with more than 30 frames per second at 52MHz.
文摘In order to apply the Human Visual System (HVS) model to JPEG2000 standard,several implementation alternatives are discussed and a new scheme of visual optimization isintroduced with modifying the slope of rate-distortion. The novelty is that the method of visual weighting is not lifting the coefficients in wavelet domain, but is complemented by code stream organization. It remains all the features of Embedded Block Coding with Optimized Truncation (EBCOT) such as resolution progressive, good robust for error bit spread and compatibility of lossless compression. Well performed than other methods, it keeps the shortest standard codestream and decompression time and owns the ability of VIsual Progressive (VIP) coding.
