纠错密码是一种利用纠错码体制来实现纠错和加密双重功能的一种密码体制。大部分已知的纠错密码从变换的角度看是一种对明文的线性变换。从密码分析的角度看,由于不具有非线性变换,密码的混淆能力不强,容易被攻击。利用纠错码(Error-Cor...纠错密码是一种利用纠错码体制来实现纠错和加密双重功能的一种密码体制。大部分已知的纠错密码从变换的角度看是一种对明文的线性变换。从密码分析的角度看,由于不具有非线性变换,密码的混淆能力不强,容易被攻击。利用纠错码(Error-Correction Code,ECC)改造基本HFE(Hidden Field Equations)密码算法,所得的新密码算法具有纠错和加密功能,而且因其具有概率密码特性以及建立在MQ困难问题之上,具有很高的安全强度。展开更多
代码异味是由糟糕的代码或设计问题引起的一种软件特征,严重影响了软件系统的可靠性和可维护性.在软件系统中,一段代码元素可能同时受到多种代码异味的影响,使得软件质量明显下降.多标签分类适用该情况,将高共现的多个代码异味置于同一...代码异味是由糟糕的代码或设计问题引起的一种软件特征,严重影响了软件系统的可靠性和可维护性.在软件系统中,一段代码元素可能同时受到多种代码异味的影响,使得软件质量明显下降.多标签分类适用该情况,将高共现的多个代码异味置于同一标签组,可以更好地考虑代码异味的相关性,但现有的多标签代码异味检测方法未考虑同一段代码元素中多种代码异味检测顺序的影响.对此,提出了一种基于排序损失的集成分类器链(ensemble of classifier chains,ECC)多标签代码异味检测方法,该方法选择随机森林作为基础分类器并采取多次迭代ECC的方式,以排序损失最小化为目标,选择一个较优的标签序列集,优化代码异味检测顺序问题,模拟其生成机理,检测一段代码元素是否同时存在长方法长参数列表、复杂类消息链或消息链过大类这3组代码异味.实验采用9个评价指标,结果表明所提出的检测方法优于现有的多标签代码异味检测方法,F1平均值达97.16%.展开更多
Single event upsets(SEUs) induced by heavy ions were observed in 65 nm SRAMs to quantitatively evaluate the applicability and effectiveness of single-bit error correcting code(ECC) utilizing Hamming Code.The results s...Single event upsets(SEUs) induced by heavy ions were observed in 65 nm SRAMs to quantitatively evaluate the applicability and effectiveness of single-bit error correcting code(ECC) utilizing Hamming Code.The results show that the ECC did improve the performance dramatically,with the SEU cross sections of SRAMs with ECC being at the order of 10^(-11) cm^2/bit,two orders of magnitude higher than that without ECC(at the order of 10^(-9) cm^2/bit).Also,ineffectiveness of ECC module,including 1-,2- and 3-bits errors in single word(not Multiple Bit Upsets),was detected.The ECC modules in SRAMs utilizing(12,8) Hamming code would lose work when 2-bits upset accumulates in one codeword.Finally,the probabilities of failure modes involving 1-,2- and 3-bits errors,were calcaulated at 39.39%,37.88%and 22.73%,respectively,which agree well with the experimental results.展开更多
In deep sub-micron ICs, growing amounts of on-die memory and scaling effects make embedded memories more vulnerable to reliability problems, such as soft errors induced by radiation. Error Correction Code(ECC) along w...In deep sub-micron ICs, growing amounts of on-die memory and scaling effects make embedded memories more vulnerable to reliability problems, such as soft errors induced by radiation. Error Correction Code(ECC) along with scrubbing is an efficient method for protecting memories against these errors. However, the latency of coding circuits brings speed penalties in high performance applications. This paper proposed a "bit bypassing" ECC protected memory by buffering the encoded data and adding an identifying address for the input data. The proposed memory design has been fabricated on a 130 nm CMOS process. According to the measurement, the proposed scheme only gives the minimum delay overhead of 22.6%, compared with other corresponding memories. Furthermore, heavy ion testing demonstrated the single event effects performance of the proposed memory achieves error rate reductions by 42.9 to 63.3 times.展开更多
In this paper, we present a novel technique based on a mixed Error Correcting Code(ECC)-the convolutional code and the repetition code to enhance the robustness of the embedded watermark. Before embedding, the binary ...In this paper, we present a novel technique based on a mixed Error Correcting Code(ECC)-the convolutional code and the repetition code to enhance the robustness of the embedded watermark. Before embedding, the binary watermark is scanned to one-dimension sequence and later inputted into the (3, 1, 2) convolutional encoder and (3, 1) repetition encoder frame by frame, which will improve the error correcting capability of decoder. The output code sequence is scanned to some matrixes as the new watermark messages. The watermarking is selected in low frequency band of the Discrete Wavelet Transform (DWT) and therefore it can resist the destruction of image processing. Experimental results are presented to demonstrate that the robustness of a watermark with mixed ECC is much higher than the traditional one just with repetition coding while suffering JPEG lossy compression, salt and pepper noise and center cutting processing.展开更多
高效的差错控制编码技术(ECC)可以增强无线传感器网络传输稳定性、网络的能量利用效率。为了充分利用无线传感器网络中蕴含的分集资源应对恶劣信道环境导致的高差错概率,该文研究了基于根校验全分集LDPC码的差错控制编码技术。首先,提...高效的差错控制编码技术(ECC)可以增强无线传感器网络传输稳定性、网络的能量利用效率。为了充分利用无线传感器网络中蕴含的分集资源应对恶劣信道环境导致的高差错概率,该文研究了基于根校验全分集LDPC码的差错控制编码技术。首先,提出在分簇无线传感器网络中,基于根校验全分集LDPC码的编码方案;其次,设计了适用于所提方案的速率兼容全分集LDPC码字结构。最后,分析了所提编码系统的能效。仿真结果表明,在信道条件较差的环境中(仿真中,信道噪声大于44 10 m W-′),采用该文的编码方案,能够显著提高无线传感器网络的能效。展开更多
文摘纠错密码是一种利用纠错码体制来实现纠错和加密双重功能的一种密码体制。大部分已知的纠错密码从变换的角度看是一种对明文的线性变换。从密码分析的角度看,由于不具有非线性变换,密码的混淆能力不强,容易被攻击。利用纠错码(Error-Correction Code,ECC)改造基本HFE(Hidden Field Equations)密码算法,所得的新密码算法具有纠错和加密功能,而且因其具有概率密码特性以及建立在MQ困难问题之上,具有很高的安全强度。
文摘代码异味是由糟糕的代码或设计问题引起的一种软件特征,严重影响了软件系统的可靠性和可维护性.在软件系统中,一段代码元素可能同时受到多种代码异味的影响,使得软件质量明显下降.多标签分类适用该情况,将高共现的多个代码异味置于同一标签组,可以更好地考虑代码异味的相关性,但现有的多标签代码异味检测方法未考虑同一段代码元素中多种代码异味检测顺序的影响.对此,提出了一种基于排序损失的集成分类器链(ensemble of classifier chains,ECC)多标签代码异味检测方法,该方法选择随机森林作为基础分类器并采取多次迭代ECC的方式,以排序损失最小化为目标,选择一个较优的标签序列集,优化代码异味检测顺序问题,模拟其生成机理,检测一段代码元素是否同时存在长方法长参数列表、复杂类消息链或消息链过大类这3组代码异味.实验采用9个评价指标,结果表明所提出的检测方法优于现有的多标签代码异味检测方法,F1平均值达97.16%.
基金Supported by the National Natural Science Foundation of China(Nos.11079045 and 11179003)the Important Direction Project of the CAS Knowledge Innovation Program(No.KJCX2-YW-N27)
文摘Single event upsets(SEUs) induced by heavy ions were observed in 65 nm SRAMs to quantitatively evaluate the applicability and effectiveness of single-bit error correcting code(ECC) utilizing Hamming Code.The results show that the ECC did improve the performance dramatically,with the SEU cross sections of SRAMs with ECC being at the order of 10^(-11) cm^2/bit,two orders of magnitude higher than that without ECC(at the order of 10^(-9) cm^2/bit).Also,ineffectiveness of ECC module,including 1-,2- and 3-bits errors in single word(not Multiple Bit Upsets),was detected.The ECC modules in SRAMs utilizing(12,8) Hamming code would lose work when 2-bits upset accumulates in one codeword.Finally,the probabilities of failure modes involving 1-,2- and 3-bits errors,were calcaulated at 39.39%,37.88%and 22.73%,respectively,which agree well with the experimental results.
基金Supported by the National Science and Technology Major Project of China(No.2013ZX03006004)
文摘In deep sub-micron ICs, growing amounts of on-die memory and scaling effects make embedded memories more vulnerable to reliability problems, such as soft errors induced by radiation. Error Correction Code(ECC) along with scrubbing is an efficient method for protecting memories against these errors. However, the latency of coding circuits brings speed penalties in high performance applications. This paper proposed a "bit bypassing" ECC protected memory by buffering the encoded data and adding an identifying address for the input data. The proposed memory design has been fabricated on a 130 nm CMOS process. According to the measurement, the proposed scheme only gives the minimum delay overhead of 22.6%, compared with other corresponding memories. Furthermore, heavy ion testing demonstrated the single event effects performance of the proposed memory achieves error rate reductions by 42.9 to 63.3 times.
文摘In this paper, we present a novel technique based on a mixed Error Correcting Code(ECC)-the convolutional code and the repetition code to enhance the robustness of the embedded watermark. Before embedding, the binary watermark is scanned to one-dimension sequence and later inputted into the (3, 1, 2) convolutional encoder and (3, 1) repetition encoder frame by frame, which will improve the error correcting capability of decoder. The output code sequence is scanned to some matrixes as the new watermark messages. The watermarking is selected in low frequency band of the Discrete Wavelet Transform (DWT) and therefore it can resist the destruction of image processing. Experimental results are presented to demonstrate that the robustness of a watermark with mixed ECC is much higher than the traditional one just with repetition coding while suffering JPEG lossy compression, salt and pepper noise and center cutting processing.
文摘高效的差错控制编码技术(ECC)可以增强无线传感器网络传输稳定性、网络的能量利用效率。为了充分利用无线传感器网络中蕴含的分集资源应对恶劣信道环境导致的高差错概率,该文研究了基于根校验全分集LDPC码的差错控制编码技术。首先,提出在分簇无线传感器网络中,基于根校验全分集LDPC码的编码方案;其次,设计了适用于所提方案的速率兼容全分集LDPC码字结构。最后,分析了所提编码系统的能效。仿真结果表明,在信道条件较差的环境中(仿真中,信道噪声大于44 10 m W-′),采用该文的编码方案,能够显著提高无线传感器网络的能效。