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A Novel Clock Feedthrough Frequency Compensation for Fast-Settling of Folded-Cascode OTA
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作者 宁宁 于奇 +3 位作者 王向展 戴广豪 刘源 杨谟华 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2006年第10期1737-1741,共5页
Based on the minimum settling time (MST) theory and step-response analysis of the second order system in active switched capacitor (SC) networks, a novel clock feedthrough frequency compensation (CFFC) method fo... Based on the minimum settling time (MST) theory and step-response analysis of the second order system in active switched capacitor (SC) networks, a novel clock feedthrough frequency compensation (CFFC) method for a folded-cascode OTA is proposed. The damping factor r/is adjusted by using MOS capacitors to introduce clock feedthrough so that the OTA can obtain the MST state and thus achieve fast settling. Research results indicate that the settling time of the compensated OTA is reduced by 22.7% ;as the capacitor load varies from 0.5 to 2.5pF,the improved settling time increases approximately linearly from 3.62 to 4.46ns: for VGA application, fast settling can also be achieved by modifying the MOS capacitor value accordingly when the closed loop gain of the compensated OTA varies. 展开更多
关键词 clock feedthrough frequency compensation fast settling folded-cascode OTA minimum settling time VGA
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Clock frequency estimation under spontaneous emission
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作者 秦锡洲 黄嘉豪 +1 位作者 钟宏华 李朝红 《Frontiers of physics》 SCIE CSCD 2018年第1期201-210,共10页
We investigate the quantum dynamics of a driven two-level system under spontaneous emission and its application in clock frequency estimation. By using the Lindblad equation to describe the system, we analytically obt... We investigate the quantum dynamics of a driven two-level system under spontaneous emission and its application in clock frequency estimation. By using the Lindblad equation to describe the system, we analytically obtain its exact solutions, which show three different regimes: Rabi oscillation, damped oscillation, and overdamped decay. From the analytical solutions, we explore how the spontaneous emission affects the clock frequency estimation. We find that under a moderate spontaneous emission rate, the transition frequency can still be inferred from the Rabi oscillation. Our results enable potential practical applications in frequency measurement and quantum control under decoherence. 展开更多
关键词 clock frequency estimation two-level system spontaneous emission
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First Evaluation and Frequency Measurement of the Strontium Optical Lattice Clock at NIM 被引量:16
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作者 林弋戈 王强 +7 位作者 李烨 孟飞 林百科 臧二军 孙震 房芳 李天初 方占军 《Chinese Physics Letters》 SCIE CAS CSCD 2015年第9期17-20,共4页
An optical lattice clock based on 87Sr is built at National Institute of Metrology (NIM) of China. The systematic frequency shifts of the clock are evaluated with a total uncertainty of 2.3×10-16. To measure it... An optical lattice clock based on 87Sr is built at National Institute of Metrology (NIM) of China. The systematic frequency shifts of the clock are evaluated with a total uncertainty of 2.3×10-16. To measure its absolute frequency with respect to NIM's cesium fountain clock NIM5, the frequency of a flywheel H-maser of NIM5 is transferred to the Sr laboratory through a 50-kin-long fiber. reference frequency of this H-maser, is used for the optical this Sr clock is measured to be 429228004229873.7(1.4)Hz. A fiber optical frequency comb, phase-locked to the frequency measurement. The absolute frequency of 展开更多
关键词 AOM First Evaluation and frequency Measurement of the Strontium Optical Lattice clock at NIM
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A SCHEDULING SCHEME WITH DYNAMIC FREQUENCY CLOCKING AND MULTIPLE VOLTAGES FOR LOW POWER DESIGNS
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作者 Wen Dongxin Wang Ling Yang Xiaozong 《Journal of Electronics(China)》 2007年第4期572-576,共5页
In this letter, a scheduling scheme based on Dynamic Frequency Clocking (DFC) and multiple voltages is proposed for low power designs under the timing and the resource constraints. Unlike the conventional methods at h... In this letter, a scheduling scheme based on Dynamic Frequency Clocking (DFC) and multiple voltages is proposed for low power designs under the timing and the resource constraints. Unlike the conventional methods at high level synthesis where only voltages of nodes were considered, the scheme based on a gain function considers both voltage and frequency simultaneously to reduce energy consumption. Experiments with a number of DSP benchmarks show that the proposed scheme achieves an effective energy reduction. 展开更多
关键词 Scheduling scheme Dynamic frequency clocking (DFC) Multiple voltages High level synthesis
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Rubidium-beam microwave clock pumped by distributed feedback diode lasers
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作者 刘畅 周晟 +1 位作者 王延辉 侯士敏 《Chinese Physics B》 SCIE EI CAS CSCD 2017年第11期151-154,共4页
A rubidium-beam microwave clock, optically pumped by a distributed feedback diode laser, is experimentally investigated. The clock is composed of a physical package, optical systems, and electric servo loops. The phys... A rubidium-beam microwave clock, optically pumped by a distributed feedback diode laser, is experimentally investigated. The clock is composed of a physical package, optical systems, and electric servo loops. The physical package realizes the microwave interrogation of a rubidium-atomic beam. The optical systems, equipped with two 780-nm distributed feedback laser diodes, yield light for pumping and detecting. The servo loops control the frequency of a local oscillator with respect to the microwave spectrum. With the experimental systems, the microwave spectrum, which has an amplitude of 4 n A and a line width of 700 Hz, is obtained. Preliminary tests show that the clock short-term frequency stability is 7 × 10^-11 at 1 s, and 3 × 10^-12 at 1000 s. These experimental results demonstrate the feasibility of the scheme for a manufactured clock. 展开更多
关键词 quantum frequency standard atomic clock atomic beam distributed feedback
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Low-Power Design of Ethernet Data Transmission
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作者 Wen-Ming Pan Qin Zhang +2 位作者 Jia-Feng Chen Hao-Yuan Wang Jia-Chong Kan 《Journal of Electronic Science and Technology》 CAS 2014年第4期371-375,共5页
For the reliability and power consumption issues of Ethernet data transmission based on the field programmable gate array (FPGA), a low-power consumption design method is proposed, which is suitable for FPGA impleme... For the reliability and power consumption issues of Ethernet data transmission based on the field programmable gate array (FPGA), a low-power consumption design method is proposed, which is suitable for FPGA implementation. To reduce the dynamic power consumption of integrated circuit (IC) design, the proposed method adopts the dynamic control of the clock frequency. For most of the time, when the port is in the idle state or lower-rate state, users can reduce or even turn off the reading clock frequency and reduce the clock flip frequency in order to reduce the dynamic power consumption. When the receiving rate is high, the reading clock frequency will be improved timely to ensure that no data will lost. Simulated and verified by Modelsim, the proposed method can dynamically control the clock frequency, including the dynamic switching of high-speed and low-speed clock flip rates, or stop of the clock flip. 展开更多
关键词 clock frequency ETHERNET fieldprogrammable gate array low-power consumption.
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An advanced monolithic digitalized random carrier frequency spread-spectrum clock generator for EMI suppression 被引量:1
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作者 郭海燕 陈早 +1 位作者 张波 李肇基 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2010年第6期128-128,I0001,I0002,00129,00130,共3页
A novel monolithic digitalized random carrier frequency modulation spread-spectrum clock generator (RCF-SSCG) is proposed.In this design,the output frequency of the proposed RCF-SSCG changes with the intensity of th... A novel monolithic digitalized random carrier frequency modulation spread-spectrum clock generator (RCF-SSCG) is proposed.In this design,the output frequency of the proposed RCF-SSCG changes with the intensity of the capacitive charge and discharge current.Its analytical model is induced and the effect of the modulation parameters on the spread spectrum is numerically simulated and discussed.Compared with other works,this design has the advantages of small size,low power consumption and good robustness.The circuit has been fabricated in a 0.5μm CMOS process and applied to a class D amplifier in which the proposed RCF-SSCG occupies an area of 0.112 mm^2 and consumes 9 mW.The experimental results confirm the theoretical analyses. 展开更多
关键词 Ransom carrier frequency modulation spread-spectrum clock generator class D amplifier electromagnetic interference
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Measuring clock jumps using pulsar timing 被引量:1
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作者 ZhiXuan Li KeJia Lee +4 位作者 Ricardo Nicolaos Caballero YongHua Xu LongFei Hao Min Wang JianCheng Wang 《Science China(Physics,Mechanics & Astronomy)》 SCIE EI CAS CSCD 2020年第1期112-117,共6页
In this paper,we investigate the statistical signal-processing algorithm to measure the instant local clock jump from the timing data of multiple pulsars.Our algorithm is based on the framework of Bayesian statistics.... In this paper,we investigate the statistical signal-processing algorithm to measure the instant local clock jump from the timing data of multiple pulsars.Our algorithm is based on the framework of Bayesian statistics.In order to make the Bayesian algorithm applicable with limited computational resources,we dedicated our efforts to the analytic marginalization of irrelevant parameters.We found that the widely used parameter for pulsar timing systematics,the"Efac"parameter,can be analytically marginalized.This reduces the Gaussian likelihood to a function very similar to the Student’s t-distribution.Our iterative method to solve the maximum likelihood estimator is also explained in the paper.Using pulsar timing data from the Yunnan Kunming 40-m radio telescope,we demonstrate the application of the method,where 80-ns level precision for the clock jump can be achieved.Such a precision is comparable to that of current commercial time transferring service using satellites.We expect that the current method could help developing the autonomous pulsar time scale. 展开更多
关键词 PULSARS time series analysis clocks and frequency standards
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