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Toward the complete relational graph of fundamental circuit elements
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作者 尚大山 柴一晟 +2 位作者 曹则贤 陆俊 孙阳 《Chinese Physics B》 SCIE EI CAS CSCD 2015年第6期109-114,共6页
A complete and harmonized fundamental circuit relational graph with four linear and four memory elements is con- structed based on some newly defined elements, which provides a guide to developing novel circuit functi... A complete and harmonized fundamental circuit relational graph with four linear and four memory elements is con- structed based on some newly defined elements, which provides a guide to developing novel circuit functionalities in the future. In addition to resistors, capacitors, and inductors, which are defined in terms of a linear relationship between charge q, current i, voltage v, and magnetic flux φ, Chua proposed in 1971 a fourth linear circuit element to directly relate φ and q. A nonlinear resistive device defined in memory i-v relation and dubbed memristor, was later attributed to such an element and has been realized in various material structures. Here we clarify that the memristor is not the true fourth fundamen- tal circuit element but the memory extension to the concept of resistor, in analogy to the extension of memcapacitor to capacitor and meminductor to inductor. Instead, a two-terminal device employing the linear ME effects, termed transtor, directly relates φ and q and should be recognized as the fourth linear element. Moreover, its memory extension, termed memtranstor, is proposed and analyzed here. 展开更多
关键词 MEMRISTOR fundamental circuit element magnetoelectric effect transtor memtranstor
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From Individual to Population:Circuit Organization of Pyramidal Tract and Intratelencephalic Neurons in Mouse Sensorimotor Cortex
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作者 Mei Yao Ayizuohere Tudi +7 位作者 Tao Jiang Xu An Xueyan Jia Anan Li Z.Josh Huang Hui Gong Xiangning Li Qingming Luo 《Research》 2025年第2期880-892,共13页
The sensorimotor cortex participates in diverse functions with different reciprocally connected subregions and projection-defined pyramidal neuron types therein,while the fundamental organizational logic of its circui... The sensorimotor cortex participates in diverse functions with different reciprocally connected subregions and projection-defined pyramidal neuron types therein,while the fundamental organizational logic of its circuit elements at the single-cell level is still largely unclear.Here,using mouse Cre driver lines and highresolution whole-brain imaging to selectively trace the axons and dendrites of cortical pyramidal tract(PT)and intratelencephalic(IT)neurons,we reconstructed the complete morphology of 1,023 pyramidal neurons and generated a projectome of 6 subregions within the sensorimotor cortex.Our morphological data revealed substantial hierarchical and layer differences in the axonal innervation patterns of pyramidal neurons.We found that neurons located in the medial motor cortex had more diverse projection patterns than those in the lateral motor and sensory cortices.The morphological characteristics of IT neurons in layer 5 were more complex than those in layer 2/3.Furthermore,the soma location and morphological characteristics of individual neurons exhibited topographic correspondence.Different subregions and layers were composed of different proportions of projection subtypes that innervate downstream areas differentially.While the axonal terminals of PT neuronal population in each cortical subregion were distributed in specific subdomains of the superior colliculus(SC)and zona incerta(Zl),single neurons selectively innervated a combination of these projection targets.Overall,our data provide a comprehensive list of projection types of pyramidal neurons in the sensorimotor cortex and begin to unveilthe organizational principle of these projection types in different subregions and layers. 展开更多
关键词 reconstructed complete morphology pyr mouse cre driver lines sensorimotor cortex circuit elements intratelencephalic neurons circuit organization hierarchical differences pyramidal tract neurons
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Realization of a flux-driven memtranstor at room temperature
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作者 申世鹏 尚大山 +1 位作者 柴一晟 孙阳 《Chinese Physics B》 SCIE EI CAS CSCD 2016年第2期472-476,共5页
The memtranstor has been proposed to be the fourth fundamental circuit memelement in addition to the memristor,memcapacitor, and meminductor. Here, we demonstrate the memtranstor behavior at room temperature in a devi... The memtranstor has been proposed to be the fourth fundamental circuit memelement in addition to the memristor,memcapacitor, and meminductor. Here, we demonstrate the memtranstor behavior at room temperature in a device made of the magnetoelectric hexaferrite(Ba_(0.5)Sr_(1.5)Co_2Fe_(11) AlO_(22)) where the electric polarization is tunable by external magnetic field. This device shows a nonlinear q–р relationship with a butterfly-shaped hysteresis loop, in agreement with the anticipated memtranstor behavior. The memtranstor, like other memelements, has a great potential in developing more advanced circuit functionalities. 展开更多
关键词 fundamental circuit element magnetoelectric effect MULTIFERROIC memtranstor MEMRISTOR
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Analysis on the Irregular and Asymmetrical Power/Ground Structure by PEEC Modeling
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作者 施丹 曹毅 李征帆 《Journal of Shanghai Jiaotong university(Science)》 EI 2005年第1期1-5,共5页
In order to provide some reference for the design of the power/ground system, a complicated power/ground system in time and frequency domains was analyzed, which is based on PEEC (Partial Element Equivalent Circuit). ... In order to provide some reference for the design of the power/ground system, a complicated power/ground system in time and frequency domains was analyzed, which is based on PEEC (Partial Element Equivalent Circuit). According to the actual requirements, characteristics of some common power/ground structures in time and frequency domains, such as SSN (Simultaneous Switching Noise), are obtained for the future research. The results show the first resonance point is changed with the structure of the power/ground networks. 展开更多
关键词 partial element equivalent circuit(PEEC) power/ground structure impedance between boards simultaneous switching noise(SSN)
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Modeling of Busbars in High Power Neutral Point Clamped Three-Level Inverters 被引量:3
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作者 易荣 赵争鸣 钟玉林 《Tsinghua Science and Technology》 SCIE EI CAS 2008年第1期91-97,共7页
The busbars in high power neutral point clamped three-level inverters are modeled using the Maxwell Q3D Extractor software, which is based on the partial element equivalent circuits method. The equivalent circuits of ... The busbars in high power neutral point clamped three-level inverters are modeled using the Maxwell Q3D Extractor software, which is based on the partial element equivalent circuits method. The equivalent circuits of the busbars and devices model are simulated in the electric simulator PSlM to analyze the effects of the parasitic inductance on the switching characteristics of the integrated gate commutated thyristor (IGCT) in different topology positions. The simulation results agree well with the measured impedance analyzer results and the IGCT test results, which proves the effectiveness of the modeling method for the large, complex busbars. 展开更多
关键词 BUSBARS parasitic inductance partial element equivalent circuits switching characteristics
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A 2.5 GS/s 14-bit D/A converter with 8 to 1 MUX 被引量:1
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作者 张俊安 李广军 +6 位作者 张瑞涛 付东兵 李皎雪 魏亚峰 阎波 刘军 李儒章 《Journal of Semiconductors》 EI CAS CSCD 2016年第3期95-102,共8页
A 2.5 GS/s 14-bit D/A converter(DAC) with 8 to 1 MUX is presented. This 14-bit DAC uses a "5+9"segment PMOS current-steering architecture. A bias circuit which ensures the PMOS current source obtains a larger out... A 2.5 GS/s 14-bit D/A converter(DAC) with 8 to 1 MUX is presented. This 14-bit DAC uses a "5+9"segment PMOS current-steering architecture. A bias circuit which ensures the PMOS current source obtains a larger output impedance under every PVT(process, source voltage and temperature) corner is also presented. The8 to 1 MUX has a 3 stage structure, and a proper timing sequence is designed to ensure reliable data synthesis. A DEM function which is merged with a "5-31"decoder is used to improve the DAC's dynamic performance. This DAC is embedded in a 2.5 GHz direct digital frequency synthesizer(DDS) chip, and is implemented in a 0.18 m CMOS technology, occupies 4.86 2. 28 mm-2 including bond pads(DAC only), and the measured performance is SFDR 〉 40 d B(with and without DEM) for output signal frequency up to 1 GHz. Compared with other present published DACs with a non-analog-resample structure(means return-to-zero or quad-switch structure is unutilized),this paper DAC's clock frequency(2.5 GHz) and higher output frequency SFDR(〉 40 d B, up to 1 GHz) has some competition. 展开更多
关键词 PMOS current-steering D/A converter bias circuit high speed MUX dynamic element match(DEM)
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