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Multi-Level Cache System of Small Spatio-Temporal Data Files Based on Cloud Storage in Smart City
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作者 XU Xiaolin HU Zhihua LIU Xiaojun 《Wuhan University Journal of Natural Sciences》 CAS CSCD 2017年第5期387-394,共8页
In this paper, we present a distributed multi-level cache system based on cloud storage, which is aimed at the low access efficiency of small spatio-temporal data files in information service system of Smart City. Tak... In this paper, we present a distributed multi-level cache system based on cloud storage, which is aimed at the low access efficiency of small spatio-temporal data files in information service system of Smart City. Taking classification attribute of small spatio-temporal data files in Smart City as the basis of cache content selection, the cache system adopts different cache pool management strategies in different levels of cache. The results of experiment in prototype system indicate that multi-level cache in this paper effectively increases the access bandwidth of small spatio-temporal files in Smart City and greatly improves service quality of multiple concurrent access in system. 展开更多
关键词 Smart City spatio-temporal data multi-level cache small file
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Performance Behaviour Analysis of the Present 3-Level Cache System for Multi-Core Processors
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作者 Muhammad Ali Ismail 《Computer Technology and Application》 2012年第11期729-733,共5页
In this paper, a study related to the expected performance behaviour of present 3-level cache system for multi-core systems is presented. For this a queuing model for present 3-level cache system for multi-core proces... In this paper, a study related to the expected performance behaviour of present 3-level cache system for multi-core systems is presented. For this a queuing model for present 3-level cache system for multi-core processors is developed and its possible performance has been analyzed with the increase in number of cores. Various important performance parameters like access time and utilization of individual cache at different level and overall average access time of the cache system is determined. Results for up to 1024 cores have been reported in this paper. 展开更多
关键词 MULTI-CORE memory hierarchy cache access time queuing analysis.
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一种嵌入式微控制器的指令Cache设计方案
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作者 王睿 张艳花 《电子制作》 2025年第4期22-25,共4页
在传统的指令Cache设计方案中,VTag存储器大小取决于处理器的总线宽度以及指令Cache的Cache行数和Cache行大小。本文提出了一种优化指令Cache的电路设计,通过减小指令Cache覆盖的取指空间,在不影响指令Cache对外接口的总线宽度以及Cach... 在传统的指令Cache设计方案中,VTag存储器大小取决于处理器的总线宽度以及指令Cache的Cache行数和Cache行大小。本文提出了一种优化指令Cache的电路设计,通过减小指令Cache覆盖的取指空间,在不影响指令Cache对外接口的总线宽度以及Cache行数和Cache大小的情况下,进一步减小了VTag存储器的大小。本文用DC(Design Compiler)对指令Cache进行综合,结果表明,本文设计实现的指令Cache较传统方案在减少芯片面积的同时,显著提升了电路频率,对嵌入式微控制器的指令Cache设计具有重要的实用价值。 展开更多
关键词 嵌入式 微控制器 处理器 指令cache
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Rubyphi:面向gem5的Cache一致性协议自动化模型检验
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作者 徐学政 方健 +4 位作者 梁少杰 王璐 黄安文 隋京高 李琼 《计算机工程与科学》 北大核心 2025年第7期1141-1151,共11页
Cache一致性协议是多核系统数据一致性的保障,也直接影响内存子系统的性能,一直是微处理器设计和验证的重点。Cache一致性协议的设计和优化通常需借助gem5等软件模拟器快速实现。同时,由于协议设计中存在的错误在仿真测试中具有难触发... Cache一致性协议是多核系统数据一致性的保障,也直接影响内存子系统的性能,一直是微处理器设计和验证的重点。Cache一致性协议的设计和优化通常需借助gem5等软件模拟器快速实现。同时,由于协议设计中存在的错误在仿真测试中具有难触发、难定位和难修复的特点,需借助Murphi等模型检验工具进行形式化验证。然而,基于模拟器的协议设计优化和基于模型检验的协议验证在编程语言和抽象层次上存在巨大差异,设计者需要分别进行模拟器实现和模型检验建模,这不仅增加了时间成本,也为二者的等价性带来了隐患。设计并实现了面向gem5模拟器的Cache一致性协议自动化模型检验方法Rubyphi,通过提取gem5中实现的协议,自动完成基于Murphi的模型检验建模,进而对协议进行形式化验证。实验表明,Rubyphi能够有效地完成gem5中一致性协议的建模和验证,并成功发现了2个gem5现有协议中存在的错误,相关问题和解决方案已得到社区确认。 展开更多
关键词 cache一致性协议 多核处理器 模型检验 形式化验证
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FlyCache:Recommendation-driven edge caching architecture for full life cycle of video streaming
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作者 Shaohua Cao Quancheng Zheng +4 位作者 Zijun Zhan Yansheng Yang Huaqi Lv Danyang Zheng Weishan Zhang 《Digital Communications and Networks》 2025年第4期961-973,共13页
With the rapid development of 5G technology,the proportion of video traffic on the Internet is increasing,bringing pressure on the network infrastructure.Edge computing technology provides a feasible solution for opti... With the rapid development of 5G technology,the proportion of video traffic on the Internet is increasing,bringing pressure on the network infrastructure.Edge computing technology provides a feasible solution for optimizing video content distribution.However,the limited edge node cache capacity and dynamic user requests make edge caching more complex.Therefore,we propose a recommendation-driven edge Caching network architecture for the Full life cycle of video streaming(FlyCache)designed to improve users’Quality of Experience(QoE)and reduce backhaul traffic consumption.FlyCache implements intelligent caching management across three key stages:before-playback,during-playback,and after-playback.Specifically,we introduce a cache placement policy for the before-playback stage,a dynamic prefetching and cache admission policy for the during-playback stage,and a progressive cache eviction policy for the after-playback stage.To validate the effectiveness of FlyCache,we developed a user behavior-driven edge caching simulation framework incorporating recommendation mechanisms.Experiments conducted on the MovieLens and synthetic datasets demonstrate that FlyCache outperforms other caching strategies in terms of byte hit rate,backhaul traffic,and delayed startup rate. 展开更多
关键词 Edge caching cache architecture cache placement cache admission Caching eviction
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Resource Allocation of UAV-Assisted Mobile Edge Computing Systems with Caching
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作者 Pu Dan Feng Wenjiang Zhang Juntao 《China Communications》 2025年第10期269-279,共11页
In this paper,unmanned aerial vehicle(UAV)is adopted to serve as aerial base station(ABS)and mobile edge computing(MEC)platform for wire-less communication systems.When Internet of Things devices(IoTDs)cannot cope wit... In this paper,unmanned aerial vehicle(UAV)is adopted to serve as aerial base station(ABS)and mobile edge computing(MEC)platform for wire-less communication systems.When Internet of Things devices(IoTDs)cannot cope with computation-intensive and/or time-sensitive tasks,part of tasks is offloaded to the UAV side,and UAV process them with its own computing resources and caching resources.Thus,the burden of IoTDs gets relieved under the satisfaction of the quality of service(QoS)require-ments.However,owing to the limited resources of UAV,the cost of whole system,i.e.,that is defined as the weighted sum of energy consumption and time de-lay with caching,should be further optimized while the objective function and the constraints are non-convex.Therefore,we first jointly optimize commu-nication resources B,computing resources F and of-floading rates X with alternating iteration and convex optimization method,and then determine the value of caching decision Y with branch-and-bound(BB)al-gorithm.Numerical results show that UAV assisting partial task offloading with content caching is supe-rior to local computing and full offloading mechanism without caching,and meanwhile the cost of whole sys-tem gets further optimized with our proposed scheme. 展开更多
关键词 CACHING MEC resource allocation UAV
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Age-Optimal Cached Distribution in the Satellite-Integrated Internet of Things via Cross-Slot Directed Graph
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作者 Hu Zhouyong Li Yue +1 位作者 Zhang Hanxu Yang Zhihua 《China Communications》 2025年第6期300-318,共19页
In the Satellite-integrated Internet of Things(S-IoT),data freshness in the time-sensitive scenarios could not be guaranteed over the timevarying topology with current distribution strategies aiming to reduce the tran... In the Satellite-integrated Internet of Things(S-IoT),data freshness in the time-sensitive scenarios could not be guaranteed over the timevarying topology with current distribution strategies aiming to reduce the transmission delay.To address this problem,in this paper,we propose an age-optimal caching distribution mechanism for the high-timeliness data collection in S-IoT by adopting a freshness metric,as called age of information(AoI)through the caching-based single-source multidestinations(SSMDs)transmission,namely Multi-AoI,with a well-designed cross-slot directed graph(CSG).With the proposed CSG,we make optimizations on the locations of cache nodes by solving a nonlinear integer programming problem on minimizing Multi-AoI.In particular,we put up forward three specific algorithms respectively for improving the Multi-AoI,i.e.,the minimum queuing delay algorithm(MQDA)based on node deviation from average level,the minimum propagation delay algorithm(MPDA)based on the node propagation delay reduction,and a delay balanced algorithm(DBA)based on node deviation from average level and propagation delay reduction.The simulation results show that the proposed mechanism can effectively improve the freshness of information compared with the random selection algorithm. 展开更多
关键词 age of information cached distribution satellite-integrated internet of things time-varying graph
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MemSC: A Scan-Resistant and Compact Cache Replacement Framework for Memory-Based Key-Value Cache Systems 被引量:2
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作者 Mei Li Hong-Jun Zhang +1 位作者 Yan-Jun Wu Chen Zhao 《Journal of Computer Science & Technology》 SCIE EI CSCD 2017年第1期55-67,共13页
Memory-based key-value cache systems, such as Memcached and Redis, have become indispensable components of data center infrastructures and have been used to cache performance-critical data to avoid expensive back-end ... Memory-based key-value cache systems, such as Memcached and Redis, have become indispensable components of data center infrastructures and have been used to cache performance-critical data to avoid expensive back-end database accesses. As the memory is usually not large enough to hold all the items, cache replacement must be performed to evict some cached items to make room for the newly coming items when there is no free space. Many real-world workloads target small items and have frequent bursts of scans (a scan is a sequence of one-time access requests). The commonly used LRU policy does not work well under such workloads since LRU needs a large amount of metadata and tends to discard hot items with scans. Small decreases in hit ratio can result in large end-to-end losses in these systems. This paper presents MemSC, which is a scan-resistant and compact cache replacement framework for Memcached. MemSC assigns a multi-granularity reference flag for each item, which requires only a few bits (two bits are enough for general use) per item to support scanresistant cache replacement policies. To evaluate MemSC, we implement three representative cache replacement policies (MemSC-HM, MemSC-LH, and MemSC-LF) on MemSC and test them using various workloads. The experimental results show that MemSC outperforms prior techniques. Compared with the optimized LRU policy in Memcached, MemSC-LH reduces the cache miss ratio and the memory usage of the resulting system by up to 23% and 14% respectively. 展开更多
关键词 key-value cache system cache replacement scan resistance space efficiency
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基于SystemVerilog语言的像素cache验证平台的实现 被引量:2
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作者 杨铮 韩俊刚 +1 位作者 李卯良 刘欢 《电子技术应用》 北大核心 2016年第10期51-53,61,共4页
以SystemVerilog为基础,对自主研发的GPU"萤火虫2号"中像素cache部分搭建可重用的验证平台。该平台可以自动完成整个验证过程,并将验证结果打印到Linux终端和文件当中,方便程序员检查验证结果。实验结果表明,该验证平台对像素... 以SystemVerilog为基础,对自主研发的GPU"萤火虫2号"中像素cache部分搭建可重用的验证平台。该平台可以自动完成整个验证过程,并将验证结果打印到Linux终端和文件当中,方便程序员检查验证结果。实验结果表明,该验证平台对像素cache的功能验证覆盖率可以达到100%,并且具有良好的可重用性,能够全面、正确地完成RTL级功能验证,有效地提高了验证的效率和质量。 展开更多
关键词 像素cache 验证平台 system VERILOG 可重用性
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Joint Optimization of Satisfaction Index and Spectrum Efficiency with Cache Restricted for Resource Allocation in Multi-Beam Satellite Systems 被引量:5
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作者 Pei Zhang Xiaohui Wang +1 位作者 Zhiguo Ma Junde Song 《China Communications》 SCIE CSCD 2019年第2期189-201,共13页
Dynamic resource allocation(DRA) is a key technology to improve system performances in GEO multi-beam satellite systems. And, since the cache resource on the satellite is very valuable and limited, DRA problem under r... Dynamic resource allocation(DRA) is a key technology to improve system performances in GEO multi-beam satellite systems. And, since the cache resource on the satellite is very valuable and limited, DRA problem under restricted cache resources is also an important issue to be studied. This paper mainly investigates the DRA problem of carrier resources under certain cache constraints. What's more, with the aim to satisfy all users' traffic demands as more as possible, and to maximize the utilization of the bandwidth, we formulate a multi-objective optimization problem(MOP) where the satisfaction index and the spectrum efficiency are jointly optimized. A modified strategy SA-NSGAII which combines simulated annealing(SA) and non-dominated sorted genetic algorithm-II(NSGAII) is proposed to approximate the Pareto solution to this MOP problem. Simulation results show the effectiveness of the proposed algorithm in terms of satisfaction index, spectrum efficiency, occupied cache, and etc. 展开更多
关键词 GEO MULTI-BEAM satellite system dynamic resource ALLOCATION SA-NSGAII cache SATISFACTION index spectrum efficiency
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Cache Coherency Design in Pentium Ⅲ SMP System 被引量:1
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作者 LIU Jinsong ZHANG Jiangling GU Xiwu 《Wuhan University Journal of Natural Sciences》 CAS 2006年第2期360-364,共5页
This paper analyzes cache coherency mechanism from the view of system. It firstly discusses caehe-memory hierarchy of Pentium Ⅲ SMP system, including memory area distribution, cache attributes control and bus transac... This paper analyzes cache coherency mechanism from the view of system. It firstly discusses caehe-memory hierarchy of Pentium Ⅲ SMP system, including memory area distribution, cache attributes control and bus transaction. Secondly it analyzes hardware snoopy mechanism of P6 bus and MESI state transitions adopted by Pentium Ⅲ. Based on these, it focuses on how muhiprocessors and the P6 bus cooperate to ensure cache coherency of the whole system, and gives the key of cache coherency design. 展开更多
关键词 snoop cache coherency MESI protocol P6bus Pentium SMP system
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A Novel Architecture of Metadata Management System Based on Intelligent Cache 被引量:1
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作者 SONG Baoyan ZHAO Hongwei +2 位作者 WANG Yan GAO Nan XU Jin 《Wuhan University Journal of Natural Sciences》 CAS 2006年第5期1222-1226,共5页
This paper introduces a novel architecture of metadata management system based on intelligent cache called Metadata Intelligent Cache Controller (MICC). By using an intelligent cache to control the metadata system, ... This paper introduces a novel architecture of metadata management system based on intelligent cache called Metadata Intelligent Cache Controller (MICC). By using an intelligent cache to control the metadata system, MICC can deal with different scenarios such as splitting and merging of queries into sub-queries for available metadata sets in local, in order to reduce access time of remote queries. Application can find results patially from local cache and the remaining portion of the metadata that can be fetched from remote locations. Using the existing metadata, it can not only enhance the fault tolerance and load balancing of system effectively, but also improve the efficiency of access while ensuring the access quality. 展开更多
关键词 data grid global name system (GNS) intelligent cache ntegration data web services resource framework (WSRF)
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多核处理器共享Cache的划分算法 被引量:1
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作者 吕海玉 罗广 +1 位作者 朱嘉炜 张凤登 《电子科技》 2024年第9期27-33,共7页
针对多核处理器性能优化问题,文中深入研究多核处理器上共享Cache的管理策略,提出了基于缓存时间公平性与吞吐率的共享Cache划分算法MT-FTP(Memory Time based Fair and Throughput Partitioning)。以公平性和吞吐率两个评价性指标建立... 针对多核处理器性能优化问题,文中深入研究多核处理器上共享Cache的管理策略,提出了基于缓存时间公平性与吞吐率的共享Cache划分算法MT-FTP(Memory Time based Fair and Throughput Partitioning)。以公平性和吞吐率两个评价性指标建立数学模型,并分析了算法的划分流程。仿真实验结果表明,MT-FTP算法在系统吞吐率方面表现较好,其平均IPC(Instructions Per Cycles)值比UCP(Use Case Point)算法高1.3%,比LRU(Least Recently Used)算法高11.6%。MT-FTP算法对应的系统平均公平性比LRU算法的系统平均公平性高17%,比UCP算法的平均公平性高16.5%。该算法实现了共享Cache划分公平性并兼顾了系统的吞吐率。 展开更多
关键词 片上多核处理器 内存墙 划分 公平性 吞吐率 共享cache 缓存时间 集成计算机
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基于SystemC的Cache一致性协议描述与验证
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作者 张娅 《数字技术与应用》 2013年第5期151-152,211,共3页
FLSAH SCI协议作为Cache一致性协议的一种,具有灵活性、高效性和适应性强等特点,是目前最具发展潜力的Cache一致性协议之一。该协议在继承标准SCI协议低存储开销、维护精确共享信息等优点的同时对标准SCI协议进行优化,得到更为高效、灵... FLSAH SCI协议作为Cache一致性协议的一种,具有灵活性、高效性和适应性强等特点,是目前最具发展潜力的Cache一致性协议之一。该协议在继承标准SCI协议低存储开销、维护精确共享信息等优点的同时对标准SCI协议进行优化,得到更为高效、灵活的FLASH SCI协议。本文用SystemC高层次语言对FLASH SCI协议进行建模与描述,并验证其正确性。模拟结果证明了FLASH SCI协议的正确性以及其在存储开销和执行效率上的优越性。 展开更多
关键词 cache一致性协议 systemC高层次语言 模拟验证 形式化验证 FLASH SCI协议
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GFCache: A Greedy Failure Cache Considering Failure Recency and Failure Frequency for an Erasure-Coded Storage System
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作者 Mingzhu Deng Fang Liu +2 位作者 Ming Zhao Zhiguang Chen Nong Xiao 《Computers, Materials & Continua》 SCIE EI 2019年第1期153-167,共15页
In the big data era,data unavailability,either temporary or permanent,becomes a normal occurrence on a daily basis.Unlike the permanent data failure,which is fixed through a background job,temporarily unavailable data... In the big data era,data unavailability,either temporary or permanent,becomes a normal occurrence on a daily basis.Unlike the permanent data failure,which is fixed through a background job,temporarily unavailable data is recovered on-the-fly to serve the ongoing read request.However,those newly revived data is discarded after serving the request,due to the assumption that data experiencing temporary failures could come back alive later.Such disposal of failure data prevents the sharing of failure information among clients,and leads to many unnecessary data recovery processes,(e.g.caused by either recurring unavailability of a data or multiple data failures in one stripe),thereby straining system performance.To this end,this paper proposes GFCache to cache corrupted data for the dual purposes of failure information sharing and eliminating unnecessary data recovery processes.GFCache employs a greedy caching approach of opportunism to promote not only the failed data,but also sequential failure-likely data in the same stripe.Additionally,GFCache includes a FARC(Failure ARC)catch replacement algorithm,which features a balanced consideration of failure recency,frequency to accommodate data corruption with good hit ratio.The stored data in GFCache is able to support fast read of the normal data access.Furthermore,since GFCache is a generic failure cache,it can be used anywhere erasure coding is deployed with any specific coding schemes and parameters.Evaluations show that GFCache achieves good hit ratio with our sophisticated caching algorithm and manages to significantly boost system performance by reducing unnecessary data recoveries with vulnerable data in the cache. 展开更多
关键词 FAILURE cache GREEDY recovery ERASURE coding FAILURE RECENCY FAILURE frequency
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Power Information System Database Cache Model Based on Deep Machine Learning
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作者 Manjiang Xing 《Intelligent Automation & Soft Computing》 SCIE 2023年第7期1081-1090,共10页
At present,the database cache model of power information system has problems such as slow running speed and low database hit rate.To this end,this paper proposes a database cache model for power information systems ba... At present,the database cache model of power information system has problems such as slow running speed and low database hit rate.To this end,this paper proposes a database cache model for power information systems based on deep machine learning.The caching model includes program caching,Structured Query Language(SQL)preprocessing,and core caching modules.Among them,the method to improve the efficiency of the statement is to adjust operations such as multi-table joins and replacement keywords in the SQL optimizer.Build predictive models using boosted regression trees in the core caching module.Generate a series of regression tree models using machine learning algorithms.Analyze the resource occupancy rate in the power information system to dynamically adjust the voting selection of the regression tree.At the same time,the voting threshold of the prediction model is dynamically adjusted.By analogy,the cache model is re-initialized.The experimental results show that the model has a good cache hit rate and cache efficiency,and can improve the data cache performance of the power information system.It has a high hit rate and short delay time,and always maintains a good hit rate even under different computer memory;at the same time,it only occupies less space and less CPU during actual operation,which is beneficial to power The information system operates efficiently and quickly. 展开更多
关键词 Deep machine learning power information system DATABASE cache model
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基于Cache优化的服务调用方法
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作者 杨国胜 杨毅 +1 位作者 王海 段锴 《数字技术与应用》 2024年第4期60-63,共4页
集中式服务网关通常使用共享内存进行服务实例与治理参数的本地化生产与消费,实现业务处理与服务发现逻辑的解耦,增强系统的稳定性,但频繁的共享内存操作往往带来系统资源利用率和请求处理耗时上的低效。通过引入缓存机制,在服务网关的... 集中式服务网关通常使用共享内存进行服务实例与治理参数的本地化生产与消费,实现业务处理与服务发现逻辑的解耦,增强系统的稳定性,但频繁的共享内存操作往往带来系统资源利用率和请求处理耗时上的低效。通过引入缓存机制,在服务网关的路由组件内部实现并利用针对服务调用优化的Cache,热点数据请求直接从Cache中读取结构化信息,避免了共享内存操作与存储块的编解码,有效地利用缓存空间,提高了数据访问速度,同时减少了共享内存操作中的资源竞争,提高了系统并发。 展开更多
关键词 共享内存 服务网关 缓存机制 服务实例 cache 结构化信息 热点数据 缓存空间
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R-DSP中二级Cache控制器的优化设计
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作者 谭露露 谭勋琼 白创 《电子与封装》 2024年第7期63-68,共6页
针对二级Cache控制器(L2)对于提升R数字信号处理器(R-DSP)访存效率和整体性能的重要作用,结合L2中涉及的内存安全维护和多请求访存仲裁问题,在现有R-DSP中L2基础上实现优化。首先,采用多重分块的存储组织结构,提高访存效率;其次,并行处... 针对二级Cache控制器(L2)对于提升R数字信号处理器(R-DSP)访存效率和整体性能的重要作用,结合L2中涉及的内存安全维护和多请求访存仲裁问题,在现有R-DSP中L2基础上实现优化。首先,采用多重分块的存储组织结构,提高访存效率;其次,并行处理一级Cache控制器请求与外存请求,减小请求处理周期;最后,增加带宽管理与存储保护功能,合理仲裁访存请求并维护存储安全。实验结果表明,相较于传统设计,新设计在保护二级存储安全的同时实现带宽管理式访存仲裁。与现有R-DSP中的L2相比,新设计的存储体单拍最大可响应访存请求数量提升了1倍,一级请求和外存请求的平均处理时钟周期数分别降低了25%和19.6%。 展开更多
关键词 DSP 二级cache 存储结构 并行处理 存储保护 带宽管理
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Efficient cache replacement framework based on access hotness for spacecraft processors
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作者 GAO Xin NIAN Jiawei +1 位作者 LIU Hongjin YANG Mengfei 《中国空间科学技术(中英文)》 CSCD 北大核心 2024年第2期74-88,共15页
A notable portion of cachelines in real-world workloads exhibits inner non-uniform access behaviors.However,modern cache management rarely considers this fine-grained feature,which impacts the effective cache capacity... A notable portion of cachelines in real-world workloads exhibits inner non-uniform access behaviors.However,modern cache management rarely considers this fine-grained feature,which impacts the effective cache capacity of contemporary high-performance spacecraft processors.To harness these non-uniform access behaviors,an efficient cache replacement framework featuring an auxiliary cache specifically designed to retain evicted hot data was proposed.This framework reconstructs the cache replacement policy,facilitating data migration between the main cache and the auxiliary cache.Unlike traditional cacheline-granularity policies,the approach excels at identifying and evicting infrequently used data,thereby optimizing cache utilization.The evaluation shows impressive performance improvement,especially on workloads with irregular access patterns.Benefiting from fine granularity,the proposal achieves superior storage efficiency compared with commonly used cache management schemes,providing a potential optimization opportunity for modern resource-constrained processors,such as spacecraft processors.Furthermore,the framework complements existing modern cache replacement policies and can be seamlessly integrated with minimal modifications,enhancing their overall efficacy. 展开更多
关键词 spacecraft processors cache management replacement policy storage efficiency memory hierarchy MICROARCHITECTURE
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EBCache:A Novel Cache-Based Mechanism for Mitigating the Spectre Attacks for RISC-V Processor
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作者 Wu Dehua Xiao Wan’ang Gao Wanlin 《China Communications》 SCIE CSCD 2024年第12期166-185,共20页
The cache-based covert channel is one of the common vulnerabilities exploited in the Spectre attacks.Current mitigation strategies focus on blocking the eviction-based channel by using a random/encrypted mapping funct... The cache-based covert channel is one of the common vulnerabilities exploited in the Spectre attacks.Current mitigation strategies focus on blocking the eviction-based channel by using a random/encrypted mapping function to translate memory address to the cache address,while the updated-based channel is still vulnerable.In addition,some mitigation strategies are also costly as it needs software and hardware modifications.In this paper,our objective is to devise low-cost,comprehensive-protection techniques for mitigating the Spectre attacks.We proposed a novel cache structure,named EBCache,which focuses on the RISC-V processor and applies the address encryption and blacklist to resist the Spectre attacks.The addresses encryption mechanism increases the difficulty of pruning a minimal eviction set.The blacklist mechanism makes the updated cache lines loaded by the malicious updates invisible.Our experiments demonstrated that the EBCache can prevent malicious modifications.The EBCache,however,reduces the processor’s performance by about 23%but involves only a low-cost modification in the hardware. 展开更多
关键词 cache structure out-of-order execution side-channel attacks the Spectre attacks
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