This paper proposes a novel low distortion high linearity CMOS bootstrapped switch, and the proposed switch can alleviate the nonlinear distortion of the on-resistance by eliminating first order signal-dependent varia...This paper proposes a novel low distortion high linearity CMOS bootstrapped switch, and the proposed switch can alleviate the nonlinear distortion of the on-resistance by eliminating first order signal-dependent variation of the overdrive voltage. Based on a 0.18 mm standard CMOS process, the simulation results show that at 100 MHz sampling clock frequency and 49 MHz input signal with 2Vpp, the proposed switch in differential mode has a Spurious-Free Dynamic Range(SFDR) of 90.1 dB.展开更多
The bootstrap resampling method is applied to an ensemble artificial neural network (ANN) approach (which combines machine learning with physical data obtained from a numerical weather prediction model) to provide a m...The bootstrap resampling method is applied to an ensemble artificial neural network (ANN) approach (which combines machine learning with physical data obtained from a numerical weather prediction model) to provide a multi-ANN model super-ensemble for application to multi-step-ahead forecasting of wind speed and of the associated power generated from a wind turbine. A statistical combination of the individual forecasts from the various ANNs of the super-ensemble is used to construct the best deterministic forecast, as well as the prediction uncertainty interval associated with this forecast. The bootstrapped neural-network methodology is validated using measured wind speed and power data acquired from a wind turbine in an operational wind farm located in northern China.展开更多
A common-gate bootstrapped CMOS rectifier dedicated for VHF（very high frequency） isolated DCDC converter is proposed.It uses common-gate bootstrapped technique to compensate the power loss due to the threshold volta...A common-gate bootstrapped CMOS rectifier dedicated for VHF（very high frequency） isolated DCDC converter is proposed.It uses common-gate bootstrapped technique to compensate the power loss due to the threshold voltage,and to solve the reflux problem in the conventional rectifier circuit.As a result,it improves the power conversion efficiency（PCE） and voltage conversion ratio（VCR）.The design saves almost 90%of the area compared to a previously reported double capacitor structure.In addition,we compare the previous rectifier with the proposed common-gate bootstrapped rectifier in the case of the same area;simulation results show that the PCE and VCR of the proposed structure are superior to other structures.The proposed common-gate bootstrapped rectifier was fabricated by using CSMC 0.5 μm BCD process.The measured maximum PCE is 86%and VCR achieves 77%at the operating frequency of 20 MHz.The average PCE is about 79%and average VCR achieves71%in the frequency range of 30-70 MHz.Measured PCE and VCR have been improved compared to previous results.展开更多
Nonlinearity caused by the clock feed-through of a bootstrapped switch and its compensation techniques are analyzed. All kinds of clock feed-through compensation configurations and their drawbacks are also investigate...Nonlinearity caused by the clock feed-through of a bootstrapped switch and its compensation techniques are analyzed. All kinds of clock feed-through compensation configurations and their drawbacks are also investigated. It is pointed out that the delay path match of the clock boosting circuit is the critical factor that affects the effectiveness of clock feed-through compensation. Based on that, a new clock feed-through compensation configuration and corresponding bootstrapped switch are presented and designed optimally with the UMC mixed-mode/RF 0.18 μm 1P6M P-sub twin-well CMOS process by orientating and elaborately designing the switch MOSFETs that influence the delay path match of the clock boosting circuit. HSPICE simulation results show that the proposed clock feedthrough compensation configuration can not only enhance the sampling accuracy under variations of process, power supply voltage, temperature and capacitors but also decrease the even harmonic, high-order odd harmonic and THD on the whole effectively.展开更多
Reducing carbon emissions is fundamental to achieving carbon neutrality.Existing studies have typically estimated emissions by predicting fossil fuel consumption across sectors under different socioeconomic scenarios;...Reducing carbon emissions is fundamental to achieving carbon neutrality.Existing studies have typically estimated emissions by predicting fossil fuel consumption across sectors under different socioeconomic scenarios;however,uncertainties in future development often lead to deviations from these assumptions.To address this limitation,this study proposes a data-driven approach for evaluating national carbon emissions using historical data.Countries with similar energy consumption patterns were selected as reference samples,and their emission pathways were analyzed to predict future emissions for countries that have not yet reached their peak.Key indicators,including peak levels,timing,plateau duration,and post-peak decline rates,were identified.The results indicate that the trends in unpeaked economies can be effectively assessed based on the emission patterns of countries with comparable energy structures.Applying this framework to China suggests a carbon peak between 2027 and 2030,in the range of 14.207 to 16.234 Gt,followed by a gradual decline from 2031 to 2036.Compared with the average results of the existing studies,the predicted minimum and maximum emissions show error margins of 10.1% and 1.41%,respectively.This study proposes a top-down methodology that provides a transparent,reproducible,and empirical framework for forecasting carbon emission pathways,thereby offering a scientific basis for assessing countries that have not yet reached their emissions peak.展开更多
基金Supported by the National Natural Science Foundation of China(Grant No.61404043)Doctoral Program Foundation of Institutions of Higher Education of China(No.201201111-20008)Key Laboratory of Infrared Imaging Materials and Detectors,Shanghai Institute of Technical Physics,Chinese Academy of Sciences(No.IIMDKFJJ-13-06)
文摘This paper proposes a novel low distortion high linearity CMOS bootstrapped switch, and the proposed switch can alleviate the nonlinear distortion of the on-resistance by eliminating first order signal-dependent variation of the overdrive voltage. Based on a 0.18 mm standard CMOS process, the simulation results show that at 100 MHz sampling clock frequency and 49 MHz input signal with 2Vpp, the proposed switch in differential mode has a Spurious-Free Dynamic Range(SFDR) of 90.1 dB.
文摘The bootstrap resampling method is applied to an ensemble artificial neural network (ANN) approach (which combines machine learning with physical data obtained from a numerical weather prediction model) to provide a multi-ANN model super-ensemble for application to multi-step-ahead forecasting of wind speed and of the associated power generated from a wind turbine. A statistical combination of the individual forecasts from the various ANNs of the super-ensemble is used to construct the best deterministic forecast, as well as the prediction uncertainty interval associated with this forecast. The bootstrapped neural-network methodology is validated using measured wind speed and power data acquired from a wind turbine in an operational wind farm located in northern China.
文摘A common-gate bootstrapped CMOS rectifier dedicated for VHF（very high frequency） isolated DCDC converter is proposed.It uses common-gate bootstrapped technique to compensate the power loss due to the threshold voltage,and to solve the reflux problem in the conventional rectifier circuit.As a result,it improves the power conversion efficiency（PCE） and voltage conversion ratio（VCR）.The design saves almost 90%of the area compared to a previously reported double capacitor structure.In addition,we compare the previous rectifier with the proposed common-gate bootstrapped rectifier in the case of the same area;simulation results show that the PCE and VCR of the proposed structure are superior to other structures.The proposed common-gate bootstrapped rectifier was fabricated by using CSMC 0.5 μm BCD process.The measured maximum PCE is 86%and VCR achieves 77%at the operating frequency of 20 MHz.The average PCE is about 79%and average VCR achieves71%in the frequency range of 30-70 MHz.Measured PCE and VCR have been improved compared to previous results.
基金supported by the National Natural Science Foundation of China(No.60206006)the New Century Excellent Talents of Ministry of Education of China(No.NCET-05-0851)+1 种基金the Cultivation Fund of the Key Scientific and Technical Innovation Project,Ministry of Education of China Program(No.708083)the Applied Materials Innovation Fund(No.XA-AM-200701)
文摘Nonlinearity caused by the clock feed-through of a bootstrapped switch and its compensation techniques are analyzed. All kinds of clock feed-through compensation configurations and their drawbacks are also investigated. It is pointed out that the delay path match of the clock boosting circuit is the critical factor that affects the effectiveness of clock feed-through compensation. Based on that, a new clock feed-through compensation configuration and corresponding bootstrapped switch are presented and designed optimally with the UMC mixed-mode/RF 0.18 μm 1P6M P-sub twin-well CMOS process by orientating and elaborately designing the switch MOSFETs that influence the delay path match of the clock boosting circuit. HSPICE simulation results show that the proposed clock feedthrough compensation configuration can not only enhance the sampling accuracy under variations of process, power supply voltage, temperature and capacitors but also decrease the even harmonic, high-order odd harmonic and THD on the whole effectively.
基金The National Natural Science Foundation of China(No.52470211)Special Foundation of Jiangsu Province Science and Technology Plan(No.BZ2024017)RECLAIM Network Plus Project(No.EP/W034034/1).
文摘Reducing carbon emissions is fundamental to achieving carbon neutrality.Existing studies have typically estimated emissions by predicting fossil fuel consumption across sectors under different socioeconomic scenarios;however,uncertainties in future development often lead to deviations from these assumptions.To address this limitation,this study proposes a data-driven approach for evaluating national carbon emissions using historical data.Countries with similar energy consumption patterns were selected as reference samples,and their emission pathways were analyzed to predict future emissions for countries that have not yet reached their peak.Key indicators,including peak levels,timing,plateau duration,and post-peak decline rates,were identified.The results indicate that the trends in unpeaked economies can be effectively assessed based on the emission patterns of countries with comparable energy structures.Applying this framework to China suggests a carbon peak between 2027 and 2030,in the range of 14.207 to 16.234 Gt,followed by a gradual decline from 2031 to 2036.Compared with the average results of the existing studies,the predicted minimum and maximum emissions show error margins of 10.1% and 1.41%,respectively.This study proposes a top-down methodology that provides a transparent,reproducible,and empirical framework for forecasting carbon emission pathways,thereby offering a scientific basis for assessing countries that have not yet reached their emissions peak.
