SRAM-based computing-in-memory(SRAM-CIM)is expected to solve the“Memory Wall”problem.For the digital domain SRAM-CIM,full-precision digital logic has been utilized to achieve high computational accuracy.However,the ...SRAM-based computing-in-memory(SRAM-CIM)is expected to solve the“Memory Wall”problem.For the digital domain SRAM-CIM,full-precision digital logic has been utilized to achieve high computational accuracy.However,the energy and area efficiency advantages of CIM cannot be fully utilized under error-resilient neural networks(NNs)with given quantization bit-width.Therefore,an all-digital Bit-wise Approximate compressor configurable In-SRAM-computing macro for Energy-efficient NN acceleration,with a data-aware weight Remapping method(BASER),is proposed in this paper.Leveraging the NN error resilience property,six energy-efficient bit-wise compressor configurations are presented under 4b/4b and 3b/3b NN quantization,respectively.Concurrently,a data-aware weight remapping approach is proposed to enhance the NN accuracy without supplementary retraining further.Evaluations of VGG-9 and ResNet-18 on CIFAR-10 and CIFAR-100 datasets show that the proposed BASER achieves 1.35x and 1.29x improvement in energy efficiency,as well as limited accuracy loss and improved NN accuracy,as compared to the previous full-precision and approximate SRAM-CIM design,respectively.展开更多
如何在海量数据集中提高频繁项集的挖掘效率是目前研究的热点.随着数据量的不断增长,使用传统算法产生频繁项集的计算代价依然很高.为此,提出一种基于Spark的频繁项集快速挖掘算法(fast mining algorithm of frequent itemset based on ...如何在海量数据集中提高频繁项集的挖掘效率是目前研究的热点.随着数据量的不断增长,使用传统算法产生频繁项集的计算代价依然很高.为此,提出一种基于Spark的频繁项集快速挖掘算法(fast mining algorithm of frequent itemset based on spark,Fmafibs),利用位运算速度快的特点,设计了一种新颖的模式增长策略.该算法首先采用位串表达项集,利用位运算来快速生成候选项集;其次,针对超长位串计算效率低的问题,考虑将事务垂直分组处理,将同一事务不同组之间的频繁项集通过连接获得候选项集,最后进行聚合筛选得到最终频繁项集.算法在Spark环境下,以频繁项集挖掘领域基准数据集进行实验验证.实验结果表明所提方法在保证挖掘结果准确的同时,有效地提高了挖掘效率.展开更多
传统GPS接收机内部往往使用专用集成芯片进行基带处理。针对其成本高、可配置性低的缺点,提出了一种新型软件相关器。采用Microsoft Visual C++ 6.0对硬件相关器进行软件模拟,并使用逐位并行算法将大量的乘法运算转换成异或运算,大大减...传统GPS接收机内部往往使用专用集成芯片进行基带处理。针对其成本高、可配置性低的缺点,提出了一种新型软件相关器。采用Microsoft Visual C++ 6.0对硬件相关器进行软件模拟,并使用逐位并行算法将大量的乘法运算转换成异或运算,大大减小了软件相关器的运算量。为了进一步验证该软件相关器的可行性,采用含有该相关器的GPS软件接收机对实际GPS信号进行处理,结果表明该软件相关器完全能够满足信号捕获与跟踪过程中的相关运算要求。展开更多
Currently, 1 bit or 2 bit signal quantization is widely used in satellite navigation software receivers. The bit-wise parallel algorithm has been proposed for 1 bit and 2 bit signal quantization, which performs correl...Currently, 1 bit or 2 bit signal quantization is widely used in satellite navigation software receivers. The bit-wise parallel algorithm has been proposed for 1 bit and 2 bit signal quantization, which performs correlation with high efficiency. In order to improve the performance of the correlator, this paper proposes a new 1.5 bit quantization method. Theoretical analyses are made from the aspects of complexity and quantization loss, and performance comparison between 1.5 bit quantization correlator and traditional correlators is discussed. The results show that the 1.5 bit quantization algorithm can save about 30 percent complexity under similar quantization loss, reduce more than 0.5 dB signal noise ratio（SNR） loss under similar complexity. It shows great performance improvement for correlators of satellite navigation software receivers.展开更多
Hash-based message authentication code(HMAC)is widely used in authentication and message integrity.As a Chinese hash algorithm,the SM3 algorithm is gradually winning domestic market value in China.The side channel sec...Hash-based message authentication code(HMAC)is widely used in authentication and message integrity.As a Chinese hash algorithm,the SM3 algorithm is gradually winning domestic market value in China.The side channel security of HMAC based on SM3(HMAC-SM3)is still to be evaluated,especially in hardware implementation,where only intermediate values stored in registers have apparent Hamming distance leakage.In addition,the algorithm structure of SM3 determines the difficulty in HMAC-SM3 side channel analysis.In this paper,a skillful bit-wise chosen-plaintext correlation power attack procedure is proposed for HMAC-SM3 hardware implementation.Real attack experiments on a field programmable gate array(FPGA)board have been performed.Experimental results show that we can recover the key from the hypothesis space of 2256 based on the proposed procedure.展开更多
基金supported in part by the National Key R&D Program of China under Grant 2023YFB450220in part by the National Natural Science Foundation of China under Grant 62174110 and Grant 62104025in part by the Natural Science Foundation of Shanghai under Grant 23ZR1433200.
文摘SRAM-based computing-in-memory(SRAM-CIM)is expected to solve the“Memory Wall”problem.For the digital domain SRAM-CIM,full-precision digital logic has been utilized to achieve high computational accuracy.However,the energy and area efficiency advantages of CIM cannot be fully utilized under error-resilient neural networks(NNs)with given quantization bit-width.Therefore,an all-digital Bit-wise Approximate compressor configurable In-SRAM-computing macro for Energy-efficient NN acceleration,with a data-aware weight Remapping method(BASER),is proposed in this paper.Leveraging the NN error resilience property,six energy-efficient bit-wise compressor configurations are presented under 4b/4b and 3b/3b NN quantization,respectively.Concurrently,a data-aware weight remapping approach is proposed to enhance the NN accuracy without supplementary retraining further.Evaluations of VGG-9 and ResNet-18 on CIFAR-10 and CIFAR-100 datasets show that the proposed BASER achieves 1.35x and 1.29x improvement in energy efficiency,as well as limited accuracy loss and improved NN accuracy,as compared to the previous full-precision and approximate SRAM-CIM design,respectively.
文摘如何在海量数据集中提高频繁项集的挖掘效率是目前研究的热点.随着数据量的不断增长,使用传统算法产生频繁项集的计算代价依然很高.为此,提出一种基于Spark的频繁项集快速挖掘算法(fast mining algorithm of frequent itemset based on spark,Fmafibs),利用位运算速度快的特点,设计了一种新颖的模式增长策略.该算法首先采用位串表达项集,利用位运算来快速生成候选项集;其次,针对超长位串计算效率低的问题,考虑将事务垂直分组处理,将同一事务不同组之间的频繁项集通过连接获得候选项集,最后进行聚合筛选得到最终频繁项集.算法在Spark环境下,以频繁项集挖掘领域基准数据集进行实验验证.实验结果表明所提方法在保证挖掘结果准确的同时,有效地提高了挖掘效率.
文摘传统GPS接收机内部往往使用专用集成芯片进行基带处理。针对其成本高、可配置性低的缺点,提出了一种新型软件相关器。采用Microsoft Visual C++ 6.0对硬件相关器进行软件模拟,并使用逐位并行算法将大量的乘法运算转换成异或运算,大大减小了软件相关器的运算量。为了进一步验证该软件相关器的可行性,采用含有该相关器的GPS软件接收机对实际GPS信号进行处理,结果表明该软件相关器完全能够满足信号捕获与跟踪过程中的相关运算要求。
基金supported by the National Natural Science Foundation of China(61101076413741376147017)
文摘Currently, 1 bit or 2 bit signal quantization is widely used in satellite navigation software receivers. The bit-wise parallel algorithm has been proposed for 1 bit and 2 bit signal quantization, which performs correlation with high efficiency. In order to improve the performance of the correlator, this paper proposes a new 1.5 bit quantization method. Theoretical analyses are made from the aspects of complexity and quantization loss, and performance comparison between 1.5 bit quantization correlator and traditional correlators is discussed. The results show that the 1.5 bit quantization algorithm can save about 30 percent complexity under similar quantization loss, reduce more than 0.5 dB signal noise ratio（SNR） loss under similar complexity. It shows great performance improvement for correlators of satellite navigation software receivers.
基金Project supported by the Major Program of the Ministry of Industry and Information Technology of China(No.2017ZX01030301)the Beijing Natural Science Foundation of China(No.4162053)
文摘Hash-based message authentication code(HMAC)is widely used in authentication and message integrity.As a Chinese hash algorithm,the SM3 algorithm is gradually winning domestic market value in China.The side channel security of HMAC based on SM3(HMAC-SM3)is still to be evaluated,especially in hardware implementation,where only intermediate values stored in registers have apparent Hamming distance leakage.In addition,the algorithm structure of SM3 determines the difficulty in HMAC-SM3 side channel analysis.In this paper,a skillful bit-wise chosen-plaintext correlation power attack procedure is proposed for HMAC-SM3 hardware implementation.Real attack experiments on a field programmable gate array(FPGA)board have been performed.Experimental results show that we can recover the key from the hypothesis space of 2256 based on the proposed procedure.
