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Modular Verification of SPARCv8 Code 被引量:1
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作者 Jun-Peng Zha Xin-Yu Feng Lei Qiao 《Journal of Computer Science & Technology》 SCIE EI CSCD 2020年第6期1382-1405,共24页
Inline assembly code is common in system software to interact with the underlying hardware platforms. The safety and correctness of the assembly code is crucial to guarantee the safety of the whole system. In this pap... Inline assembly code is common in system software to interact with the underlying hardware platforms. The safety and correctness of the assembly code is crucial to guarantee the safety of the whole system. In this paper, we propose a practical Hoare-style program logic for verifying SPARC (Scalable Processor Architecture) assembly code. The logic supports modular reasoning about the main features of SPARCv8 ISA (instruction set architecture), including delayed control transfers, delayed writes to special registers, and register windows. It also supports relational reasoning for refinement verification. We have applied it to verify that there is a contextual refinement between a context switch routine in SPARCv8 and a switch primitive. The program logic and its soundness proof have been mechanized in Coq. 展开更多
关键词 Scalable Processor Architecture Version 8(SPARCv8) assembly code verification context switch COQ refinement verification
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