A highly integrated monolithic Multi-Service Transport Platform （MSTP） Application Specified Integrated Circuit （AS1C） MSEOSX8-6 has been fabricated with 0.18μm CMOS technology incorporating 26×10^6 transist...A highly integrated monolithic Multi-Service Transport Platform （MSTP） Application Specified Integrated Circuit （AS1C） MSEOSX8-6 has been fabricated with 0.18μm CMOS technology incorporating 26×10^6 transistors. The chip is designed to provide standard framing and mapping of 10/100/1000Mbit/s Ethernet, Resilient Packet Ring （RPR） and E1 traffics into protected Synchronous Digital Hierarchy （SDH） STM-1 transport payloads using hitless rate adaptation for optimum bandwidth utilization. It consumes 4W of power on average and utilizes 756 pin enhanced BGA package.展开更多
Modern pixel detectors in nuclear and particle physics experiments and also in nuclear imaging,starve for highly integrated application specified integrated circuit(ASIC),whereas in China the study of ASIC still stays...Modern pixel detectors in nuclear and particle physics experiments and also in nuclear imaging,starve for highly integrated application specified integrated circuit(ASIC),whereas in China the study of ASIC still stays far away from practical application.The lack of ASIC strictly limits the research and development of domestic high energy physics field.A 12-bit multichannel ADC designed for high density readout is introduced as a major candidate for solution.A precise model is discussed and the simulation fully agrees with the model,which indicates a key principle of design.Design is performed according to the given rule,and novel layout techniques are carried out.Measurement results in all aspects are also obtained,showing an excellent real performance,which satisfies the practical requirement.展开更多
文摘A highly integrated monolithic Multi-Service Transport Platform （MSTP） Application Specified Integrated Circuit （AS1C） MSEOSX8-6 has been fabricated with 0.18μm CMOS technology incorporating 26×10^6 transistors. The chip is designed to provide standard framing and mapping of 10/100/1000Mbit/s Ethernet, Resilient Packet Ring （RPR） and E1 traffics into protected Synchronous Digital Hierarchy （SDH） STM-1 transport payloads using hitless rate adaptation for optimum bandwidth utilization. It consumes 4W of power on average and utilizes 756 pin enhanced BGA package.
基金supported by the National Natural Science Foundation of China(Grant No.10735060)
文摘Modern pixel detectors in nuclear and particle physics experiments and also in nuclear imaging,starve for highly integrated application specified integrated circuit(ASIC),whereas in China the study of ASIC still stays far away from practical application.The lack of ASIC strictly limits the research and development of domestic high energy physics field.A 12-bit multichannel ADC designed for high density readout is introduced as a major candidate for solution.A precise model is discussed and the simulation fully agrees with the model,which indicates a key principle of design.Design is performed according to the given rule,and novel layout techniques are carried out.Measurement results in all aspects are also obtained,showing an excellent real performance,which satisfies the practical requirement.
