Today, along with the prevalent use of portable equipment, wireless, and other battery powered systems, the demand for amplifiers with a high gain-bandwidth product（GBW）, slew rate（SR）, and at the same time very l...Today, along with the prevalent use of portable equipment, wireless, and other battery powered systems, the demand for amplifiers with a high gain-bandwidth product（GBW）, slew rate（SR）, and at the same time very low static power dissipation is growing. In this work, an operational transconductance amplifier（OTA） with an enhanced SR is proposed. By inserting a sensing resistor in the input port of the current mirror in the OTA, the voltage drop across the resistor is converted into an output current containing a term in proportion to the square of the voltage, and then the SR of the proposed OTA is significantly enhanced and the current dissipation can be reduced. The proposed OTA is designed and simulated with a 0.5μm complementary metal oxide semiconductor（CMOS） process. The simulation results show that the SR is 4.54V/μs, increased by 8.25 times than that of the conventional design, while the current dissipation is only 87.3%.展开更多
This article presents a low voltage low power configuration of current differencing transconductance amplifier（CDTA）based on floating gate MOSFET.The proposed CDTA variant operates at lower supply voltage±1.4 V...This article presents a low voltage low power configuration of current differencing transconductance amplifier（CDTA）based on floating gate MOSFET.The proposed CDTA variant operates at lower supply voltage±1.4 V with total static power dissipation of 2.60 mW due to the low voltage feature of floating gate MOSFET.High transconductance up to 6.21 mA/V is achieved with extended linear range of the circuit i.e.±130μA.Two applications are illustrated to demonstrate the effectiveness of the proposed active block.A quadrature oscillator is realized using FGMOS based CDTA,two capacitors,and a resistor.The resistor is implemented using two NMOSFETs to provide high linearity and tunablility.Another application is the Schmitt trigger circuit based on the proposed CDTA variant.All circuits are simulated by using SPICE and TSMC 130 nm technology.展开更多
This research,based on Mason's formula,proposes a novel design for a second-order transconductance-mode universal filter with the operational transconductance amplifier(OTA)as the core and the second-generation cu...This research,based on Mason's formula,proposes a novel design for a second-order transconductance-mode universal filter with the operational transconductance amplifier(OTA)as the core and the second-generation current-controlled conveyor(CCCⅡ)as the auxiliary.The circuit incorporates two OTAs,one CCCⅡ,two grounded capacitors,and one grounded resistor.The quality factor Q and natural frequency fo of the filter can be electronically tuned and are not sensitive to temperature.The input and output terminals of the cir-cuit exhibit no loading effect,and the sensitivity of the circuit is low.At last,alternating frequency analysis,parameter scanning analysis,and temperature scanning analysis have been carried out by using Multisim software,confirming the correctness and effectiveness of the designed circuit.展开更多
Based on sixteen nullor-mirror models of the voltage differencing transconductance amplifier (VDTA) and port admittance matrices of the tow-Thomas (T-T) filter with orthogonal control between the characteristic freque...Based on sixteen nullor-mirror models of the voltage differencing transconductance amplifier (VDTA) and port admittance matrices of the tow-Thomas (T-T) filter with orthogonal control between the characteristic frequency(f_0) and figure of merit (Q),two different categories of the voltage-mode and transconductance-mode T-T filters are synthesized by the means of the nodal admittance matrix (NAM) expansion method.The category A filter that employs two compressive VDTAs and two grounded capacitors includes four structures,and the category B filter that uses two compressive VDTAs,two grounded capacitors,and one grounded resistor,also includes four structures.These circuits are suitable for integrated circuit manufacture,and their parameters f_0 and Q can be orthogonally adjusted with varying the bias currents of VDTAs.After the paper and pencil test is completed,the computer analyses,including alternating current (AC),parameter sweep,Monte Carlo (MC),and noise analyses,are performed to support the synthesis approach.展开更多
A complete state variable current-mode biquadratic filter built by duo-output CCII (DOCCII) with variable current gain is presented. All the coefficients of the filter can be independently tuned through the variable c...A complete state variable current-mode biquadratic filter built by duo-output CCII (DOCCII) with variable current gain is presented. All the coefficients of the filter can be independently tuned through the variable current gain factors of the DOCCII. Based on the principles upon which the general biquadratic filter was constructed, a universal electronically tunable current-mode filter is proposed which implements the low-pass, high-pass, band-pass, band-suppress and all-pass second order transfer functions simultaneously. The PSPICE simulations of frequency responses of second-order filter of are also given.展开更多
This paper presents a new first order all pass filter configurations. The proposed all pass filter configuration employs two configurations namely VDVTA and OTAs based first order all pass filter configuration. The fi...This paper presents a new first order all pass filter configurations. The proposed all pass filter configuration employs two configurations namely VDVTA and OTAs based first order all pass filter configuration. The first proposed configuration employs a single VDVTA and one grounded capacitor whereas the second proposed configuration employs two OTAs and one grounded capacitor. Both types of proposed configurations are fully electronically tunable and their quality factors do not depend on tunable pole frequency range. The reported configurations yield low active and passive sensitivities and also have low power consumption with very low supply voltage ± 0.85 V with Bias Voltage ± 0.50 V. The PSPICE simulation of the proposed VDVTA and two OTAs based first order all pass filter configurations are verified using 0.18 μm CMOS Technology Process Parameters.展开更多
This paper presents a new current mode (CM) single-input and multi-output (SIMO)-type biquad using two multiple output OTAs and one current follower as an active device and having two grounded capacitors. This SIMO ty...This paper presents a new current mode (CM) single-input and multi-output (SIMO)-type biquad using two multiple output OTAs and one current follower as an active device and having two grounded capacitors. This SIMO type circuit realizes all the five filter functions as low pass, band pass, high pass, band reject and all pass filter transfer functions simultaneously. This circuit has the unity gain transfer function for all the five types of filters. The circuit enjoys electronic tunability of angular frequency and bandwidth. The 0.18 μm TSMC technology process parameters have been utilized to test and verify the performance characteristics of the circuit using PSPICE. The sensitivity analysis, transient response and calculations of total harmonic distortion have also been shown.展开更多
Technology development and continuous down scaling in CMOS fabrication makes Mixed Signal Integrated Circuits (MSIC) more vulnerable to process variation. This paper presents a well defined novel design methodology fo...Technology development and continuous down scaling in CMOS fabrication makes Mixed Signal Integrated Circuits (MSIC) more vulnerable to process variation. This paper presents a well defined novel design methodology for process variability aware design by incorporating the major challenge of statistical circuit performance relating the device and circuit level variation in an accurate and efficient manner to improve the reliability, robustness and stability of the circuit. The device sensitive parameters are identified and accurately quantified by continuous realistic assessments using statistical methods. The modularity of the methodology can be validated by the output performance obtained from the gain and phase response of OTA which is highly stable when subjected to worst case process variation scenario. In the proposed optimization, the circuit is strengthened by fixing the optimum aspect ratio without adding any additional compensation devices complicating the circuit resulting in low power consumption of only 0.116 mW in standard CMOS 0.18 μm technology with 1.8 V power supply.展开更多
This paper presents a study of fractional order quadrature oscillators based on current-controlled current follower transconductance amplifiers (CCCFTA). The design realisation and performance of the fractional order ...This paper presents a study of fractional order quadrature oscillators based on current-controlled current follower transconductance amplifiers (CCCFTA). The design realisation and performance of the fractional order quadrature oscillators have been presented. The quadrature oscillators are constructed using three fractional capacitors of orders α = 0.5. The fractional capacitor is not available on the market or in the PSPICE program. Fortunately, the fractional capacitor can be realised by using the approximate method for the RC ladder network approximation. The oscillation frequency and oscillation condition can be electronically/orthogonally controlled via input bias currents. Due to high-output impedances, the proposed circuit enables easy cascading in current-mode (CM). The PSPICE simulation results are depicted, and the given results agree well with the anticipated theoretical outcomes.展开更多
To meet the demands for a number of LEDs,a novel charge pump circuit with current mode control is proposed.Regulation is achieved by operating the current mirrors and the output current of the operational transconduct...To meet the demands for a number of LEDs,a novel charge pump circuit with current mode control is proposed.Regulation is achieved by operating the current mirrors and the output current of the operational transconductance amplifier.In the steady state,the input current from power voltage retains constant,so reducing the noise induced on the input voltage source and improving the output voltage ripple.The charge pump small-signal model is used to describe the device’s dynamic behavior and stability.Analytical predictions were verified by Hspice simulation and testing.Load driving is up to 800 mA with a power voltage of 3.6 V,and the output voltage ripple is less than 45 mV.The output response time is less than 8μs,and the load current jumps from 400 to 800 mA.展开更多
A low power digital operational transconductance amplifier （OTA） was developed for low voltage switched capacitor applications. The OTA has a high slew rate （SR） and a large open loop gain with a dif- ferential ps...A low power digital operational transconductance amplifier （OTA） was developed for low voltage switched capacitor applications. The OTA has a high slew rate （SR） and a large open loop gain with a dif- ferential pseudo-two-stage Class-AB structure. A fully compensated depletion mode capacitor is used in the switched capacitor common mode feedback block instead of a metal-insulator-metal （MIM） capacitor to reduce the fabrication cost. Simulations show that with a 1.0-V supply voltage and a 34-pF load at each output terminal, this digital differential pseudo-two-stage Class-AB OTA realized in 0.13-μm technology achieves a 63.5-dB DC gain and a 0.83-V output swing. The slew rate is ±16.29V/μs and the total power dissipation is only 82 μW.展开更多
A fully-differential switched-capacitor sample-and-hold （S/H） circuit used in a 10-bit 50-MS/s pipeline analog-to-digital converter （ADC） was designed and fabricated using a 0.35-μm CMOS process. Capacitor flip-a...A fully-differential switched-capacitor sample-and-hold （S/H） circuit used in a 10-bit 50-MS/s pipeline analog-to-digital converter （ADC） was designed and fabricated using a 0.35-μm CMOS process. Capacitor flip-around architecture was used in the S/H circuit to lower the power consumption. In addition, a gain-boosted operational transconductance amplifier （OTA） was designed with a DC gain of 94 dB and a unit gain bandwidth of 460 MHz at a phase margin of 63 degree, which matches the S/H circuit. A novel double-side bootstrapped switch was used, improving the precision of the whole circuit. The measured results have shown that the S/H circuit reaches a spurious free dynamic range （SFDR） of 67 dB and a signal-to-noise ratio （SNR） of 62.1 dB for a 2.5 MHz input signal with 50 MS/s sampling rate. The 0.12mm^2 S/H circuit operates from a 3.3 V supply and consumes 13.6 mW.展开更多
A fourth-order Gm-C Chebyshev low-pass filter is presented as channel selection filter for reconfigurable multi-mode wireless receivers. Low-noise technologies are proposed in optimizing the noise characteristics of b...A fourth-order Gm-C Chebyshev low-pass filter is presented as channel selection filter for reconfigurable multi-mode wireless receivers. Low-noise technologies are proposed in optimizing the noise characteristics of both the Gm cells and the filter topology. A frequency tuning strategy is used by tuning both the transconductance of the Gm cells and the capacitance of the capacitor banks. To achieve accurate cut-off frequencies, an on-chip calibration circuit is presented to compensate for the frequency inaccuracy introduced by process variation. The filter is fabricated in a 0.13 m CMOS process. It exhibits a wide programmable bandwidth from 322.5 k Hz to20 MHz. Measured results show that the filter has low input referred noise of 5.9 n V/（Hz）^（1/2） and high out-of-band IIP3 of 16.2 d Bm. It consumes 4.2 and 9.5 m W from a 1 V power supply at its lowest and highest cut-off frequencies respectively.展开更多
基金supported in part by the National Natural Science Foundation of China under Grant No.61274027the National Key Laboratory of Analog Integrated Circuit under Grant No.9140c90503140c09048
文摘Today, along with the prevalent use of portable equipment, wireless, and other battery powered systems, the demand for amplifiers with a high gain-bandwidth product（GBW）, slew rate（SR）, and at the same time very low static power dissipation is growing. In this work, an operational transconductance amplifier（OTA） with an enhanced SR is proposed. By inserting a sensing resistor in the input port of the current mirror in the OTA, the voltage drop across the resistor is converted into an output current containing a term in proportion to the square of the voltage, and then the SR of the proposed OTA is significantly enhanced and the current dissipation can be reduced. The proposed OTA is designed and simulated with a 0.5μm complementary metal oxide semiconductor（CMOS） process. The simulation results show that the SR is 4.54V/μs, increased by 8.25 times than that of the conventional design, while the current dissipation is only 87.3%.
文摘This article presents a low voltage low power configuration of current differencing transconductance amplifier（CDTA）based on floating gate MOSFET.The proposed CDTA variant operates at lower supply voltage±1.4 V with total static power dissipation of 2.60 mW due to the low voltage feature of floating gate MOSFET.High transconductance up to 6.21 mA/V is achieved with extended linear range of the circuit i.e.±130μA.Two applications are illustrated to demonstrate the effectiveness of the proposed active block.A quadrature oscillator is realized using FGMOS based CDTA,two capacitors,and a resistor.The resistor is implemented using two NMOSFETs to provide high linearity and tunablility.Another application is the Schmitt trigger circuit based on the proposed CDTA variant.All circuits are simulated by using SPICE and TSMC 130 nm technology.
基金Supported by the Natural Science Foundation of Shaanxi Province(2017JM6087)。
文摘This research,based on Mason's formula,proposes a novel design for a second-order transconductance-mode universal filter with the operational transconductance amplifier(OTA)as the core and the second-generation current-controlled conveyor(CCCⅡ)as the auxiliary.The circuit incorporates two OTAs,one CCCⅡ,two grounded capacitors,and one grounded resistor.The quality factor Q and natural frequency fo of the filter can be electronically tuned and are not sensitive to temperature.The input and output terminals of the cir-cuit exhibit no loading effect,and the sensitivity of the circuit is low.At last,alternating frequency analysis,parameter scanning analysis,and temperature scanning analysis have been carried out by using Multisim software,confirming the correctness and effectiveness of the designed circuit.
基金supported by the Natural Science Foundation of Shaanxi Province,China under Grant No. 2017JM6087。
文摘Based on sixteen nullor-mirror models of the voltage differencing transconductance amplifier (VDTA) and port admittance matrices of the tow-Thomas (T-T) filter with orthogonal control between the characteristic frequency(f_0) and figure of merit (Q),two different categories of the voltage-mode and transconductance-mode T-T filters are synthesized by the means of the nodal admittance matrix (NAM) expansion method.The category A filter that employs two compressive VDTAs and two grounded capacitors includes four structures,and the category B filter that uses two compressive VDTAs,two grounded capacitors,and one grounded resistor,also includes four structures.These circuits are suitable for integrated circuit manufacture,and their parameters f_0 and Q can be orthogonally adjusted with varying the bias currents of VDTAs.After the paper and pencil test is completed,the computer analyses,including alternating current (AC),parameter sweep,Monte Carlo (MC),and noise analyses,are performed to support the synthesis approach.
文摘A complete state variable current-mode biquadratic filter built by duo-output CCII (DOCCII) with variable current gain is presented. All the coefficients of the filter can be independently tuned through the variable current gain factors of the DOCCII. Based on the principles upon which the general biquadratic filter was constructed, a universal electronically tunable current-mode filter is proposed which implements the low-pass, high-pass, band-pass, band-suppress and all-pass second order transfer functions simultaneously. The PSPICE simulations of frequency responses of second-order filter of are also given.
文摘This paper presents a new first order all pass filter configurations. The proposed all pass filter configuration employs two configurations namely VDVTA and OTAs based first order all pass filter configuration. The first proposed configuration employs a single VDVTA and one grounded capacitor whereas the second proposed configuration employs two OTAs and one grounded capacitor. Both types of proposed configurations are fully electronically tunable and their quality factors do not depend on tunable pole frequency range. The reported configurations yield low active and passive sensitivities and also have low power consumption with very low supply voltage ± 0.85 V with Bias Voltage ± 0.50 V. The PSPICE simulation of the proposed VDVTA and two OTAs based first order all pass filter configurations are verified using 0.18 μm CMOS Technology Process Parameters.
文摘This paper presents a new current mode (CM) single-input and multi-output (SIMO)-type biquad using two multiple output OTAs and one current follower as an active device and having two grounded capacitors. This SIMO type circuit realizes all the five filter functions as low pass, band pass, high pass, band reject and all pass filter transfer functions simultaneously. This circuit has the unity gain transfer function for all the five types of filters. The circuit enjoys electronic tunability of angular frequency and bandwidth. The 0.18 μm TSMC technology process parameters have been utilized to test and verify the performance characteristics of the circuit using PSPICE. The sensitivity analysis, transient response and calculations of total harmonic distortion have also been shown.
文摘Technology development and continuous down scaling in CMOS fabrication makes Mixed Signal Integrated Circuits (MSIC) more vulnerable to process variation. This paper presents a well defined novel design methodology for process variability aware design by incorporating the major challenge of statistical circuit performance relating the device and circuit level variation in an accurate and efficient manner to improve the reliability, robustness and stability of the circuit. The device sensitive parameters are identified and accurately quantified by continuous realistic assessments using statistical methods. The modularity of the methodology can be validated by the output performance obtained from the gain and phase response of OTA which is highly stable when subjected to worst case process variation scenario. In the proposed optimization, the circuit is strengthened by fixing the optimum aspect ratio without adding any additional compensation devices complicating the circuit resulting in low power consumption of only 0.116 mW in standard CMOS 0.18 μm technology with 1.8 V power supply.
文摘This paper presents a study of fractional order quadrature oscillators based on current-controlled current follower transconductance amplifiers (CCCFTA). The design realisation and performance of the fractional order quadrature oscillators have been presented. The quadrature oscillators are constructed using three fractional capacitors of orders α = 0.5. The fractional capacitor is not available on the market or in the PSPICE program. Fortunately, the fractional capacitor can be realised by using the approximate method for the RC ladder network approximation. The oscillation frequency and oscillation condition can be electronically/orthogonally controlled via input bias currents. Due to high-output impedances, the proposed circuit enables easy cascading in current-mode (CM). The PSPICE simulation results are depicted, and the given results agree well with the anticipated theoretical outcomes.
基金supported by the National Natural Science Foundation of China(No.60876023)
文摘To meet the demands for a number of LEDs,a novel charge pump circuit with current mode control is proposed.Regulation is achieved by operating the current mirrors and the output current of the operational transconductance amplifier.In the steady state,the input current from power voltage retains constant,so reducing the noise induced on the input voltage source and improving the output voltage ripple.The charge pump small-signal model is used to describe the device’s dynamic behavior and stability.Analytical predictions were verified by Hspice simulation and testing.Load driving is up to 800 mA with a power voltage of 3.6 V,and the output voltage ripple is less than 45 mV.The output response time is less than 8μs,and the load current jumps from 400 to 800 mA.
基金Supported by the National Natural Science Foundation of China(No.60236020)the Specialized Research Fund for the Doctoral Program of Higher Education (No.20050003083)
文摘A low power digital operational transconductance amplifier （OTA） was developed for low voltage switched capacitor applications. The OTA has a high slew rate （SR） and a large open loop gain with a dif- ferential pseudo-two-stage Class-AB structure. A fully compensated depletion mode capacitor is used in the switched capacitor common mode feedback block instead of a metal-insulator-metal （MIM） capacitor to reduce the fabrication cost. Simulations show that with a 1.0-V supply voltage and a 34-pF load at each output terminal, this digital differential pseudo-two-stage Class-AB OTA realized in 0.13-μm technology achieves a 63.5-dB DC gain and a 0.83-V output swing. The slew rate is ±16.29V/μs and the total power dissipation is only 82 μW.
基金supported by the National High Technology Research and Development Program of China(No.2002AA1Z1200)
文摘A fully-differential switched-capacitor sample-and-hold （S/H） circuit used in a 10-bit 50-MS/s pipeline analog-to-digital converter （ADC） was designed and fabricated using a 0.35-μm CMOS process. Capacitor flip-around architecture was used in the S/H circuit to lower the power consumption. In addition, a gain-boosted operational transconductance amplifier （OTA） was designed with a DC gain of 94 dB and a unit gain bandwidth of 460 MHz at a phase margin of 63 degree, which matches the S/H circuit. A novel double-side bootstrapped switch was used, improving the precision of the whole circuit. The measured results have shown that the S/H circuit reaches a spurious free dynamic range （SFDR） of 67 dB and a signal-to-noise ratio （SNR） of 62.1 dB for a 2.5 MHz input signal with 50 MS/s sampling rate. The 0.12mm^2 S/H circuit operates from a 3.3 V supply and consumes 13.6 mW.
基金Project supported by the National Natural Science Foundation of China(No.61574045)
文摘A fourth-order Gm-C Chebyshev low-pass filter is presented as channel selection filter for reconfigurable multi-mode wireless receivers. Low-noise technologies are proposed in optimizing the noise characteristics of both the Gm cells and the filter topology. A frequency tuning strategy is used by tuning both the transconductance of the Gm cells and the capacitance of the capacitor banks. To achieve accurate cut-off frequencies, an on-chip calibration circuit is presented to compensate for the frequency inaccuracy introduced by process variation. The filter is fabricated in a 0.13 m CMOS process. It exhibits a wide programmable bandwidth from 322.5 k Hz to20 MHz. Measured results show that the filter has low input referred noise of 5.9 n V/（Hz）^（1/2） and high out-of-band IIP3 of 16.2 d Bm. It consumes 4.2 and 9.5 m W from a 1 V power supply at its lowest and highest cut-off frequencies respectively.
