An endpoint backward method is proposed to calculate the time-optimal control law of double integrator system. First, the time intervals between the switch points and the endpoints are calculated. Then, the positions ...An endpoint backward method is proposed to calculate the time-optimal control law of double integrator system. First, the time intervals between the switch points and the endpoints are calculated. Then, the positions of switch points are decided according to the motion equation, and the switch line is formed. Theoretical analysis shows that this method can be used to solve the double integrator system with functional constraint target set and deal with the second order oscillation system.展开更多
The research and implementation of SDH retiming mechanism were discussed. SDH system is more cost effective than PDH system for high bit rates. In SDH network, transport network channel have timing transparency when t...The research and implementation of SDH retiming mechanism were discussed. SDH system is more cost effective than PDH system for high bit rates. In SDH network, transport network channel have timing transparency when transporting PDH signals between two devices having similar interfaces. It is found that the implementation of SDH in the telecommunication networks improves the quality of mobile telecommunication.展开更多
An improved linear-time retiming algorithm is proposed to incrementally optimize the clock period, espe cially considering the influence of the in-out degree of the critical combinational elements. Firslly, the critic...An improved linear-time retiming algorithm is proposed to incrementally optimize the clock period, espe cially considering the influence of the in-out degree of the critical combinational elements. Firslly, the critical elements are selected from all the critical combinational elements to retime. Secondly, for the nodes that cannot be performed with such retiming, register sharing is implemented while the path delay is kept unchanged. The incremental algorithm can be applied with the technology mapping to minimize the critical path delay and obtain fewer registers in the re- timed circuit with the near-optimal clock period. Compared with Singh＇s incremental algorithm, experiments show that the proposed algorithm can reduce the flip-flop count by 11% and look-up table （LUT） count by 5% while improv- ing the minimum clock period by 6%. The runtime is also reduced by 9% of the design flow.展开更多
研究了自适应噪声消除DLMS(Delay Least Mean Square)算法在实现时的速度和运算复杂度问题,提出了二进制树直接结构实现DLMS算法。算法采用了割集重定时技术和流水线结构,对延迟模块重新分割,使系统关键路径降到最低的同时具有较快的收...研究了自适应噪声消除DLMS(Delay Least Mean Square)算法在实现时的速度和运算复杂度问题,提出了二进制树直接结构实现DLMS算法。算法采用了割集重定时技术和流水线结构,对延迟模块重新分割,使系统关键路径降到最低的同时具有较快的收敛速度。仿真结果表明与原有结构相比,新算法结构提高运算速度近3倍,较好地消除了含噪信号中的噪声。展开更多
文摘An endpoint backward method is proposed to calculate the time-optimal control law of double integrator system. First, the time intervals between the switch points and the endpoints are calculated. Then, the positions of switch points are decided according to the motion equation, and the switch line is formed. Theoretical analysis shows that this method can be used to solve the double integrator system with functional constraint target set and deal with the second order oscillation system.
文摘The research and implementation of SDH retiming mechanism were discussed. SDH system is more cost effective than PDH system for high bit rates. In SDH network, transport network channel have timing transparency when transporting PDH signals between two devices having similar interfaces. It is found that the implementation of SDH in the telecommunication networks improves the quality of mobile telecommunication.
基金Supported by Major National Scientific Research Plan (No. 2011CB933202)
文摘An improved linear-time retiming algorithm is proposed to incrementally optimize the clock period, espe cially considering the influence of the in-out degree of the critical combinational elements. Firslly, the critical elements are selected from all the critical combinational elements to retime. Secondly, for the nodes that cannot be performed with such retiming, register sharing is implemented while the path delay is kept unchanged. The incremental algorithm can be applied with the technology mapping to minimize the critical path delay and obtain fewer registers in the re- timed circuit with the near-optimal clock period. Compared with Singh＇s incremental algorithm, experiments show that the proposed algorithm can reduce the flip-flop count by 11% and look-up table （LUT） count by 5% while improv- ing the minimum clock period by 6%. The runtime is also reduced by 9% of the design flow.
文摘研究了自适应噪声消除DLMS(Delay Least Mean Square)算法在实现时的速度和运算复杂度问题,提出了二进制树直接结构实现DLMS算法。算法采用了割集重定时技术和流水线结构,对延迟模块重新分割,使系统关键路径降到最低的同时具有较快的收敛速度。仿真结果表明与原有结构相比,新算法结构提高运算速度近3倍,较好地消除了含噪信号中的噪声。
