As a method for testing a sequential circuit efficiently, a scan design is usually used. But, since this design has some drawbacks, a non-scan testable design should be discussed. The testable design can be implemente...As a method for testing a sequential circuit efficiently, a scan design is usually used. But, since this design has some drawbacks, a non-scan testable design should be discussed. The testable design can be implemented by enhancing controllability and observability. This paper discusses a non-scan testable design for a sequential circuit by only focusing the improvement of controllability. The proposed design modifies a circuit so that all the FFs can be directly controlled by primary input lines in a test mode. Experimental results show that we can get a good testability using this method.展开更多
The circuit testable realizations of multiple-valued functions are studied in this letter. First of all,it is shown that one vector detects all skew faults in multiplication modulo circuits or in addi-tion modulo circ...The circuit testable realizations of multiple-valued functions are studied in this letter. First of all,it is shown that one vector detects all skew faults in multiplication modulo circuits or in addi-tion modulo circuits,and n+1 vectors detect all skew faults in the circuit realization of multiple-valued functions with n inputs. Secondly,min(max) bridging fault test sets with n+2 vectors are pre-sented for the circuit realizations of multiple-valued logic functions. Finally,a tree structure is used instead of cascade structure to reduce the delay in the circuit realization,it is shown that three vec-tors are sufficient to detect all single stuck-at faults in the tree structure realization of multiple-valued logic functions.展开更多
The circuit testable realization and its fault detection for logic functions with ESOP （EXOR-Sum-Of-Products） expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set...The circuit testable realization and its fault detection for logic functions with ESOP （EXOR-Sum-Of-Products） expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set with 2n ＋ m ＋ 1 vectors for the detections of AND bridging faults and a test set with 2n ＋ m vectors for the detections of OR bridging faults are presented. Secondly, for the testable realization by using ）（OR gate tree, a test set with 2n ＋ m vectors for the detections of AND bridging faults and a test set with 3n ＋ m ＋ 1 vectors for the detections of OR bridging faults are presented. Finally, a single fault test set with n ＋ 5 vectors for the XOR gate tree realization is presented. Where n is the number of input variables and m is the number of product terms in a logic function.展开更多
Parity testing is one of the compact testing techniques, which, traditionally, relies on applying all 2^n input combinations to an n-input combinational circuit without need of knowing the implementation of the circui...Parity testing is one of the compact testing techniques, which, traditionally, relies on applying all 2^n input combinations to an n-input combinational circuit without need of knowing the implementation of the circuits under test. The faults can be detected just by observing and comparing its parity of whole output of circuit with the expectation one. The way seemed to be less interesting to the test eagineers in the past days, mainly due to the reasons of its exhaustive testing and time-cousuming, which became a barrier as the number of input lines gets growing. However its great facility and convenience in testing still interest to the engineers who need to have a quick look at the qualities of the circuits without generating the test patterns for a given circuit to be tested. In this paper, a new approach called pseudo-parity testing is presented to deal with the dilemma we are facing： i. e. to change an exhaustive parity testing into a non-exhaustive one, followed by a pseudo- parity testable design to help realize the new way of pseudo-parity testing. The idea of pseudo-parity testing presented in this paper may resume its spirits towards its promising future.展开更多
Testable design techniques for systolic motion estimators based on M-testability conditions are proposed in this paper. The whole motion estimator can be viewed as a two-dimensional iterative logic array （ILA） of pr...Testable design techniques for systolic motion estimators based on M-testability conditions are proposed in this paper. The whole motion estimator can be viewed as a two-dimensional iterative logic array （ILA） of processing elements （PEs） and multiplying elements （MULs）. The functions of each PE and MUL are modified to be bijective to meet the M-testable conditions. The number of test patterns is 2^w, where w denotes the word length of a PE. The proposed testable design techniques are also suitable for built-in self-test implementation. According to experimental results, our approaches can achieve 99.27 % fault coverage. The area overhead is about 9 %. To verify our approaches, an experimental chip is also implemented.展开更多
The operational readiness test(ORT),like weapon testing before firing,is becoming more and more important for systems used in the field.However,the test requirement of the ORT is distinctive.Specifically,the rule of s...The operational readiness test(ORT),like weapon testing before firing,is becoming more and more important for systems used in the field.However,the test requirement of the ORT is distinctive.Specifically,the rule of selecting test items should be changed in different test turns,and whether there is a fault is more important than where the fault is.The popular dependency matrix(D-matrix)processing algorithms becomes low efficient because they cannot change their optimizing direc-tion and spend unnecessary time on fault localization and isola-tion.To this end,this paper proposes a D-matrix processing algorithm named piecewise heuristic algorithm for D-matrix(PHAD).Its key idea is to use a piecewise function comprised of multiple different functions instead of the commonly used fixed function and switch subfunctions according to the test stage.In this manner,PHAD has the capability of changing optimizing direction,precisely matching the variant test requirements,and generating an efficient test sequence.The experiments on the random matrixes of different sizes and densities prove that the proposed algorithm performs better than the classical algo-rithms in terms of expected test cost(ETC)and other metrics.More generally,the piecewise heuristic function shows a new way to design D-matrix processing algorithm and a more flexi-ble heuristic function to meet more complicated test requirements.展开更多
Test selection design(TSD)is an important technique for improving product maintainability,reliability and reducing lifecycle costs.In recent years,although some researchers have addressed the design problem of test se...Test selection design(TSD)is an important technique for improving product maintainability,reliability and reducing lifecycle costs.In recent years,although some researchers have addressed the design problem of test selection,the correlation between test outcomes has not been sufficiently considered in test metrics modeling.This study proposes a new approach that combines copula and D-Vine copula to address the correlation issue in TSD.First,the copula is utilized to model FIR on the joint distribution.Furthermore,the D-Vine copula is applied to model the FDR and FAR.Then,a particle swarm optimization is employed to select the optimal testing scheme.Finally,the efficacy of the proposed method is validated through experimentation on a negative feedback circuit.展开更多
A new approach is presented for easily testable two-dimensional iterative arrays.It is an improvment on GI-testability (Group Identical testability) and is referred to as GID-testability (Group Identical and Different...A new approach is presented for easily testable two-dimensional iterative arrays.It is an improvment on GI-testability (Group Identical testability) and is referred to as GID-testability (Group Identical and Different testability). In a GID-testable twodimensional array, the primary x and y outputs are organized into groups and every group has more than one output. This is similar to the GI-testable arrays. However,GID-testability not only ensures that identical test responses can be obtained from every output in the same group when an array is fault free, but also ensures that at least one output has different test responses (from the other outputs in a group) when a cell in the array is faulty Therefore, all faults can be detected under the assumption of a single faulty cell model. It is proved that an arbitrary two-dimensional iterative array is GID-testable if seven x-states and seven y-states are added to the original flow table of the basic cell of the array.GID-testability simplifies the response verification of built-in-self testing in a way similar to PL- and GI-testability[6-9]. Therefore, it is suitable for BIST design.展开更多
A novel temperature sensor is developed and presented especially for the purpose of on-line thermal monitoring of VLSI chips.This sensor requires very small silicon area and low power consumption,and the simulation re...A novel temperature sensor is developed and presented especially for the purpose of on-line thermal monitoring of VLSI chips.This sensor requires very small silicon area and low power consumption,and the simulation results show that its accuracy is in the order of 0.8℃.The proposed sensor can be easily implemented using regular CMOS process technologies,and can be easily integrated to any VLSI circuits to increase their reliability.展开更多
Complete prior statistical information is currently required in the majority of statistical evaluations of complex models. The principle of maximum entropy is often utilized in this context to fill in the missing piec...Complete prior statistical information is currently required in the majority of statistical evaluations of complex models. The principle of maximum entropy is often utilized in this context to fill in the missing pieces of available information and is normally claimed to be fair and objective. A rarely discussed aspect is that it relies upon testable information, which is never known but estimated, i.e. results from processing of raw data. The subjective choice of this processing strongly affects the result. Less conventional posterior completion of information is equally accurate but is computationally superior to prior, as much less information enters the analysis. Our recently proposed methods of lean deterministic sampling are examples of very few approaches that actively promote the use of minimal incomplete prior information. The inherited subjective character of maximum entropy distributions and the often critical implications of prior and posterior completion of information are here discussed and illustrated, from a novel perspective of consistency, rationality, computational efficiency and realism.展开更多
This paper proposes a non-scan design-for-testability method for register-transfer level circuits where a circuit consists of a controller and a data path. It achieves complete fault efficiency with low hardware overh...This paper proposes a non-scan design-for-testability method for register-transfer level circuits where a circuit consists of a controller and a data path. It achieves complete fault efficiency with low hardware overhead and at-speed testing.展开更多
Prognostics and health management （PHM） significantly improves system availability and reliability, and reduces the cost of system operations. Design for testability （DFT） developed concurrently with system design...Prognostics and health management （PHM） significantly improves system availability and reliability, and reduces the cost of system operations. Design for testability （DFT） developed concurrently with system design is an important way to improve PHM capability. Testability modeling and analysis are the foundation of DFT. This paper proposes a novel approach of testability modeling and analysis based on failure evolution mechanisms. At the component level, the fault progression-related information of each unit under test （UUT） in a system is obtained by means of failure modes, evolution mechanisms, effects and criticality analysis （FMEMECA）, and then the failure-symptom dependency can be generated. At the system level, the dynamic attributes of UUTs are assigned by using the bond graph methodology, and then the symptom-test dependency can be obtained by means of the functional flow method. Based on the failure-symptom and symptom-test dependencies, testability analysis for PHM systems can be realized. A shunt motor is used to verify the application of the approach proposed in this paper. Experimental results show that this approach is able to be applied to testability modeling and analysis for PHM systems very well, and the analysis results can provide a guide for engineers to design for testability in order to improve PHM performance.展开更多
Testability plays an important role in improving the readiness and decreasing the lifecycle cost of equipment. Testability demonstration and evaluation is of significance in measuring such testability indexes as fault...Testability plays an important role in improving the readiness and decreasing the lifecycle cost of equipment. Testability demonstration and evaluation is of significance in measuring such testability indexes as fault detection rate（FDR） and fault isolation rate（FIR）, which is useful to the producer in mastering the testability level and improving the testability design, and helpful to the consumer in making purchase decisions. Aiming at the problems with a small sample of testability demonstration test data（TDTD） such as low evaluation confidence and inaccurate result, a testability evaluation method is proposed based on the prior information of multiple sources and Bayes theory. Firstly, the types of prior information are analyzed. The maximum entropy method is applied to the prior information with the mean and interval estimate forms on the testability index to obtain the parameters of prior probability density function（PDF）, and the empirical Bayesian method is used to get the parameters for the prior information with a success-fail form. Then, a parametrical data consistency check method is used to check the compatibility between all the sources of prior information and TDTD. For the prior information to pass the check, the prior credibility is calculated. A mixed prior distribution is formed based on the prior PDFs and the corresponding credibility. The Bayesian posterior distribution model is acquired with the mixed prior distribution and TDTD, based on which the point and interval estimates are calculated.Finally, examples of a flying control system are used to verify the proposed method. The results show that the proposed method is feasible and effective.展开更多
To analyze and evaluate the testability design of equipment, a testability analysis method based on Bayesian network inference model is proposed in the paper. The model can adequately apply testability information and...To analyze and evaluate the testability design of equipment, a testability analysis method based on Bayesian network inference model is proposed in the paper. The model can adequately apply testability information and many uncertainty information of design and maintenance process, so it can analyze testability by and large from Bayesian inference. The detailed procedure to analyze and evaluate testability for equipments by Bayesian network is given in the paper. Its modeling process is simple, its formulation is visual, and the analysis results are more reliable than others. Examples prove that the analysis method based on Bayesian network inference can be applied to testability analysis and evaluation for complex equipments.展开更多
Testability virtual test is a new test method for testability verification, which has the advantages such as low cost, few restrictions and large sample of test data. It can be used to make up the deficiency of testab...Testability virtual test is a new test method for testability verification, which has the advantages such as low cost, few restrictions and large sample of test data. It can be used to make up the deficiency of testability physical test. In order to take the advantage of testability virtual test data effectively and to improve the accuracy of testability evaluation, a testability integrated eval- uation method is proposed in this paper based on testability virtual test data. Considering the char- acteristic of testability virtual test data, the credibility analysis method for testability virtual test data is studied firstly. Then the integrated calculation method is proposed fusing the testability vir- tual and physical test data. Finally, certain helicopter heading and attitude system is presented to demonstrate the proposed method. The results show that the testability integrated evaluation method is feasible and effective.展开更多
This paper presents a novel experimental design to greatly improve the calibration accuracy of the acceleration-insensitive bias and the acceleration-sensitive bias of the dynamically tuned gyroscopes（DTGs）.In order...This paper presents a novel experimental design to greatly improve the calibration accuracy of the acceleration-insensitive bias and the acceleration-sensitive bias of the dynamically tuned gyroscopes（DTGs）.In order to reduce experimental cost,the D-optimal criteria with constraints are constructed.The turntable positions and the number of test points are chosen to build D-optimal experimental designs.The D-optimal experimental designs are tested by multi-position calibration experiment for tactical-grade DTGs.Test results show that,with the same cost,the fit uncertainty is reduced by about 50% by using the D-optimal 8-position experimental procedure,compared to using a defacto standard experimental procedure in ANSI/IEEE Std 813-1988.Furthermore,the new experimental procedure almost achieves optimal accuracy with only 12-position which is half the cost of the widely adopted 24-position experimental procedure for achieving optimal accuracy.展开更多
To realize the requirement of diagnostic sequence optimization in the process of design for testability, the authors put forward an optimization method based on quantum-behaved particle swarm optimization （QPSO） alg...To realize the requirement of diagnostic sequence optimization in the process of design for testability, the authors put forward an optimization method based on quantum-behaved particle swarm optimization （QPSO） algorithm. By a precedence ordering coding, the diagnostic sequence optimization can be translated into a precedence ordering problem in the multidimensional space of swarm. It can get the optimizing order quickly by using the powerful and quick search capability of QPSO algorithm, and the order is the diagnostic sequence for the system. The realization of the method is simpler than other methods, and the results are more excellent than others, and it has been applied in the engineering practice.展开更多
The optimal test sequence design for fault diagnosis is a challenging NP-complete problem.An improved differential evolution(DE)algorithm with additional inertial velocity term called inertial velocity differential ev...The optimal test sequence design for fault diagnosis is a challenging NP-complete problem.An improved differential evolution(DE)algorithm with additional inertial velocity term called inertial velocity differential evolution(IVDE)is proposed to solve the optimal test sequence problem(OTP)in complicated electronic system.The proposed IVDE algorithm is constructed based on adaptive differential evolution algorithm.And it is used to optimize the test sequence sets with a new individual fitness function including the index of fault isolation rate(FIR)satisfied and generate diagnostic decision tree to decrease the test sets and the test cost.The simulation results show that IVDE algorithm can cut down the test cost with the satisfied FIR.Compared with the other algorithms such as particle swarm optimization(PSO)and genetic algorithm(GA),IVDE can get better solution to OTP.展开更多
Sensor selection and optimization is one of the important parts in design for testability. To address the problems that the traditional sensor optimization selection model does not take the requirements of prognostics...Sensor selection and optimization is one of the important parts in design for testability. To address the problems that the traditional sensor optimization selection model does not take the requirements of prognostics and health management especially fault prognostics for testability into account and does not consider the impacts of sensor actual attributes on fault detectability, a novel sensor optimization selection model is proposed. Firstly, a universal architecture for sensor selection and optimization is provided. Secondly, a new testability index named fault predictable rate is defined to describe fault prognostics requirements for testability. Thirdly, a sensor selection and optimization model for prognostics and health management is constructed, which takes sensor cost as objective function and the defined testability indexes as constraint conditions. Due to NP-hard property of the model, a generic algorithm is designed to obtain the optimal solution. At last, a case study is presented to demonstrate the sensor selection approach for a stable tracking servo platform. The application results and comparison analysis show the proposed model and algorithm are effective and feasible. This approach can be used to select sensors for prognostics and health management of any system.展开更多
Reliability, maintainability and testability （RMT） are important properties of equipment, since they have important influ- ence on operational availability and life cycle costs （LCC）. There- fore, weighting and op...Reliability, maintainability and testability （RMT） are important properties of equipment, since they have important influ- ence on operational availability and life cycle costs （LCC）. There- fore, weighting and optimizing the three properties are of great significance. A new approach for optimization of RMT parameters is proposed. First of all, the model for the equipment operation pro- cess is established based on the generalized stochastic Petri nets （GSPN） theory. Then, by solving the GSPN model, the quantitative relationship between operational availability and RMT parameters is obtained. Afterwards, taking history data of similar equipment and operation process into consideration, a cost model of design, manufacture and maintenance is developed. Based on operational availability, the cost model and parameters ranges, an optimization model of RMT parameters is built. Finally, the effectiveness and practicability of this approach are validated through an example.展开更多
文摘As a method for testing a sequential circuit efficiently, a scan design is usually used. But, since this design has some drawbacks, a non-scan testable design should be discussed. The testable design can be implemented by enhancing controllability and observability. This paper discusses a non-scan testable design for a sequential circuit by only focusing the improvement of controllability. The proposed design modifies a circuit so that all the FFs can be directly controlled by primary input lines in a test mode. Experimental results show that we can get a good testability using this method.
基金Supported by the National Natural Science Foundation of China (No.60006002)the Education Department of Guangdong Province of China (No.02019).
文摘The circuit testable realizations of multiple-valued functions are studied in this letter. First of all,it is shown that one vector detects all skew faults in multiplication modulo circuits or in addi-tion modulo circuits,and n+1 vectors detect all skew faults in the circuit realization of multiple-valued functions with n inputs. Secondly,min(max) bridging fault test sets with n+2 vectors are pre-sented for the circuit realizations of multiple-valued logic functions. Finally,a tree structure is used instead of cascade structure to reduce the delay in the circuit realization,it is shown that three vec-tors are sufficient to detect all single stuck-at faults in the tree structure realization of multiple-valued logic functions.
基金Supported by the National Natural Science Foundation of China (No.60006002)the Education Department of Guangdong Province of China (No.02019).
文摘The circuit testable realization and its fault detection for logic functions with ESOP （EXOR-Sum-Of-Products） expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set with 2n ＋ m ＋ 1 vectors for the detections of AND bridging faults and a test set with 2n ＋ m vectors for the detections of OR bridging faults are presented. Secondly, for the testable realization by using ）（OR gate tree, a test set with 2n ＋ m vectors for the detections of AND bridging faults and a test set with 3n ＋ m ＋ 1 vectors for the detections of OR bridging faults are presented. Finally, a single fault test set with n ＋ 5 vectors for the XOR gate tree realization is presented. Where n is the number of input variables and m is the number of product terms in a logic function.
基金This work was supported by National Natural Science Foundation of China under the grant No .60173029 and 60473033
文摘Parity testing is one of the compact testing techniques, which, traditionally, relies on applying all 2^n input combinations to an n-input combinational circuit without need of knowing the implementation of the circuits under test. The faults can be detected just by observing and comparing its parity of whole output of circuit with the expectation one. The way seemed to be less interesting to the test eagineers in the past days, mainly due to the reasons of its exhaustive testing and time-cousuming, which became a barrier as the number of input lines gets growing. However its great facility and convenience in testing still interest to the engineers who need to have a quick look at the qualities of the circuits without generating the test patterns for a given circuit to be tested. In this paper, a new approach called pseudo-parity testing is presented to deal with the dilemma we are facing： i. e. to change an exhaustive parity testing into a non-exhaustive one, followed by a pseudo- parity testable design to help realize the new way of pseudo-parity testing. The idea of pseudo-parity testing presented in this paper may resume its spirits towards its promising future.
文摘Testable design techniques for systolic motion estimators based on M-testability conditions are proposed in this paper. The whole motion estimator can be viewed as a two-dimensional iterative logic array （ILA） of processing elements （PEs） and multiplying elements （MULs）. The functions of each PE and MUL are modified to be bijective to meet the M-testable conditions. The number of test patterns is 2^w, where w denotes the word length of a PE. The proposed testable design techniques are also suitable for built-in self-test implementation. According to experimental results, our approaches can achieve 99.27 % fault coverage. The area overhead is about 9 %. To verify our approaches, an experimental chip is also implemented.
文摘The operational readiness test(ORT),like weapon testing before firing,is becoming more and more important for systems used in the field.However,the test requirement of the ORT is distinctive.Specifically,the rule of selecting test items should be changed in different test turns,and whether there is a fault is more important than where the fault is.The popular dependency matrix(D-matrix)processing algorithms becomes low efficient because they cannot change their optimizing direc-tion and spend unnecessary time on fault localization and isola-tion.To this end,this paper proposes a D-matrix processing algorithm named piecewise heuristic algorithm for D-matrix(PHAD).Its key idea is to use a piecewise function comprised of multiple different functions instead of the commonly used fixed function and switch subfunctions according to the test stage.In this manner,PHAD has the capability of changing optimizing direction,precisely matching the variant test requirements,and generating an efficient test sequence.The experiments on the random matrixes of different sizes and densities prove that the proposed algorithm performs better than the classical algo-rithms in terms of expected test cost(ETC)and other metrics.More generally,the piecewise heuristic function shows a new way to design D-matrix processing algorithm and a more flexi-ble heuristic function to meet more complicated test requirements.
基金supported by the National Natural Science Foundation of China(No.62303293,62303414)the China Postdoctoral Science Foundation(No.2023M732176,2023M741821)the Zhejiang Province Postdoctoral Selected Foundation(No.ZJ2023143).
文摘Test selection design(TSD)is an important technique for improving product maintainability,reliability and reducing lifecycle costs.In recent years,although some researchers have addressed the design problem of test selection,the correlation between test outcomes has not been sufficiently considered in test metrics modeling.This study proposes a new approach that combines copula and D-Vine copula to address the correlation issue in TSD.First,the copula is utilized to model FIR on the joint distribution.Furthermore,the D-Vine copula is applied to model the FDR and FAR.Then,a particle swarm optimization is employed to select the optimal testing scheme.Finally,the efficacy of the proposed method is validated through experimentation on a negative feedback circuit.
文摘A new approach is presented for easily testable two-dimensional iterative arrays.It is an improvment on GI-testability (Group Identical testability) and is referred to as GID-testability (Group Identical and Different testability). In a GID-testable twodimensional array, the primary x and y outputs are organized into groups and every group has more than one output. This is similar to the GI-testable arrays. However,GID-testability not only ensures that identical test responses can be obtained from every output in the same group when an array is fault free, but also ensures that at least one output has different test responses (from the other outputs in a group) when a cell in the array is faulty Therefore, all faults can be detected under the assumption of a single faulty cell model. It is proved that an arbitrary two-dimensional iterative array is GID-testable if seven x-states and seven y-states are added to the original flow table of the basic cell of the array.GID-testability simplifies the response verification of built-in-self testing in a way similar to PL- and GI-testability[6-9]. Therefore, it is suitable for BIST design.
文摘A novel temperature sensor is developed and presented especially for the purpose of on-line thermal monitoring of VLSI chips.This sensor requires very small silicon area and low power consumption,and the simulation results show that its accuracy is in the order of 0.8℃.The proposed sensor can be easily implemented using regular CMOS process technologies,and can be easily integrated to any VLSI circuits to increase their reliability.
文摘Complete prior statistical information is currently required in the majority of statistical evaluations of complex models. The principle of maximum entropy is often utilized in this context to fill in the missing pieces of available information and is normally claimed to be fair and objective. A rarely discussed aspect is that it relies upon testable information, which is never known but estimated, i.e. results from processing of raw data. The subjective choice of this processing strongly affects the result. Less conventional posterior completion of information is equally accurate but is computationally superior to prior, as much less information enters the analysis. Our recently proposed methods of lean deterministic sampling are examples of very few approaches that actively promote the use of minimal incomplete prior information. The inherited subjective character of maximum entropy distributions and the often critical implications of prior and posterior completion of information are here discussed and illustrated, from a novel perspective of consistency, rationality, computational efficiency and realism.
文摘This paper proposes a non-scan design-for-testability method for register-transfer level circuits where a circuit consists of a controller and a data path. It achieves complete fault efficiency with low hardware overhead and at-speed testing.
基金the National Natural Science Foundation of China(No.51175502)
文摘Prognostics and health management （PHM） significantly improves system availability and reliability, and reduces the cost of system operations. Design for testability （DFT） developed concurrently with system design is an important way to improve PHM capability. Testability modeling and analysis are the foundation of DFT. This paper proposes a novel approach of testability modeling and analysis based on failure evolution mechanisms. At the component level, the fault progression-related information of each unit under test （UUT） in a system is obtained by means of failure modes, evolution mechanisms, effects and criticality analysis （FMEMECA）, and then the failure-symptom dependency can be generated. At the system level, the dynamic attributes of UUTs are assigned by using the bond graph methodology, and then the symptom-test dependency can be obtained by means of the functional flow method. Based on the failure-symptom and symptom-test dependencies, testability analysis for PHM systems can be realized. A shunt motor is used to verify the application of the approach proposed in this paper. Experimental results show that this approach is able to be applied to testability modeling and analysis for PHM systems very well, and the analysis results can provide a guide for engineers to design for testability in order to improve PHM performance.
基金co-supported by the National Natural Science Foundation of China(No.51105369)Shanghai Aerospace Science and Technology Foundation(No.SAST201313)
文摘Testability plays an important role in improving the readiness and decreasing the lifecycle cost of equipment. Testability demonstration and evaluation is of significance in measuring such testability indexes as fault detection rate（FDR） and fault isolation rate（FIR）, which is useful to the producer in mastering the testability level and improving the testability design, and helpful to the consumer in making purchase decisions. Aiming at the problems with a small sample of testability demonstration test data（TDTD） such as low evaluation confidence and inaccurate result, a testability evaluation method is proposed based on the prior information of multiple sources and Bayes theory. Firstly, the types of prior information are analyzed. The maximum entropy method is applied to the prior information with the mean and interval estimate forms on the testability index to obtain the parameters of prior probability density function（PDF）, and the empirical Bayesian method is used to get the parameters for the prior information with a success-fail form. Then, a parametrical data consistency check method is used to check the compatibility between all the sources of prior information and TDTD. For the prior information to pass the check, the prior credibility is calculated. A mixed prior distribution is formed based on the prior PDFs and the corresponding credibility. The Bayesian posterior distribution model is acquired with the mixed prior distribution and TDTD, based on which the point and interval estimates are calculated.Finally, examples of a flying control system are used to verify the proposed method. The results show that the proposed method is feasible and effective.
基金supported by the National Natural Science Foundation of China(60771063).
文摘To analyze and evaluate the testability design of equipment, a testability analysis method based on Bayesian network inference model is proposed in the paper. The model can adequately apply testability information and many uncertainty information of design and maintenance process, so it can analyze testability by and large from Bayesian inference. The detailed procedure to analyze and evaluate testability for equipments by Bayesian network is given in the paper. Its modeling process is simple, its formulation is visual, and the analysis results are more reliable than others. Examples prove that the analysis method based on Bayesian network inference can be applied to testability analysis and evaluation for complex equipments.
基金supported by National Natural Science Foundation of China (No.51105369)
文摘Testability virtual test is a new test method for testability verification, which has the advantages such as low cost, few restrictions and large sample of test data. It can be used to make up the deficiency of testability physical test. In order to take the advantage of testability virtual test data effectively and to improve the accuracy of testability evaluation, a testability integrated eval- uation method is proposed in this paper based on testability virtual test data. Considering the char- acteristic of testability virtual test data, the credibility analysis method for testability virtual test data is studied firstly. Then the integrated calculation method is proposed fusing the testability vir- tual and physical test data. Finally, certain helicopter heading and attitude system is presented to demonstrate the proposed method. The results show that the testability integrated evaluation method is feasible and effective.
基金National Natural Science Foundation of China (61071014)National Basic Research Program of China(2009CB72400201)
文摘This paper presents a novel experimental design to greatly improve the calibration accuracy of the acceleration-insensitive bias and the acceleration-sensitive bias of the dynamically tuned gyroscopes（DTGs）.In order to reduce experimental cost,the D-optimal criteria with constraints are constructed.The turntable positions and the number of test points are chosen to build D-optimal experimental designs.The D-optimal experimental designs are tested by multi-position calibration experiment for tactical-grade DTGs.Test results show that,with the same cost,the fit uncertainty is reduced by about 50% by using the D-optimal 8-position experimental procedure,compared to using a defacto standard experimental procedure in ANSI/IEEE Std 813-1988.Furthermore,the new experimental procedure almost achieves optimal accuracy with only 12-position which is half the cost of the widely adopted 24-position experimental procedure for achieving optimal accuracy.
基金supported by the National Natural Science Foundation of China(60771063).
文摘To realize the requirement of diagnostic sequence optimization in the process of design for testability, the authors put forward an optimization method based on quantum-behaved particle swarm optimization （QPSO） algorithm. By a precedence ordering coding, the diagnostic sequence optimization can be translated into a precedence ordering problem in the multidimensional space of swarm. It can get the optimizing order quickly by using the powerful and quick search capability of QPSO algorithm, and the order is the diagnostic sequence for the system. The realization of the method is simpler than other methods, and the results are more excellent than others, and it has been applied in the engineering practice.
基金supported by National Natural Science Foundation of Jiangxi Province, China (No. 20132BAB201044)Jiangxi Higher Technology Landing Project, China (No. KJLD12071)
文摘The optimal test sequence design for fault diagnosis is a challenging NP-complete problem.An improved differential evolution(DE)algorithm with additional inertial velocity term called inertial velocity differential evolution(IVDE)is proposed to solve the optimal test sequence problem(OTP)in complicated electronic system.The proposed IVDE algorithm is constructed based on adaptive differential evolution algorithm.And it is used to optimize the test sequence sets with a new individual fitness function including the index of fault isolation rate(FIR)satisfied and generate diagnostic decision tree to decrease the test sets and the test cost.The simulation results show that IVDE algorithm can cut down the test cost with the satisfied FIR.Compared with the other algorithms such as particle swarm optimization(PSO)and genetic algorithm(GA),IVDE can get better solution to OTP.
基金National Natural Science Foundation of China (51175502)
文摘Sensor selection and optimization is one of the important parts in design for testability. To address the problems that the traditional sensor optimization selection model does not take the requirements of prognostics and health management especially fault prognostics for testability into account and does not consider the impacts of sensor actual attributes on fault detectability, a novel sensor optimization selection model is proposed. Firstly, a universal architecture for sensor selection and optimization is provided. Secondly, a new testability index named fault predictable rate is defined to describe fault prognostics requirements for testability. Thirdly, a sensor selection and optimization model for prognostics and health management is constructed, which takes sensor cost as objective function and the defined testability indexes as constraint conditions. Due to NP-hard property of the model, a generic algorithm is designed to obtain the optimal solution. At last, a case study is presented to demonstrate the sensor selection approach for a stable tracking servo platform. The application results and comparison analysis show the proposed model and algorithm are effective and feasible. This approach can be used to select sensors for prognostics and health management of any system.
文摘Reliability, maintainability and testability （RMT） are important properties of equipment, since they have important influ- ence on operational availability and life cycle costs （LCC）. There- fore, weighting and optimizing the three properties are of great significance. A new approach for optimization of RMT parameters is proposed. First of all, the model for the equipment operation pro- cess is established based on the generalized stochastic Petri nets （GSPN） theory. Then, by solving the GSPN model, the quantitative relationship between operational availability and RMT parameters is obtained. Afterwards, taking history data of similar equipment and operation process into consideration, a cost model of design, manufacture and maintenance is developed. Based on operational availability, the cost model and parameters ranges, an optimization model of RMT parameters is built. Finally, the effectiveness and practicability of this approach are validated through an example.
