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Development of Wi-Fi Based Home Energy Monitoring System for Green Internet of Things 被引量:1
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作者 Mohamed Hadi Habaebi Qazi Mamoon Ashraf +1 位作者 Amir Alif Bin Azman Md.Rafiqul Islam 《Journal of Electronic Science and Technology》 CAS CSCD 2016年第3期249-256,共8页
Green Internet of things (loT) has been heralded as the "next big thing" waiting to be realized in energy-efficient ubiquitous computing. Green IoT revolves around increased machine-to-machine communications and e... Green Internet of things (loT) has been heralded as the "next big thing" waiting to be realized in energy-efficient ubiquitous computing. Green IoT revolves around increased machine-to-machine communications and encompasses energy-efficient wireless embedded sensors and actuators that assist in monitoring and controlling home appliances. Energy efficiency in home applications can be achieved by better monitoring of the specific energy consumption by the appliances. There are many wireless standards that can be adopted for the design of such embedded devices in loT. These communication technologies cater to different requirements and are classified as the short-range and long-range ones. To select the best communication method, this paper surveys various loT communication technologies and discusses the advantages and disadvantages to develop an energy monitoring system. An IoT device based on the Wi-Fi technology system is developed and tested for usage in the home energy monitoring environment. The performance of this system is then evaluated by the measurement of power consumption metrics. In the efficient deep-sleep mode, the system saves up to 0.3 W per cycle with an average power dissipation of less than 0.1 W/s. 展开更多
关键词 Index terms- Energy efficiency energy monitoring Internet of things.
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Delay Optimized Architecture for On-Chip Communication 被引量:1
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作者 Sheraz Anjum Jie Chen +1 位作者 Pei-Pei Yue Jian Liu 《Journal of Electronic Science and Technology of China》 2009年第2期104-109,共6页
Networks-on-chip (NoC), a new system on chip (SoC) paradigm, has become a great focus of research by many groups during the last few years. Among all the NoC architectures that have been proposed until now, 2D-Mes... Networks-on-chip (NoC), a new system on chip (SoC) paradigm, has become a great focus of research by many groups during the last few years. Among all the NoC architectures that have been proposed until now, 2D-Mesh has proved to be the best architecture for implementation due to its regular and simple interconnection structure. In this paper, we propose a new interconnect architecture called 2D-diagonal mesh (2DDgl-Mesh) for on-chip communication. The 2DDglMesh is almost similar to traditional 2D-Mesh in aspects of cost, area, and implementation, but it can outperform the later in delay. The both architectures are compared by using NS-2 (a network simulator) and CINS1M (a component based interconnection simulator) under the same traffic models and parametric conditions. The results of comparison show that under the proposed architecture, the packets can almost always be routed to their destinations in less time. In addition, our archi- tecture can sometimes perform better than 2D-Mesh in drop ratio for special fixed traffic models. 展开更多
关键词 Index terms-2D-Mesh NETWORKS-ON-CHIP networksimulator 2 traffic models system on chip.
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2-Dimension Interleaver Design for IDMA Systems 被引量:1
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作者 Jian-Hao Hu Cheng-Hai Zhang Ling Xiang 《Journal of Electronic Science and Technology of China》 2009年第2期97-103,共7页
A new design method interleavers,2-dimension interleavers,are proposed for interleave division multiple access(IDMA)systems.With a same interleaving rule named I',the row indices and column indices of a traditiona... A new design method interleavers,2-dimension interleavers,are proposed for interleave division multiple access(IDMA)systems.With a same interleaving rule named I',the row indices and column indices of a traditional block interleaving matrix are scrambled to obtain an interleaver,which is marked as the master interleaver.F is produced by a loworder PN sequence generator.Two ways are provided for generating different interleavers.One is that all interleavers are generated by the circular shifting master interleaver.The other is that different inter leavers are generated by different Ts.Besides,we prove that the minimum distance between two adjacent bits resulted from 2-dimension interleaves is much larger than that of other schemes,such as random interleavers,power interleavers,and shiffting interleaves.The simulation results show that 2-dimension interleavers can achieve much better performance with much less resource consumption than random interleavers in IDMA systems. 展开更多
关键词 Index terms-2-dimension interleavers interleave-division multiple access minimum distance randominterleavers shifting interleavers.
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