By analyzing the threshold-jumping of Schmitt circuits, this paper indicates that the core element realizing this function in binary TTL Schmitt circuits is the differential current switch with controllable threshold....By analyzing the threshold-jumping of Schmitt circuits, this paper indicates that the core element realizing this function in binary TTL Schmitt circuits is the differential current switch with controllable threshold. Based on the characteristic having two kinds of signal-detection threshold in ternary TTL circuits, a ternary TTL Schmitt circuit having twice reactions of threshold-jumping is designed. The simulation with PSPICE proves that the designed circuit has ideal function of Schmitt circuits.展开更多
本文提出了一种基于晶体管-晶体管逻辑(Transistor-Transistor Logic,TTL)协议的集成电路系统级测试系统,旨在解决复杂芯片测试中测试环境搭建及与分选机通讯的难题,同时满足市面上高端、特殊的集成电路测试专属化的需求。该系统由接口...本文提出了一种基于晶体管-晶体管逻辑(Transistor-Transistor Logic,TTL)协议的集成电路系统级测试系统,旨在解决复杂芯片测试中测试环境搭建及与分选机通讯的难题,同时满足市面上高端、特殊的集成电路测试专属化的需求。该系统由接口模块、电源模块、待测芯片连接模块、测试选择模块以及显示模块协同工作,实现了对多种集成电路的灵活测试,其工作流程为:①测试系统先向分选机发送开始测试信号,分选机将待测芯片从入料盘取出置入测试座中;②通过与测试系统通讯启动测试,测试系统对待测芯片进行测试并将测试结果发送至分选机端;③分选机根据测试系统反馈的结果将芯片放入不同的下料盘,完成芯片的良品与不良品分选。该集成电路系统级测试系统,突破了传统自动测试设备(Automatic Test Equipment,ATE)测试的限制,确保芯片在实际应用场景中与其他硬件、软件协同工作时的稳定性,显著提升了测试的灵活性与准确性。展开更多
基金Supported by the National Natural Science Foundation of Chinathe Natural Science Foundation of Zhejiang Province
文摘By analyzing the threshold-jumping of Schmitt circuits, this paper indicates that the core element realizing this function in binary TTL Schmitt circuits is the differential current switch with controllable threshold. Based on the characteristic having two kinds of signal-detection threshold in ternary TTL circuits, a ternary TTL Schmitt circuit having twice reactions of threshold-jumping is designed. The simulation with PSPICE proves that the designed circuit has ideal function of Schmitt circuits.
文摘本文提出了一种基于晶体管-晶体管逻辑(Transistor-Transistor Logic,TTL)协议的集成电路系统级测试系统,旨在解决复杂芯片测试中测试环境搭建及与分选机通讯的难题,同时满足市面上高端、特殊的集成电路测试专属化的需求。该系统由接口模块、电源模块、待测芯片连接模块、测试选择模块以及显示模块协同工作,实现了对多种集成电路的灵活测试,其工作流程为:①测试系统先向分选机发送开始测试信号,分选机将待测芯片从入料盘取出置入测试座中;②通过与测试系统通讯启动测试,测试系统对待测芯片进行测试并将测试结果发送至分选机端;③分选机根据测试系统反馈的结果将芯片放入不同的下料盘,完成芯片的良品与不良品分选。该集成电路系统级测试系统,突破了传统自动测试设备(Automatic Test Equipment,ATE)测试的限制,确保芯片在实际应用场景中与其他硬件、软件协同工作时的稳定性,显著提升了测试的灵活性与准确性。
