Polymer insulating through-silicon-vias （TSVs） is an attractive approach for high-performance 3D integration systems. To further demonstrate the polymer insulating TSVs, this paper investigates the thermal stability...Polymer insulating through-silicon-vias （TSVs） is an attractive approach for high-performance 3D integration systems. To further demonstrate the polymer insulating TSVs, this paper investigates the thermal stability by measuring the leakage current under bias-temperature condition, studies the thermal stress characteristics with Finite Element Analysis （FEA）, and tries to improve the thermal mechanical reliability of high-density TSVs array by optimizing the geometry parameters of pitch, liner and redistribution layer （RDL）. The electrical measurements show the polymer insulating TSVs can maintain good insulation capability （less than 2x 10TM A） under challenging bias-temperature conditions of 20 V and 200~C, despite the leakage degra- dation observation. The FEA results show that the thermal stress is significantly reduced at the sidewall, but highly concen- trates at the surface, which is the potential location of mechanical failure. And, the analysis results indicate that the polymer insulating TSVs （diameter of 10 μm, depth of 50 μm） array with a pitch of 20 μm, liner thickness of 1 μm and RDL radius of 9 μm has an optimized thermal-mechanical reliability for application.展开更多
Filling high aspect ratio through silicon vias （TSVs） without voids and seams by copper plating is one of the technical challenges for 3D integration. Bottom-up copper plating is an effective solution for TSV fillin...Filling high aspect ratio through silicon vias （TSVs） without voids and seams by copper plating is one of the technical challenges for 3D integration. Bottom-up copper plating is an effective solution for TSV filling. In this paper, a new numerical model was developed to simulate the electrochemical deposition （ECD） process, and the influence of an accelerator in the electrolyte was investigated. The arbitrary Lagrange-Eulerian （ALE） method for solving moving boundaries in the finite element method （FEM） was used to simulate the electrochemical process. In the model, diffusion coefficient and adsorption coefficient were considered, and then the time-resolved evolution of electroplating profiles was simulated with ion concentration distribution and the electric current density.展开更多
Low-k and high aspect ratio blind through-silicon-vias （TSVs） to be applied in ＂via-last/backside via＂ 3-D integration paradigm were fabricated with polyimide dielectric liners formed by vacuum-assisted spin coati...Low-k and high aspect ratio blind through-silicon-vias （TSVs） to be applied in ＂via-last/backside via＂ 3-D integration paradigm were fabricated with polyimide dielectric liners formed by vacuum-assisted spin coating technique. MIS trench capacitors with diameter of-6 μm and depth of-54 μm were successfully fabricated with polyimide insulator step coverage better than 30%. C-V characteristics and leakage current properties of the MIS trench capacitor were evaluated under thermal treat- ment. Experimental results show that, the minimum capacitance density is around 4.82 nF/cm2, and the leakage current density after 30 cycles of thermal chock tests becomes stable and it is around 30 nA/cm2 under bias voltage of 20 V. It also shows that, the polyimide dielectric liner is with an excellent capability in constraining copper ion diffusion and mobile charges even un- der test temperature as high as 125℃. Finite element analysis results show that TSVs with polyimide dielectric liner are with lower risks in SiO2 interlayer dielectric （ILD） fracture and interfacial delamination along dielectric-silicon interface, thus, higher thermo-mechanical reliability can be expected.展开更多
Through-silicon via(TSV)is a key enabling technology for the emerging 3-dimension(3 D)integrated circuits(ICs).However,the crosstalk between the neighboring TSVs is one of the important sources of the soft faults.To s...Through-silicon via(TSV)is a key enabling technology for the emerging 3-dimension(3 D)integrated circuits(ICs).However,the crosstalk between the neighboring TSVs is one of the important sources of the soft faults.To suppress the crosstalk,the Fibonacci-numeral-system-based crosstalk avoidance code(FNS-CAC)is an effective scheme.Meanwhile,the self-repair schemes are often used to deal with the hard faults,but the repaired results may change the mapping between signals to TSVs,thus may reduce the crosstalk suppression ability of FNS-CAC.A TSV self-repair technique with an improved FNS-CAC codec is proposed in this work.The codec is designed based on the improved Fibonacci numeral system(FNS)adders,which are adaptive to the health states of TSVs.The proposed self-repair technique is able to suppress the crosstalk and repair the faulty TSVs simultaneously.The simulation and analysis results show that the proposed scheme keeps the crosstalk suppression ability of the original FNS-CAC,and it has higher reparability than the local self-repair schemes,such as the signal-switching-based and the signal-shifting-based counterparts.展开更多
基于TSV(Through Silicon Via)技术,设计了一款采用硅基堆叠的变频微模组,通过PoP(Package on Package)堆叠实现多层硅基板堆叠封装,芯片两层堆叠垂直互连,完成X波段下变频功能。相比于多层硅基晶圆级直接堆叠架构,工艺难度降低,良率提...基于TSV(Through Silicon Via)技术,设计了一款采用硅基堆叠的变频微模组,通过PoP(Package on Package)堆叠实现多层硅基板堆叠封装,芯片两层堆叠垂直互连,完成X波段下变频功能。相比于多层硅基晶圆级直接堆叠架构,工艺难度降低,良率提升。该微模组利用类同轴硅通孔结构解决微波信号在多层硅基板中垂直传输的问题,并进行了实物测试验证。该变频微模组集成度高、射频性能良好,其体积相对于传统混合集成结构减少90%,实现了射频功能的微系统化。展开更多
文摘Polymer insulating through-silicon-vias （TSVs） is an attractive approach for high-performance 3D integration systems. To further demonstrate the polymer insulating TSVs, this paper investigates the thermal stability by measuring the leakage current under bias-temperature condition, studies the thermal stress characteristics with Finite Element Analysis （FEA）, and tries to improve the thermal mechanical reliability of high-density TSVs array by optimizing the geometry parameters of pitch, liner and redistribution layer （RDL）. The electrical measurements show the polymer insulating TSVs can maintain good insulation capability （less than 2x 10TM A） under challenging bias-temperature conditions of 20 V and 200~C, despite the leakage degra- dation observation. The FEA results show that the thermal stress is significantly reduced at the sidewall, but highly concen- trates at the surface, which is the potential location of mechanical failure. And, the analysis results indicate that the polymer insulating TSVs （diameter of 10 μm, depth of 50 μm） array with a pitch of 20 μm, liner thickness of 1 μm and RDL radius of 9 μm has an optimized thermal-mechanical reliability for application.
基金supported by the National S&T Major Projects(No.2011ZX02709-2)
文摘Filling high aspect ratio through silicon vias （TSVs） without voids and seams by copper plating is one of the technical challenges for 3D integration. Bottom-up copper plating is an effective solution for TSV filling. In this paper, a new numerical model was developed to simulate the electrochemical deposition （ECD） process, and the influence of an accelerator in the electrolyte was investigated. The arbitrary Lagrange-Eulerian （ALE） method for solving moving boundaries in the finite element method （FEM） was used to simulate the electrochemical process. In the model, diffusion coefficient and adsorption coefficient were considered, and then the time-resolved evolution of electroplating profiles was simulated with ion concentration distribution and the electric current density.
基金supported by the National Natural Science Foundation of China(Grant Nos.61404008&61574016)"111"Project of China(Grant No.B14010)
文摘Low-k and high aspect ratio blind through-silicon-vias （TSVs） to be applied in ＂via-last/backside via＂ 3-D integration paradigm were fabricated with polyimide dielectric liners formed by vacuum-assisted spin coating technique. MIS trench capacitors with diameter of-6 μm and depth of-54 μm were successfully fabricated with polyimide insulator step coverage better than 30%. C-V characteristics and leakage current properties of the MIS trench capacitor were evaluated under thermal treat- ment. Experimental results show that, the minimum capacitance density is around 4.82 nF/cm2, and the leakage current density after 30 cycles of thermal chock tests becomes stable and it is around 30 nA/cm2 under bias voltage of 20 V. It also shows that, the polyimide dielectric liner is with an excellent capability in constraining copper ion diffusion and mobile charges even un- der test temperature as high as 125℃. Finite element analysis results show that TSVs with polyimide dielectric liner are with lower risks in SiO2 interlayer dielectric （ILD） fracture and interfacial delamination along dielectric-silicon interface, thus, higher thermo-mechanical reliability can be expected.
基金supported in part by the Key-Area Research and Development Program of Guangdong Province(2019B010155002)the National Key Research and Development Project(2018YFB2202600)the Research and Development Project of Shenzhen Government(ZDSYS201802061805105).
文摘Through-silicon via(TSV)is a key enabling technology for the emerging 3-dimension(3 D)integrated circuits(ICs).However,the crosstalk between the neighboring TSVs is one of the important sources of the soft faults.To suppress the crosstalk,the Fibonacci-numeral-system-based crosstalk avoidance code(FNS-CAC)is an effective scheme.Meanwhile,the self-repair schemes are often used to deal with the hard faults,but the repaired results may change the mapping between signals to TSVs,thus may reduce the crosstalk suppression ability of FNS-CAC.A TSV self-repair technique with an improved FNS-CAC codec is proposed in this work.The codec is designed based on the improved Fibonacci numeral system(FNS)adders,which are adaptive to the health states of TSVs.The proposed self-repair technique is able to suppress the crosstalk and repair the faulty TSVs simultaneously.The simulation and analysis results show that the proposed scheme keeps the crosstalk suppression ability of the original FNS-CAC,and it has higher reparability than the local self-repair schemes,such as the signal-switching-based and the signal-shifting-based counterparts.
文摘基于TSV(Through Silicon Via)技术,设计了一款采用硅基堆叠的变频微模组,通过PoP(Package on Package)堆叠实现多层硅基板堆叠封装,芯片两层堆叠垂直互连,完成X波段下变频功能。相比于多层硅基晶圆级直接堆叠架构,工艺难度降低,良率提升。该微模组利用类同轴硅通孔结构解决微波信号在多层硅基板中垂直传输的问题,并进行了实物测试验证。该变频微模组集成度高、射频性能良好,其体积相对于传统混合集成结构减少90%,实现了射频功能的微系统化。
