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Improved phase sensitivity of an SU(1,1)interferometer based on the internal single-path local squeezing operation
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作者 Qingqian Kang Zekun Zhao +2 位作者 Teng Zhao Cunjin Liu Liyun Hu 《Frontiers of physics》 2025年第5期107-119,共13页
Compared with passive interferometers,SU(1,1)interferometers demonstrate superior phase sensitivity due to the incorporation of nonlinear elements that enhance their ability to detect phase shifts.Nevertheless,the mea... Compared with passive interferometers,SU(1,1)interferometers demonstrate superior phase sensitivity due to the incorporation of nonlinear elements that enhance their ability to detect phase shifts.Nevertheless,the measurement precision of these interferometers is considerably impacted by photon losses,particularly internal losses,thereby restricting the overall accuracy of measurements.Addressing these issues is essential to fully realize the advantages of SU(1,1)interferometers in practical applications.Among the available resources in quantum metrology,squeezing stands out as one of the most practical and efficient approaches.We propose a theoretical scheme to improve the precision of phase measurement using homodyne detection by implementing the single-path local squeezing operation(LSO)inside the SU(1,1)interferometer,with the coherent state and the vacuum state as the input states.We not only analyze the effects of the single-path LSO scheme on the phase sensitivity and the quantum Fisher information(QFI)under both ideal and photon-loss cases but also compare the impact of different squeezing parameters r on the system performance.Our findings reveal that the internal single-path LSO scheme can significantly enhance the phase sensitivity and QFI by strengthening intramode correlations while weakening intermode correlations,thereby effectively improving the robustness of the SU(1,1)interferometer against photon losses. 展开更多
关键词 phase sensitivity SU(1 1)interferometer internal single-path local squeezing
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A pipelined architecture for normal I/O order FFT
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作者 Xue LIU Feng YU Ze-ke WANG 《Journal of Zhejiang University-Science C(Computers and Electronics)》 SCIE EI 2011年第1期76-82,共7页
We present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order.A single-path delay commutator processing element (SDC PE) has been proposed for... We present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order.A single-path delay commutator processing element (SDC PE) has been proposed for the first time.It saves a complex adder compared with the typical radix-2 butterfly unit.The new pipelined architecture can be built using the proposed processing element.The proposed architecture can lead to 100% hardware utilization and 50% reduction in the overall number of adders required in the conventional pipelined FFT designs.In order to produce the output sequence in normal order,we also present a bit reverser,which can achieve a 50% reduction in memory usage. 展开更多
关键词 Fast Fourier transform (FFT) single-path delay commutator (SDC) Pipelined FFT Bit reverser
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