A dual-band direct-conversion WLAN transceiver baseband compliant with the IEEE 802.11 a/b/g standards is described. Several critical techniques for receiver DC offset compensation and transmitter carrier leakage reje...A dual-band direct-conversion WLAN transceiver baseband compliant with the IEEE 802.11 a/b/g standards is described. Several critical techniques for receiver DC offset compensation and transmitter carrier leakage rejection calibration are presented that enable the direct-conversion architecture to meet all WLAN specifications. The receiver baseband VGA provides 62 dB gain range with steps of 2 dB and a DC offset cancellation circuit is introduced to remove the offset from layout and self-mixing. The calibration loop achieves constant high-pass pole when gain changes; and a fast response time by programming the pole to 1 MHz during preamble and to 30 kHz during receiving data. The transmitter baseband employs an auto-calibration loop with on-chip AD and DA to suppress the carrier leakage, and AD can be powered down after calibration to save power consumption. The chip consumes 17.52 mA for RX baseband VGA and DCOC, and 8.3 mA for TX carrier leakage calibration （5.88 mA after calibration） from 2.85 V supply. Implemented in a 0.35μm SiGe technology, they occupy 0.68 mm^2 and 0.18 mma die size respectively.展开更多
文摘A dual-band direct-conversion WLAN transceiver baseband compliant with the IEEE 802.11 a/b/g standards is described. Several critical techniques for receiver DC offset compensation and transmitter carrier leakage rejection calibration are presented that enable the direct-conversion architecture to meet all WLAN specifications. The receiver baseband VGA provides 62 dB gain range with steps of 2 dB and a DC offset cancellation circuit is introduced to remove the offset from layout and self-mixing. The calibration loop achieves constant high-pass pole when gain changes; and a fast response time by programming the pole to 1 MHz during preamble and to 30 kHz during receiving data. The transmitter baseband employs an auto-calibration loop with on-chip AD and DA to suppress the carrier leakage, and AD can be powered down after calibration to save power consumption. The chip consumes 17.52 mA for RX baseband VGA and DCOC, and 8.3 mA for TX carrier leakage calibration （5.88 mA after calibration） from 2.85 V supply. Implemented in a 0.35μm SiGe technology, they occupy 0.68 mm^2 and 0.18 mma die size respectively.
