A novel triple RESURF（T-resurf） SOI LDMOS structure is proposed.This structure has a P-type buried layer.Firstly,the depletion layer can extend on both sides of the P-buried layer,serving as a triple RESURF and lead...A novel triple RESURF（T-resurf） SOI LDMOS structure is proposed.This structure has a P-type buried layer.Firstly,the depletion layer can extend on both sides of the P-buried layer,serving as a triple RESURF and leading to a high drift doping and a low on-resistance.Secondly,at a high doping concentration of the drift region, the P-layer can reduce high bulk electric field in the drift region and enhance the vertical electric field at the drain side,which results in uniform bulk electric field distributions and an enhanced BV.The proposed structure is used in SOI devices for the first time.The T-resurf SOI LDMOS with BV = 315 V is obtained by simulation on a 6μm-thick SOI layer over a 2μm-thick buried oxide layer,and its R_（sp） is reduced from 16.5 to 13.8 mΩ·cm^2 in comparison with the double RESURF（D-resurf） SOI LDMOS.When the thickness of the SOI layer increases, T-resurf SOI LDMOS displays a more obvious effect on the enhancement of BV^2/R_（on）.It reduces R_（sp） by 25%in 400 V SOI LDMOS and by 38%in 550 V SOI LDMOS compared with the D-resurf structure.展开更多
A novel CMOS-compatible thin film SOI LDMOS with a novel body contact structure is proposed. It has a Si window and a P-body extended to the substrate through the Si window, thus, the P-body touches the P＋ region to ...A novel CMOS-compatible thin film SOI LDMOS with a novel body contact structure is proposed. It has a Si window and a P-body extended to the substrate through the Si window, thus, the P-body touches the P＋ region to form the body contact. Compared with the conventional floating body SOI LDMOS （FB SOI LDMOS） structure, the new structure increases the off-state BV by 54%, decreases the specific on resistance by 20%, improves the output characteristics significantly, and suppresses the self-heating effect. Furthermore, the advantages of the low leakage current and low output capacitance of SOI devices do not degrade.展开更多
SOI (Silicon-On-Insulator)高压LDMOS (Lateral Double Diffusion Metal Oxide Semiconductor)作为高压集成电路的核心器件,广泛应用于模拟开关、栅驱动及电源管理电路中。通过TCAD仿真软件,开展SOI高压LDMOS器件的单粒子敏感点及器件...SOI (Silicon-On-Insulator)高压LDMOS (Lateral Double Diffusion Metal Oxide Semiconductor)作为高压集成电路的核心器件,广泛应用于模拟开关、栅驱动及电源管理电路中。通过TCAD仿真软件,开展SOI高压LDMOS器件的单粒子敏感点及器件烧毁机理研究。器件在重离子的影响下产生大量的离化电荷,并在电场作用下发生漂移运动,从而诱发寄生三极管开启,导致器件发生单粒子烧毁(Single Event Burnout,SEB)效应而失效。采取脉冲激光对SOI高压LDMOS器件的单粒子敏感点进行辐射试验,试验结果表明脉冲激光能量为2 n J时,SOI高压LDMOS器件未发生SEB效应,验证了脉冲激光模拟试验评估SOI LDMOS器件抗SEB能力的可行性。展开更多
A 680 V LDMOS on a thin SOI with an improved field oxide（FOX） and dual field plate was studied experimentally.The FOX structure was formed by an ＂oxidation-etch-oxidation＂ process,which took much less time to form...A 680 V LDMOS on a thin SOI with an improved field oxide（FOX） and dual field plate was studied experimentally.The FOX structure was formed by an ＂oxidation-etch-oxidation＂ process,which took much less time to form,and had a low protrusion profile.A polysilicon field plate extended to the FOX and a long metal field plate was used to improve the specific on-resistance.An optimized drift region implant for linear-gradient doping was adopted to achieve a uniform lateral electric field.Using a SimBond SOI wafer with a 1.5μm top silicon and a 3μm buried oxide layer,CMOS compatible SOI LDMOS processes are designed and implemented successfully. The off-state breakdown voltage reached 680 V,and the specific on-resistance was 8.2Ω·mm^2.展开更多
基金Project supported by the National Natural Science Foundation of China(Nos.60806025,60976060)
文摘A novel triple RESURF（T-resurf） SOI LDMOS structure is proposed.This structure has a P-type buried layer.Firstly,the depletion layer can extend on both sides of the P-buried layer,serving as a triple RESURF and leading to a high drift doping and a low on-resistance.Secondly,at a high doping concentration of the drift region, the P-layer can reduce high bulk electric field in the drift region and enhance the vertical electric field at the drain side,which results in uniform bulk electric field distributions and an enhanced BV.The proposed structure is used in SOI devices for the first time.The T-resurf SOI LDMOS with BV = 315 V is obtained by simulation on a 6μm-thick SOI layer over a 2μm-thick buried oxide layer,and its R_（sp） is reduced from 16.5 to 13.8 mΩ·cm^2 in comparison with the double RESURF（D-resurf） SOI LDMOS.When the thickness of the SOI layer increases, T-resurf SOI LDMOS displays a more obvious effect on the enhancement of BV^2/R_（on）.It reduces R_（sp） by 25%in 400 V SOI LDMOS and by 38%in 550 V SOI LDMOS compared with the D-resurf structure.
基金supported by the National Natural Science Foundation of China(Nos.61176069,60976060,51308020304)
文摘A novel CMOS-compatible thin film SOI LDMOS with a novel body contact structure is proposed. It has a Si window and a P-body extended to the substrate through the Si window, thus, the P-body touches the P＋ region to form the body contact. Compared with the conventional floating body SOI LDMOS （FB SOI LDMOS） structure, the new structure increases the off-state BV by 54%, decreases the specific on resistance by 20%, improves the output characteristics significantly, and suppresses the self-heating effect. Furthermore, the advantages of the low leakage current and low output capacitance of SOI devices do not degrade.
基金Project supported by the National Natural Science Foundation of China(Nos.11175229,61006088)
文摘A 680 V LDMOS on a thin SOI with an improved field oxide（FOX） and dual field plate was studied experimentally.The FOX structure was formed by an ＂oxidation-etch-oxidation＂ process,which took much less time to form,and had a low protrusion profile.A polysilicon field plate extended to the FOX and a long metal field plate was used to improve the specific on-resistance.An optimized drift region implant for linear-gradient doping was adopted to achieve a uniform lateral electric field.Using a SimBond SOI wafer with a 1.5μm top silicon and a 3μm buried oxide layer,CMOS compatible SOI LDMOS processes are designed and implemented successfully. The off-state breakdown voltage reached 680 V,and the specific on-resistance was 8.2Ω·mm^2.
