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A Reconfigurable Omnidirectional Triboelectric Whisker Sensor Array for Versatile Human–Machine–Environment Interaction
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作者 Weichen Wang Jiaqi Zhu +9 位作者 Hongfa Zhao Fei Yao Yuzhu Zhang Xiankuan Qian Mingrui Shu Zhigang Wu Minyi Xu Hongya Geng Wenbo Ding Juntian Qu 《Nano-Micro Letters》 2026年第3期121-140,共20页
Developing effective,versatile,and high-precision sensing interfaces remains a crucial challenge in human-machine-environment interaction applications.Despite progress in interaction-oriented sensing skins,limitations... Developing effective,versatile,and high-precision sensing interfaces remains a crucial challenge in human-machine-environment interaction applications.Despite progress in interaction-oriented sensing skins,limitations remain in unit-level reconfiguration,multiaxial force and motion sensing,and robust operation across dynamically changing or irregular surfaces.Herein,we develop a reconfigurable omnidirectional triboelectric whisker sensor array(RO-TWSA)comprising multiple sensing units that integrate a triboelectric whisker structure(TWS)with an untethered hydro-sealing vacuum sucker(UHSVS),enabling reversibly portable deployment and omnidirectional perception across diverse surfaces.Using a simple dual-triangular electrode layout paired with MXene/silicone nanocomposite dielectric layer,the sensor unit achieves precise omnidirectional force and motion sensing with a detection threshold as low as 0.024 N and an angular resolution of 5°,while the UHSVS provides reliable and reversible multi-surface anchoring for the sensor units by involving a newly designed hydrogel combining high mechanical robustness and superior water absorption.Extensive experiments demonstrate the effectiveness of RO-TWSA across various interactive scenarios,including teleoperation,tactile diagnostics,and robotic autonomous exploration.Overall,RO-TWSA presents a versatile and high-resolution tactile interface,offering new avenues for intelligent perception and interaction in complex real-world environments. 展开更多
关键词 reconfigurable sensor array Interaction interface Tactile perception Omnidirectional sensor Reversible anchoring
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Loop Subgraph-Level Greedy Mapping Algorithm for Grid Coarse-Grained Reconfigurable Array 被引量:2
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作者 Naijin Chen Fei Cheng +2 位作者 Chenghao Han Jianhui Jiang Xiaoqing Wen 《Tsinghua Science and Technology》 SCIE EI CAS CSCD 2023年第2期330-343,共14页
To solve the problem of grid coarse-grained reconfigurable array task mapping under multiple constraints,we propose a Loop Subgraph-Level Greedy Mapping(LSLGM)algorithm using parallelism and processing element fragmen... To solve the problem of grid coarse-grained reconfigurable array task mapping under multiple constraints,we propose a Loop Subgraph-Level Greedy Mapping(LSLGM)algorithm using parallelism and processing element fragmentation.Under the constraint of a reconfigurable array,the LSLGM algorithm schedules node from a ready queue to the current reconfigurable cell array block.After mapping a node,its successor’s indegree value will be dynamically updated.If its successor’s indegree is zero,it will be directly scheduled to the ready queue;otherwise,the predecessor must be dynamically checked.If the predecessor cannot be mapped,it will be scheduled to a blocking queue.To dynamically adjust the ready node scheduling order,the scheduling function is constructed by exploiting factors,such as node number,node level,and node dependency.Compared with the loop subgraph-level mapping algorithm,experimental results show that the total cycles of the LSLGM algorithm decreases by an average of 33.0%(PEA44)and 33.9%(PEA_(7×7)).Compared with the epimorphism map algorithm,the total cycles of the LSLGM algorithm decrease by an average of 38.1%(PEA_(4×4))and 39.0%(PEA_(7×7)).The feasibility of LSLGM is verified. 展开更多
关键词 Grid Coarse-Grained reconfigurable array(GCGRA) mapping loop subgraph scheduling
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Improving DOA estimation of GNSS interference through sparse non-uniform array reconfiguration 被引量:1
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作者 Rongling LANG Hao XU +3 位作者 Fei GAO Zewen TANG Zhipeng WANG Amir HUSSAIN 《Chinese Journal of Aeronautics》 2025年第8期104-118,共15页
Interference significantly impacts the performance of the Global Navigation Satellite Systems(GNSS),highlighting the need for advanced interference localization technology to bolster anti-interference and defense capa... Interference significantly impacts the performance of the Global Navigation Satellite Systems(GNSS),highlighting the need for advanced interference localization technology to bolster anti-interference and defense capabilities.The Uniform Circular Array(UCA)enables concurrent estimation of the Direction of Arrival(DOA)in both azimuth and elevation.Given the paramount importance of stability and real-time performance in interference localization,this work proposes an innovative approach to reduce the complexity and increase the robustness of the DOA estimation.The proposed method reduces computational complexity by selecting a reduced number of array elements to reconstruct a non-uniform sparse array from a UCA.To ensure DOA estimation accuracy,minimizing the Cramér-Rao Bound(CRB)is the objective,and the Spatial Correlation Coefficient(SCC)is incorporated as a constraint to mitigate side-lobe.The optimization model is a quadratic fractional model,which is solved by Semi-Definite Relaxation(SDR).When the array has perturbations,the mathematical expressions for CRB and SCC are re-derived to enhance the robustness of the reconstructed array.Simulation and hardware experiments validate the effectiveness of the proposed method in estimating interference DOA,showing high robustness and reductions in hardware and computational costs associated with DOA estimation. 展开更多
关键词 GNSS interference location Direction of arrival estimation Adaptive reconfigurable array Cramér-Raobound Quadratic fractional programming
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A Planar 4-Bit Reconfigurable Antenna Array Based on the Design Philosophy of Information Metasurfaces 被引量:4
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作者 Zheng Xing Wang Hanqing Yang +5 位作者 Ruiwen Shao Jun Wei Wu Guobiao Liu Feng Zhai Qiang Cheng Tie Jun Cui 《Engineering》 SCIE EI CAS 2022年第10期64-74,共11页
Inspired by the design philosophy of information metasurfaces based on the digital coding concept,a planar 4-bit reconfigurable antenna array with low profile of 0.15λ0(whereλ0is the free-space wavelength)is present... Inspired by the design philosophy of information metasurfaces based on the digital coding concept,a planar 4-bit reconfigurable antenna array with low profile of 0.15λ0(whereλ0is the free-space wavelength)is presented.The array is based on a digital coding radiation element consisting of a 1-bit magnetoelectric(ME)dipole and a miniaturized reflection-type phase shifter(RTPS).The proposed 1-bit ME dipole can provide two digital states of"0"and"1"(with 0°and 180°phase responses)over a wide frequency band by individually exciting its two symmetrical feeding ports.The designed RTPS is able to realize a relative phase shift of 173°.By digitally quantizing its phase in the range of 157.5°,additional eight digital states at intervals of 22.5°are obtained.To achieve low sidelobe levels,a 1:16 power divider based on the Taylor line source method is employed to feed the array,A prototype of the proposed 4-bit antenna array has been fabricated and tested,and the experimental results are in good agreement with the simulations.Scanning beams within a±45°range were measured with a maximum realized gain of 13.4 dBi at12 GHz.The sidelobe and cross-polarization levels are below-14.3 and-23.0 dB,respectively.Furthermore,the beam pointing error is within 0.8°,and the 3 dB gain bandwidth of the broadside beam is 25%.Due to its outstanding performance,the array holds potential for significant applications in radar and wireless communication systems. 展开更多
关键词 4-bit reconfigurable antenna array Information metasurface Digital coding method Low sidelobe Low profile
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Fixed-Time Sliding Mode Control With Varying Exponent Coefficient for Modular Reconfigurable Flight Arrays
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作者 Jianquan Yang Chunxi Yang +1 位作者 Xiufeng Zhang Jing Na 《IEEE/CAA Journal of Automatica Sinica》 SCIE EI CSCD 2024年第2期514-528,共15页
The modular system can change its physical structure by self-assembly and self-disassembly between modules to dynamically adapt to task and environmental requirements. Recognizing the adaptive capability of modular sy... The modular system can change its physical structure by self-assembly and self-disassembly between modules to dynamically adapt to task and environmental requirements. Recognizing the adaptive capability of modular systems, we introduce a modular reconfigurable flight array(MRFA) to pursue a multifunction aircraft fitting for diverse tasks and requirements,and investigate the attitude control and the control allocation problem by using the modular reconfigurable flight array as a platform. First, considering the variable and irregular topological configuration of the modular array, a center-of-mass-independent flight array dynamics model is proposed to allow control allocation under over-actuated situations. Secondly, in order to meet the stable, fast and accurate attitude tracking performance of the MRFA, a fixed-time convergent sliding mode controller with state-dependent variable exponent coefficients is proposed to ensure fast convergence rate both away from and near the system equilibrium point without encountering the singularity. It is shown that the controller also has fixed-time convergent characteristics even in the presence of external disturbances. Finally,simulation results are provided to demonstrate the effectiveness of the proposed modeling and control strategies. 展开更多
关键词 Control allocation dynamic model fixed-time stabilization modular reconfigurable flight array(MRFA) sliding mode
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Design and implementation of near-memory computing array architecture based on shared buffer 被引量:2
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作者 SHAN Rui GAO Xu +3 位作者 FENG Yani HUI Chao CUI Xinyue CHAI Miaomiao 《High Technology Letters》 EI CAS 2022年第4期345-353,共9页
Deep learning algorithms have been widely used in computer vision,natural language processing and other fields.However,due to the ever-increasing scale of the deep learning model,the requirements for storage and compu... Deep learning algorithms have been widely used in computer vision,natural language processing and other fields.However,due to the ever-increasing scale of the deep learning model,the requirements for storage and computing performance are getting higher and higher,and the processors based on the von Neumann architecture have gradually exposed significant shortcomings such as consumption and long latency.In order to alleviate this problem,large-scale processing systems are shifting from a traditional computing-centric model to a data-centric model.A near-memory computing array architecture based on the shared buffer is proposed in this paper to improve system performance,which supports instructions with the characteristics of store-calculation integration,reducing the data movement between the processor and main memory.Through data reuse,the processing speed of the algorithm is further improved.The proposed architecture is verified and tested through the parallel realization of the convolutional neural network(CNN)algorithm.The experimental results show that at the frequency of 110 MHz,the calculation speed of a single convolution operation is increased by 66.64%on average compared with the CNN architecture that performs parallel calculations on field programmable gate array(FPGA).The processing speed of the whole convolution layer is improved by 8.81%compared with the reconfigurable array processor that does not support near-memory computing. 展开更多
关键词 near-memory computing shared buffer reconfigurable array processor convolutional neural network(CNN)
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Developing Three-Dimensional Beamshaping Techniques on Volumetric Random Arrays to Suppress Array Sidelobes
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作者 Shihyuan Yeh 《Open Journal of Antennas and Propagation》 2023年第2期36-48,共13页
This paper proposes a three-dimensional (3-D) amplitude tapering technique on volumetric random arrays to minimize array sidelobes and emulate phased array operations on mobile platforms. Our ultimate goal is to reali... This paper proposes a three-dimensional (3-D) amplitude tapering technique on volumetric random arrays to minimize array sidelobes and emulate phased array operations on mobile platforms. Our ultimate goal is to realize wireless phased array applications carried out by mobile platforms;in this paper, we focus on the development of collaborative beamforming algorithms. This beamshaping technique mitigates the discontinuity of the current distribution along the array aperture and lower array sidelobe level (SLL) by specially paying attention to the array element’s depth deviation. In this work, step by step amplitude tapering procedures are clearly illustrated. Further, a reconfigurable phased array with sixteen patch antennas is tested to verify the fidelity of the 3-D beamshaping algorithm. Measured and simulated radiation patterns are benchmarked to evaluate the sidelobe suppression results, and the best sidelobe suppressed region is around the array’s main beam. 展开更多
关键词 Amplitude Tapering Antenna arrays array Beamforming array Beamshaping Mobile Platforms Random array reconfigurable array Sidelobe Level Unmanned Aerial Vehicle
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A Novel Aquila Optimizer Based PV Array Reconfiguration Scheme to Generate Maximum Energy under Partial Shading Condition 被引量:1
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作者 Dong An Junqing Jia +4 位作者 Wenchao Cai Deyu Yang Chao Lv Jiawei Zhu Yingying Jiao 《Energy Engineering》 EI 2022年第4期1531-1545,共15页
This paper develops a real-time PV arrays maximum power harvesting scheme under partial shading condition(PSC)by reconfiguring PV arrays using Aquila optimizer(AO).AO is based on the natural behaviors of Aquila in cap... This paper develops a real-time PV arrays maximum power harvesting scheme under partial shading condition(PSC)by reconfiguring PV arrays using Aquila optimizer(AO).AO is based on the natural behaviors of Aquila in capturing prey,which can choose the best hunting mechanism ingeniously and quickly by balancing the local exploitation and global exploration via four hunting methods of Aquila:choosing the searching area through high soar with the vertical stoop,exploring in different searching spaces through contour flight with quick glide attack,exploiting in convergence searching space through low flight with slow attack,and swooping through walk and grabbing prey.In general,PV arrays reconfiguration is a problem of discrete optimization,thus a series of discrete operations are adopted in AO to enhance its optimization performance.Simulation results based on 10 cases under PSCs show that the mismatched power loss obtained by AO is the smallest compared with genetic algorithm,particle swarm optimization,ant colony algorithm,grasshopper optimization algorithm,and butterfly optimization algorithm,which reduced by 4.34%against butterfly optimization algorithm. 展开更多
关键词 PV array reconfiguration partial shading condition Aquila optimizer maximum power extraction total-cross-tied
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A simplified hardware-friendly contour prediction algorithm in 3D-HEVC and parallelization design 被引量:1
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作者 JIANG Lin DUAN Xueyao XIE Xiaoyan 《High Technology Letters》 EI CAS 2022年第4期392-400,共9页
After the extension of depth modeling mode 4(DMM-4)in 3D high efficiency video coding(3D-HEVC),the computational complexity increases sharply,which causes the real-time performance of video coding to be impacted.To re... After the extension of depth modeling mode 4(DMM-4)in 3D high efficiency video coding(3D-HEVC),the computational complexity increases sharply,which causes the real-time performance of video coding to be impacted.To reduce the computational complexity of DMM-4,a simplified hardware-friendly contour prediction algorithm is proposed in this paper.Based on the similarity between texture and depth map,the proposed algorithm directly codes depth blocks to calculate edge regions to reduce the number of reference blocks.Through the verification of the test sequence on HTM16.1,the proposed algorithm coding time is reduced by 9.42%compared with the original algorithm.To avoid the time consuming of serial coding on HTM,a parallelization design of the proposed algorithm based on reconfigurable array processor(DPR-CODEC)is proposed.The parallelization design reduces the storage access time,configuration time and saves the storage cost.Verified with the Xilinx Virtex 6 FPGA,experimental results show that parallelization design is capable of processing HD 1080p at a speed above 30 frames per second.Compared with the related work,the scheme reduces the LUTs by 42.3%,the REG by 85.5%and the hardware resources by 66.7%.The data loading speedup ratio of parallel scheme can reach 3.4539.On average,the different sized templates serial/parallel speedup ratio of encoding time can reach 2.446. 展开更多
关键词 depth modeling mode 4(DMM-4) contour prediction 3D high efficiency video coding(3D-HEVC) PARALLELIZATION reconfigurable array processor
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BAR:a branch-alternation-resorting algorithm for locality exploration in graph processing
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作者 邓军勇 WANG Junjie +2 位作者 JIANG Lin XIE Xiaoyan ZHOU Kai 《High Technology Letters》 EI CAS 2024年第1期31-42,共12页
Unstructured and irregular graph data causes strong randomness and poor locality of data accesses in graph processing.This paper optimizes the depth-branch-resorting algorithm(DBR),and proposes a branch-alternation-re... Unstructured and irregular graph data causes strong randomness and poor locality of data accesses in graph processing.This paper optimizes the depth-branch-resorting algorithm(DBR),and proposes a branch-alternation-resorting algorithm(BAR).In order to make the algorithm run in parallel and improve the efficiency of algorithm operation,the BAR algorithm is mapped onto the reconfigurable array processor(APR-16)to achieve vertex reordering,effectively improving the locality of graph data.This paper validates the BAR algorithm on the GraphBIG framework,by utilizing the reordered dataset with BAR on breadth-first search(BFS),single source shortest paht(SSSP)and betweenness centrality(BC)algorithms for traversal.The results show that compared with DBR and Corder algorithms,BAR can reduce execution time by up to 33.00%,and 51.00%seperatively.In terms of data movement,the BAR algorithm has a maximum reduction of 39.00%compared with the DBR algorithm and 29.66%compared with Corder algorithm.In terms of computational complexity,the BAR algorithm has a maximum reduction of 32.56%compared with DBR algorithm and53.05%compared with Corder algorithm. 展开更多
关键词 graph processing vertex reordering branch-alternation-resorting algorithm(BAR) reconfigurable array processor
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Mutual information assessment of LOS MIMO systems with reconfigurable antenna arrays 被引量:1
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作者 GAO Jun-jun ZHANG Jian-hua TAO Xiao-feng 《The Journal of China Universities of Posts and Telecommunications》 EI CSCD 2013年第5期51-56,70,共7页
In presence of line-of-sight (LOS) propagation, multiple-input multiple-output (MIMO) systems can achieve maximum capacity over the whole signal-to-noise ratio (SNR) region by deploying reconfigurable antenna ar... In presence of line-of-sight (LOS) propagation, multiple-input multiple-output (MIMO) systems can achieve maximum capacity over the whole signal-to-noise ratio (SNR) region by deploying reconfigurable antenna arrays. In this paper, the moment generating function (MGF) formulas of the mutual information (MI) is obtained for LOS MIMO systems with reconfigurable arrays. Then the exact expression of the mean MI is derived in an easily evaluated form. The results show an excellent match between the theoretical curves and the Monte-Carlo simulations. 展开更多
关键词 multiple-input multiple-output LINE-OF-SIGHT mutual information reconfigurable antenna array Wishart
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Gain-enhanced reconfigurable radiation array with mechanically driven system and directive elements
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作者 Abubakar M.SADIQ Yuanqing GU +2 位作者 Yu LUO Yan CHEN Kaixue MA 《Frontiers of Mechanical Engineering》 SCIE CSCD 2022年第4期111-127,共17页
In the artificial intelligence-driven modern wireless communication system,antennas are required to be reconfigurable in terms of size according to changing application scenarios.However,conventional antennas with con... In the artificial intelligence-driven modern wireless communication system,antennas are required to be reconfigurable in terms of size according to changing application scenarios.However,conventional antennas with constant phase distributions cannot achieve enhanced gains in different reconfigurable sizes.In this paper,we propose a mechanically reconfigurable radiation array(RRA)based on miniaturized elements and a mechanically reconfigurable system to obtain gain-enhanced antennas in compact and deployed states.A five-element RRA with a phase-reconfigurable center element is designed and analyzed theoretically.The experimental sample has been fabricated,driven by a deployable frame with only one degree of freedom to realize the size and phase distribution reconfiguration simultaneously to validate the enhanced gains of RRA.The proposed RRA can be tessellated into larger arrays to achieve higher gains in other frequency regimes,such as terahertz or photonics applications with nanometer fabrication technology. 展开更多
关键词 mechanism reconfigurable radiation array(RRA) compact state deployed state enhanced gain
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AVAILABILITY MODEL FOR SELF TEST AND REPAIR IN FAULT TOLERANT FPGA-BASED SYSTEMS
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作者 Shampa Chakraverty Anubhav Agarwal +1 位作者 Broteen Kundu Anil Kumar 《Journal of Electronics(China)》 2014年第4期271-283,共13页
Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or ... Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or in the configuration memory. The aim of our research is to characterize self-test and repair processes in Fault Tolerant(FT) dr-FPGA systems in the presence of environmental faults and explore their interrelationships. We develop a Continuous Time Markov Chain(CTMC) model that captures the high level fail-repair processes on a dr-FPGA with periodic online Built-In Self-Test(BIST) and scrubbing to detect and repair faults with minimum latency. Simulation results reveal that given an average fault interval of 36 s, an optimum self-test interval of 48.3 s drives the system to spend 13% of its time in self-tests, remain in safe working states for 76% of its time and face risky fault-prone states for only 7% of its time. Further, we demonstrate that a well-tuned repair strategy boosts overall system availability, minimizes the occurrence of unsafe states, and accommodates a larger range of fault rates within which the system availability remains stable within 10% of its maximum level. 展开更多
关键词 Dynamically reconfigurable Field Programmable Gate array (dr-FPGA) Built-In Self-Test (BIST) Fault Tolerance (FT) Single Event Effects (SEEs) Continuous Time Markov Chain (CTMC) ScrubbingCLC number:TN47
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Efficient Scheduling Mapping Algorithm for Row Parallel Coarse-Grained Reconfigurable Architecture 被引量:6
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作者 Naijin Chen Zhen Wang +3 位作者 Ruixiang He Jianhui Jiang Fei Cheng Chenghao Han 《Tsinghua Science and Technology》 SCIE EI CAS CSCD 2021年第5期724-735,共12页
Row Parallel Coarse-Grained Reconfigurable Architecture(RPCGRA)has the advantages of maximum parallelism and programmable flexibility.Designing an efficient algorithm to map the diverse applications onto RPCGRA is dif... Row Parallel Coarse-Grained Reconfigurable Architecture(RPCGRA)has the advantages of maximum parallelism and programmable flexibility.Designing an efficient algorithm to map the diverse applications onto RPCGRA is difficult due to a number of RPCGRA hardware constraints.To solve this problem,the nodes of the data flow graph must be partitioned and scheduled onto the RPCGRA.In this paper,we present a Depth-First Greedy Mapping(DFGM)algorithm that simultaneously considers the communication costs and the use times of the Reconfigurable Cell Array(RCA).Compared with level breadth mapping,the performance of DFGM is better.The percentage of maximum improvement in the use times of RCA is 33%and the percentage of maximum improvement in non-original input and output times is 64.4%(Given Discrete Cosine Transfor 8(DCT8),and the area of reconfigurable processing unit is 56).Compared with level-based depth mapping,DFGM also obtains the lowest averages of use times of RCA,non-original input and output times,and the reconfigurable time. 展开更多
关键词 temporal mapping reconfigurable Cell array(RCA) listed scheduling communication costs
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Optimal PV array reconfiguration under partial shading condition through dynamic leader based collective intelligence 被引量:3
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作者 Yutong Wang Bo Yang 《Protection and Control of Modern Power Systems》 SCIE EI 2023年第3期47-62,共16页
This paper applies the innovative idea of DLCI to PV array reconfiguration under various PSCs to capture the maxi-mum output power of a PV generation system.DLCI is a hybrid algorithm that integrates multiple meta-heu... This paper applies the innovative idea of DLCI to PV array reconfiguration under various PSCs to capture the maxi-mum output power of a PV generation system.DLCI is a hybrid algorithm that integrates multiple meta-heuristic algo-rithms.Through the competition and cooperation of the search mechanisms of different metaheuristic algorithms,the local exploration and global development of the algorithm can be effectively improved to avoid power mismatch of the PV system caused by the algorithm falling into a local optimum.A series of discrete operations are performed on DLCI to solve the discrete optimization problem of PV array reconfiguration.Two structures(DLCI-I and DLCI-II)are designed to verify the effect of increasing the number of sub-optimizers on the optimized performance of DLCI by simulation based on 10 cases of PSCs.The simulation shows that the increase of the number of sub-optimizers only gives a relatively small improvement on the DLCI optimization performance.DLCI has a significant effect on the reduction in the number of power peaks caused by PSC.The PV array-based reconstruction system of DLCI-II is reduced by 4.05%,1.88%,1.68%,0.99%and 3.39%,when compared to the secondary optimization algorithms. 展开更多
关键词 PV array reconfiguration Partial shading condition Dynamic leader based collective intelligence Maximum power extraction Total-cross-tied
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Performance Evaluation of a Four-Element Antenna Array with Selection Circuits for Adaptive MIMO Systems
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作者 李正夷 王煊 +1 位作者 杜正伟 龚克 《Tsinghua Science and Technology》 SCIE EI CAS 2010年第3期294-298,共5页
Reconfigurable antenna arrays increase the flexibility of adaptive MIMO systems. At present, most designs have adopted antenna arrays with reconfigurable elements. However, antenna selection is also an effective metho... Reconfigurable antenna arrays increase the flexibility of adaptive MIMO systems. At present, most designs have adopted antenna arrays with reconfigurable elements. However, antenna selection is also an effective method, which has not been fully investigated. In this paper, the potential benefits of a four-element antenna array with selection circuits in the UMTS band (1920-2170 MHz) are explored. The array has eight pin-diodes embedded in the feeding network to select any sub-set of elements. For evaluation, an adaptive MIMO system was set up and a measurement campaign was taken in an indoor multi-path environment. The measurements were performed over a 300 MHz bandwidth centered at 2.05 GHz, covering the UMTS band. The results show that different channel conditions prefer different antenna array configurations. Therefore, in varying channel conditions the antenna array can support antenna selection algorithms to select the best sub-set of elements to increase channel capacity. 展开更多
关键词 adaptive MIMO systems antenna selection pin-diode reconfigurable antenna array
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Maximum Power Enhancement Under Partial Shadings Using a Modified Sudoku Reconfiguration 被引量:3
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作者 Kandipati Rajani Tejavathu Ramesh 《CSEE Journal of Power and Energy Systems》 SCIE CSCD 2021年第6期1187-1201,共15页
Partial shading is one of the important factors in reducing maximum power generation from PV(Photovoltaic)arrays.Maximum power generation can be improved by selecting a PV array through a Total-Cross-Tied(T-C-T)connec... Partial shading is one of the important factors in reducing maximum power generation from PV(Photovoltaic)arrays.Maximum power generation can be improved by selecting a PV array through a Total-Cross-Tied(T-C-T)connection.However,maximum power generated from T-C-T can still be improved by distribution of shading over various rows.Due to distribution of shading,the current entering the node increases and results in improved maximum power generation.This can be done effectively by using Sudoku reconfiguration techniques.These techniques are economical,since they don’t require any sensors and switching networks.This technique only changes the physical location of the PV panel but the electrical connection between the panels remains the same.This paper proposes a Modified Sudoku reconfiguration pattern which enhances the maximum power from the T-C-T connected PV array.Furthermore,the theoretical calculation of row current and power output have been done for existing and proposed topologies under various shading patterns.The performance of the proposed pattern has been analyzed and compared using specifications,such as Global Maximum Power(GMP),Fill Factor(FF),mismatch losses,and efficiency.From the results,it can be concluded that the Modified Sudoku reconfiguration enhances the GMP under all shading conditions. 展开更多
关键词 Efficiency fill factor global maximum power point mismatch losses partial shadings PV array reconfiguration shading patterns sudoku and total-cross-tied
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