Two types of RF LDMOS devices, specified for application in the driver stage and output stage of a power amplifier, are designed based on a modified CMOS process. By optimizing the layout and process, the output capac...Two types of RF LDMOS devices, specified for application in the driver stage and output stage of a power amplifier, are designed based on a modified CMOS process. By optimizing the layout and process, the output capacitance per unit of gate width is as low as 225 fF/mm. The driver stage and output stage devices achieve an output power of 44 W with a PAE of 82% and 230 W with a PAE of 72.3%, respectively （P3aB compression） at 1 GHz. Both devices are capable of withstanding extremely severe ruggedness tests without any performance degradation. These tests are 3-5 dB overdrive, 10：1 voltage standing wave ratio mismatch load through all phase angles, and 40% drain overvoltage elevation at a working point of P3aB.展开更多
A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance. The output characterist...A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance. The output characteristics become better as the drain-substrate parasitic capacitance decreases. Results show that the drain-substrate capacitance of the n- buried-pSOI sandwiched LDMOS is 46.6% less than that of the normal LDMOS,and 11.5% less than that of the n-buried- pSOI LDMOS,respectively. At l dB compression point,its output power is 188% higher than that of the normal LDMOS, and 10.6% higher than that of the n-buried-pSOI LDMOS, respectively. The power-added efficiency of the proposed structure is 38.3%. The breakdown voltage of the proposed structure is 11% more than that of the normal LDMOS.展开更多
An analytical model of an LDMOSFET with a shield ring is established according to the 2D Poisson equation. Surface electrical field distribution along the drift region is obtained from this model and the influence of ...An analytical model of an LDMOSFET with a shield ring is established according to the 2D Poisson equation. Surface electrical field distribution along the drift region is obtained from this model and the influence of shield length and oxide thickness on the electrical field distribution is studied. The robustness of this model is verified using ISE TCAD simulation tools. The breakdown voltage of a specific device is also calculated and the result is in good agreement with experimental data.展开更多
In this work, a new RF power trench-gate multi-channel laterally-diffused MOSFET （TGMC-LDMOS） on InGaAs is proposed. The gate-electrodes of the new structure are placed vertically in the trenches built in the drift ...In this work, a new RF power trench-gate multi-channel laterally-diffused MOSFET （TGMC-LDMOS） on InGaAs is proposed. The gate-electrodes of the new structure are placed vertically in the trenches built in the drift layer. Each gate results in the formation of two channels in the p-body region of the device. The drain metal is also placed in a trench to take contact from the n^＋-InGaAs region located over the substrate. In a cell length of 5μm, the TGMC-LDMOS structure has seven channels, which conduct simultaneously to carry drain current in parallel. The formation of multi-channels in the proposed device increases the drive current （ID） leading to a large reduction in the specific on-resistance （Ron-sp）. Due to better control of gates on the drain current, the new structure exhibits substantially higher transconductance （gm） resulting in significant improvement in cut-off frequency （fz） and oscillation frequency （fmax）. Using two-dimensional numerical simulations, a 55 V TGMC- LDMOS is demonstrated to achieve 7 times higher Io, 6.2 times lower Ron-sp, 6.3 times higher peak gm, 2.6 times higher fT, and 2.5 times increase in fmax in comparison to a conventional device for the identical cell length.展开更多
文摘Two types of RF LDMOS devices, specified for application in the driver stage and output stage of a power amplifier, are designed based on a modified CMOS process. By optimizing the layout and process, the output capacitance per unit of gate width is as low as 225 fF/mm. The driver stage and output stage devices achieve an output power of 44 W with a PAE of 82% and 230 W with a PAE of 72.3%, respectively （P3aB compression） at 1 GHz. Both devices are capable of withstanding extremely severe ruggedness tests without any performance degradation. These tests are 3-5 dB overdrive, 10：1 voltage standing wave ratio mismatch load through all phase angles, and 40% drain overvoltage elevation at a working point of P3aB.
文摘A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance. The output characteristics become better as the drain-substrate parasitic capacitance decreases. Results show that the drain-substrate capacitance of the n- buried-pSOI sandwiched LDMOS is 46.6% less than that of the normal LDMOS,and 11.5% less than that of the n-buried- pSOI LDMOS,respectively. At l dB compression point,its output power is 188% higher than that of the normal LDMOS, and 10.6% higher than that of the n-buried-pSOI LDMOS, respectively. The power-added efficiency of the proposed structure is 38.3%. The breakdown voltage of the proposed structure is 11% more than that of the normal LDMOS.
文摘An analytical model of an LDMOSFET with a shield ring is established according to the 2D Poisson equation. Surface electrical field distribution along the drift region is obtained from this model and the influence of shield length and oxide thickness on the electrical field distribution is studied. The robustness of this model is verified using ISE TCAD simulation tools. The breakdown voltage of a specific device is also calculated and the result is in good agreement with experimental data.
文摘In this work, a new RF power trench-gate multi-channel laterally-diffused MOSFET （TGMC-LDMOS） on InGaAs is proposed. The gate-electrodes of the new structure are placed vertically in the trenches built in the drift layer. Each gate results in the formation of two channels in the p-body region of the device. The drain metal is also placed in a trench to take contact from the n^＋-InGaAs region located over the substrate. In a cell length of 5μm, the TGMC-LDMOS structure has seven channels, which conduct simultaneously to carry drain current in parallel. The formation of multi-channels in the proposed device increases the drive current （ID） leading to a large reduction in the specific on-resistance （Ron-sp）. Due to better control of gates on the drain current, the new structure exhibits substantially higher transconductance （gm） resulting in significant improvement in cut-off frequency （fz） and oscillation frequency （fmax）. Using two-dimensional numerical simulations, a 55 V TGMC- LDMOS is demonstrated to achieve 7 times higher Io, 6.2 times lower Ron-sp, 6.3 times higher peak gm, 2.6 times higher fT, and 2.5 times increase in fmax in comparison to a conventional device for the identical cell length.
