This paper addresses the problems faced in programmable logic controller(PLC)teaching in vocational colleges and proposes countermeasures to overcome these challenges.The study emphasizes the need for a deeper underst...This paper addresses the problems faced in programmable logic controller(PLC)teaching in vocational colleges and proposes countermeasures to overcome these challenges.The study emphasizes the need for a deeper understanding of fundamental concepts and the integration of practical application in PLC education.It suggests involving students in teacher-led projects to enhance their programming skills and problem-solving skills.Additionally,the paper highlights the importance of interactive learning and collaborative discussions to foster student engagement.Furthermore,it emphasizes the cultivation of innovation consciousness through participation in innovation competitions and projects.The implementation of these strategies has shown positive results in improving learning outcomes and preparing students for careers in automation and control.This research contributes to the development of effective teaching approaches in PLC education in vocational colleges.展开更多
We find extremely large low-magnetic-field magnetoresistance （~350% at 0.2 T and ~180% at 0.1 T） in germa- nium at room temperature and the magnetoresistanee is highly sensitive to the surface roughness. This unique...We find extremely large low-magnetic-field magnetoresistance （~350% at 0.2 T and ~180% at 0.1 T） in germa- nium at room temperature and the magnetoresistanee is highly sensitive to the surface roughness. This unique magnetoelectric property is applied to fabricate logic architecture which could perform basic Boolean logic in- cluding AND, OR, NOR and NAND. Our logic device may pave the way for a high performance microprocessor and may make the germanium family more advanced.展开更多
Programmable Logic Array (PLA) is an important building circuit of VLSI chips and some of the FPGA architectures have evolved from the basic PLA architectures. In this letter, a dynamic and static mixed PLA with singl...Programmable Logic Array (PLA) is an important building circuit of VLSI chips and some of the FPGA architectures have evolved from the basic PLA architectures. In this letter, a dynamic and static mixed PLA with single-phased clock is presented. Combining both dynamic and static design style rather than introducing additional interface-buffers overcomes the racing problem, thereby saves the chip area. Besides inheriting the advantages of dynamic circuit-low power dissipation and compact structure, this approach also provides high-speed operation.展开更多
Cyberattacks targeting industrial control systems(ICS)are becoming more sophisticated and advanced than in the past.A programmable logic controller(PLC),a core component of ICS,controls and monitors sensors and actuat...Cyberattacks targeting industrial control systems(ICS)are becoming more sophisticated and advanced than in the past.A programmable logic controller(PLC),a core component of ICS,controls and monitors sensors and actuators in the field.However,PLC has memory attack threats such as program injection and manipulation,which has long been a major target for attackers,and it is important to detect these attacks for ICS security.To detect PLC memory attacks,a security system is required to acquire and monitor PLC memory directly.In addition,the performance impact of the security system on the PLC makes it difficult to apply to the ICS.To address these challenges,this paper proposes a system to detect PLC memory attacks by continuously acquiring and monitoring PLC memory.The proposed system detects PLC memory attacks by acquiring the program blocks and block information directly from the same layer as the PLC and then comparing them in bytes with previous data.Experiments with Siemens S7-300 and S7-400 PLC were conducted to evaluate the PLC memory detection performance and performance impact on PLC.The experimental results demonstrate that the proposed system detects all malicious organization block(OB)injection and data block(DB)manipulation,and the increment of PLC cycle time,the impact on PLC performance,was less than 1 ms.The proposed system detects PLC memory attacks with a simpler detection method than earlier studies.Furthermore,the proposed system can be applied to ICS with a small performance impact on PLC.展开更多
Despite more than 40 years of development,it remains difficult for optical logic computing to support more than four operands because the high parallelism of light has not been fully exploited in current methods that ...Despite more than 40 years of development,it remains difficult for optical logic computing to support more than four operands because the high parallelism of light has not been fully exploited in current methods that are restrained by inefficient optical nonlinearity and redundant input modulation.In this paper,we propose a large-scale optical programmable logic array(PLA)based on parallel spectrum modulation.By fully exploiting the wavelength resource,an eight-input PLA is experimentally demonstrated with 256 wavelength channels.And it is extended to nine-input PLA through the combination of wavelength’s and spatial dimensions.Based on PLA,many advanced logic functions like 8-256 decoder,4-bit comparator,adder and multiplier,and state machines are first realized in optics.We implement the two-dimensional optical cellular automaton(CA)for what we believe is the first time and run Conway’s Game of Life to simulate the complex evolutionary processes(pulsar explosion,glider gun,and breeder).Other CA models,such as the replicator-like evolution and the nonisotropic evolution to generate the Sierpinski triangle are also demonstrated.Our work significantly alleviates the challenge of scalability in optical logic devices and provides a universal optical computing platform for two-dimensional CA.展开更多
This paper proposes a kind of programmable logic element(PLE)based on Sense-Switch pFLASH technology.By programming Sense-Switch pFLASH,all three-bit look-up table(LUT3)functions,partial four-bit look-up table(LUT4)fu...This paper proposes a kind of programmable logic element(PLE)based on Sense-Switch pFLASH technology.By programming Sense-Switch pFLASH,all three-bit look-up table(LUT3)functions,partial four-bit look-up table(LUT4)functions,latch functions,and d flip flop(DFF)with enable and reset functions can be realized.Because PLE uses a choice of operational logic(COOL)approach for the operation of logic functions,it allows any logic circuit to be implemented at any ratio of combinatorial logic to register.This intrinsic property makes it close to the basic application specific integrated circuit(ASIC)cell in terms of fine granularity,thus allowing ASIC-like cell-based mappers to apply all their optimization potential.By measuring Sense-Switch pFLASH and PLE circuits,the results show that the“on”state driving current of the Sense-Switch pFLASH is about 245.52μA,and that the“off”state leakage current is about 0.1 pA.The programmable function of PLE works normally.The delay of the typical combinatorial logic operation AND3 is 0.69 ns,and the delay of the sequential logic operation DFF is 0.65 ns,both of which meet the requirements of the design technical index.展开更多
Industrial control systems （ICSs） are widely used in critical infrastructures, making them popular targets for attacks to cause catastrophic physical damage. As one of the most critical components in ICSs, the progr...Industrial control systems （ICSs） are widely used in critical infrastructures, making them popular targets for attacks to cause catastrophic physical damage. As one of the most critical components in ICSs, the programmable logic controller （PLC） controls the actuators directly. A PLC executing a malicious program can cause significant property loss or even casualties. The number of attacks targeted at PLCs has increased noticeably over the last few years, exposing the vulnerability of the PLC and the importance of PLC protection. Unfortunately, PLCs cannot be protected by traditional intrusion detection systems or antivirus software. Thus, an effective method for PLC protection is yet to be designed. Motivated by these concerns, we propose a non-invasive power- based anomaly detection scheme for PLCs. The basic idea is to detect malicious software execution in a PLC through analyzing its power consumption, which is measured by inserting a shunt resistor in series with the CPU in a PLC while it is executing instructions. To analyze the power measurements, we extract a discriminative feature set from the power trace, and then train a long short-term memory （LSTM） neural network with the features of normal samples to predict the next time step of a normal sample. Finally, an abnormal sample is identified through comparing the predicted sample and the actual sample. The advantages of our method are that it requires no software modification on the original system and is able to detect unknown attacks effectively. The method is evaluated on a lab testbed, and for a trojan attack whose difference from the normal program is around 0.63%, the detection accuracy reaches 99.83%.展开更多
Programmable logic controllers(PLCs)play a critical role in many industrial control systems,yet face increasingly serious cyber threats.In this paper,we propose a novel PLC-compatible software-based defense mechanism,...Programmable logic controllers(PLCs)play a critical role in many industrial control systems,yet face increasingly serious cyber threats.In this paper,we propose a novel PLC-compatible software-based defense mechanism,called Heterogeneous Redundant Proactive Defense Framework(HRPDF).We propose a heterogeneous PLC architecture in HRPDF,including multiple heterogeneous,equivalent,and synchronous runtimes,which can thwart multiple types of attacks against PLC without the need of external devices.To ensure the availability of PLC,we also design an inter-process communication algorithm that minimizes the overhead of HRPDF.We implement a prototype system of HRPDF and test it in a real-world PLC and an OpenPLC-based device,respectively.The results show that HRPDF can defend against multiple types of attacks with 10.22%additional CPU and 5.56%additional memory overhead,and about 0.6 ms additional time overhead.展开更多
This paper introduces the Integrated Security Embedded Resilience Architecture (ISERA) as an advanced resilience mechanism for Industrial Control Systems (ICS) and Operational Technology (OT) environments. The ISERA f...This paper introduces the Integrated Security Embedded Resilience Architecture (ISERA) as an advanced resilience mechanism for Industrial Control Systems (ICS) and Operational Technology (OT) environments. The ISERA framework integrates security by design principles, micro-segmentation, and Island Mode Operation (IMO) to enhance cyber resilience and ensure continuous, secure operations. The methodology deploys a Forward-Thinking Architecture Strategy (FTAS) algorithm, which utilises an industrial Intrusion Detection System (IDS) implemented with Python’s Network Intrusion Detection System (NIDS) library. The FTAS algorithm successfully identified and responded to cyber-attacks, ensuring minimal system disruption. ISERA has been validated through comprehensive testing scenarios simulating Denial of Service (DoS) attacks and malware intrusions, at both the IT and OT layers where it successfully mitigates the impact of malicious activity. Results demonstrate ISERA’s efficacy in real-time threat detection, containment, and incident response, thus ensuring the integrity and reliability of critical infrastructure systems. ISERA’s decentralised approach contributes to global net zero goals by optimising resource use and minimising environmental impact. By adopting a decentralised control architecture and leveraging virtualisation, ISERA significantly enhances the cyber resilience and sustainability of critical infrastructure systems. This approach not only strengthens defences against evolving cyber threats but also optimises resource allocation, reducing the system’s carbon footprint. As a result, ISERA ensures the uninterrupted operation of essential services while contributing to broader net zero goals.展开更多
High performance computer is often required by model predictive control(MPC) systems due to the heavy online computation burden.To extend MPC to more application cases with low-cost computation facilities, the impleme...High performance computer is often required by model predictive control(MPC) systems due to the heavy online computation burden.To extend MPC to more application cases with low-cost computation facilities, the implementation of MPC controller on field programmable gate array(FPGA) system is studied.For the dynamic matrix control(DMC) algorithm,the main design idea and the implemental strategy of DMC controller are introduced based on a FPGA’s embedded system.The performance tests show that both the computation efficiency and the accuracy of the proposed controller can be satisfied due to the parallel computing capability of FPGA.展开更多
A digital data-acquisition system based on XIA LLC products was used in a complex nuclear reaction experiment using radioactive ion beams.A flexible trigger system based on a field-programmable gate array(FPGA)paramet...A digital data-acquisition system based on XIA LLC products was used in a complex nuclear reaction experiment using radioactive ion beams.A flexible trigger system based on a field-programmable gate array(FPGA)parametrization was developed to adapt to different experimental sizes.A user-friendly interface was implemented,which allows converting script language expressions into FPGA internal control parameters.The proposed digital system can be combined with a conventional analog data acquisition system to provide more flexibility.The performance of the combined system was veri-fied using experimental data.展开更多
A novel Fudan programmable logic chip （FDP） was designed and implemented with a SMIC 0. 18μm CMOS logic process. The new 3-LUT based logic cell circuit increases logic density about 11% compared with a traditional ...A novel Fudan programmable logic chip （FDP） was designed and implemented with a SMIC 0. 18μm CMOS logic process. The new 3-LUT based logic cell circuit increases logic density about 11% compared with a traditional 4-input LUT. The unique hierarchy routing fabrics and effective switch box optimize the routing wire segments and make it possible for different lengths to connect directly. The FDP contains 1,600 programmable logic cells, 160 programmable I/O, and 16kbit dual port block RAM. Its die size is 6. 104mm× 6. 620mm, with the package of QFP208. The hardware and software cooperation tests indicate that FDP chip works correctly and efficiently.展开更多
Taking the advantage of ultrafast optical linear and nonlinear effects, all-optical signal processing(AOSP) enables manipulation, regeneration, and computing of information directly in optical domain without resorting...Taking the advantage of ultrafast optical linear and nonlinear effects, all-optical signal processing(AOSP) enables manipulation, regeneration, and computing of information directly in optical domain without resorting to electronics. As a promising photonic integration platform, silicon-on-insulator(SOI) has the advantage of complementary metal oxide semiconductor(CMOS) compatibility, low-loss, compact size as well as large optical nonlinearities. In this paper, we review the recent progress in the project granted to develop silicon-based reconfigurable AOSP chips, which aims to combine the merits of AOSP and silicon photonics to solve the unsustainable cost and energy challenges in future communication and big data applications. Three key challenges are identified in this project:(1) how to finely manipulate and reconfigure optical fields,(2) how to achieve ultra-low loss integrated silicon waveguides and significant enhancement of nonlinear effects,(3) how to mitigate crosstalk between optical, electrical and thermal components. By focusing on these key issues, the following major achievements are realized during the project. First, ultra-low loss silicon-based waveguides as well as ultra-high quality microresonators are developed by advancing key fabrication technologies as well as device structures. Integrated photonic filters with bandwidth and free spectral range reconfigurable in a wide range were realized to finely manipulate and select input light fields with a high degree of freedom. Second, several mechanisms and new designs that aim at nonlinear enhancement have been proposed, including optical ridge waveguides with reverse biased PIN junction, slot waveguides,multimode waveguides and parity-time symmetry coupled microresonators. Advanced AOSP operations are verified with these novel designs. Logical computations at 100 Gbit/s were demonstrated with self-developed, monolithic integrated programmable optical logic array. High-dimensional multi-value logic operations based on the four-wave mixing effect are realized. Multi-channel all-optical amplitude and phase regeneration technology is developed, and a multi-channel, multiformat, reconfigurable all-optical regeneration chip is realized. Expanding regeneration capacity via spatial dimension is also verified. Third, the crosstalk from optical as well as thermal coupling due to high-density integration are mitigated by developing novel optical designs and advanced packaging technologies, enabling high-density, small size, multi-channel and multi-functional operation with low power consumption. Finally, four programmable AOSP chips are developed, i.e.,programmable photonic filter chip, programmable photonic logic operation chip, multi-dimensional all-optical regeneration chip, and multi-channel and multi-functional AOSP chip with packaging. The major achievements developed in this project pave the way toward ultra-low loss, high-speed, high-efficient, high-density information processing in future classical and non-classical communication and computing applications.展开更多
For electronic piezo gauge used for testing gun chamber pressure, its internal miniature pulse-powered photoelectric invert switch cannot often be powered up normally. To solve this problem, a test system for invert s...For electronic piezo gauge used for testing gun chamber pressure, its internal miniature pulse-powered photoelectric invert switch cannot often be powered up normally. To solve this problem, a test system for invert switch is presented to verify the reliability of the invert switch. The test system uses complex programmable logic device （CPLD） to control data acquisition of A/D converter and data storage of external flash memory, and then transmits the acquired data to a computer for data analysis and processing. The test system can provide the required sampling frequency of the signal in high temperature, normal temperature and low temperature environments, and the reliability of the invert switch can be verified according to the signal parameters. The results show that the test system has high precision and the tested invert switch has low power consumption and high reliability.展开更多
The control method of rubber tyre gantry （RTG） spreader in Qingdao Port Container Terminal is logic board control,which has many shortcomings such as expensive spare parts and high faults.This paper designs a new co...The control method of rubber tyre gantry （RTG） spreader in Qingdao Port Container Terminal is logic board control,which has many shortcomings such as expensive spare parts and high faults.This paper designs a new control system using programmable logic controller （PLC） centralized control to replace the original logic board control.The new system mainly contains complete ELME spreader control scheme design,hardware selection and PLC control program development.Its field application shows that the system has characteristics of high efficiency,low running cost,easy maintenance.展开更多
Servo pressure pulse testing equipment uses servo-hydraulic technology to build the model of hydraulic system. By improving measurement and control system, the equipment accomplishes signal acquisition, data processin...Servo pressure pulse testing equipment uses servo-hydraulic technology to build the model of hydraulic system. By improving measurement and control system, the equipment accomplishes signal acquisition, data processing and process con- trol. LabVIEW and programmable logic controller （PLC） are used to carry out the hardware configuration and software de- velopment. The system can communicate between LabVIEW and PLC by virtual instrumentation software architecture （VI- SA） and run automatically in accordance with setting commands. Therefore, accuracy and performance of the equipment are improved.展开更多
Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid developme...Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid development of semiconductor technology, the performance and system integration of FPGA devices have been significantly progressed, and at the same time new challenges arise. The design of FPGA architecture is required to evolve to meet these challenges, while also taking advantage of ever increased microchip density. This survey reviews the recent development of advanced FPGA architectures, including improvement of the programming technologies, logic blocks, interconnects, and embedded resources. Moreover, some important emerging design issues of FPGA architectures, such as novel memory based FPGAs and 3D FPGAs, are also presented to provide an outlook for future FPGA development.展开更多
In the field of industrial process control,a fast-development platform for programmable logic controller(PLC)systems is designed in order to solve two main problems of rapid development of PLC control system and progr...In the field of industrial process control,a fast-development platform for programmable logic controller(PLC)systems is designed in order to solve two main problems of rapid development of PLC control system and programmability of controlling software.In the aspect of design,the platform is composed of hardware controlling and software monitoring and is taking industrial computer as the core.Under the Windows environment,the platform establishes the control instruction set,develops the configuration function and visual programming function of the monitoring software and it integrates PLC controller based on Visual Basic software.In order to achieve the function of data monitoring,it has realized the serial communication between computer and PLC by using RS-485 and RS-232 serial ports line communication.The platform designs the intelligent instruction scheduling strategy by studying the encoding and decoding rules of the communication instruction set.It proposes a method for rapidly developing control programs by adopting the expert control mode,which enables clients to develop and modify programs conveniently by importing instructions in a non-coded manner.After experimental testing,the platform is proved successful achieving both the rapid development of PLC control system and the rapid modification of monitoring software.展开更多
Deep-water jacket skirt pile grouting is a critical step in ocean platform construction. Because of the complexity of the skirt pile structure and grouting pipeline, the calculation of grouting pressure and the contro...Deep-water jacket skirt pile grouting is a critical step in ocean platform construction. Because of the complexity of the skirt pile structure and grouting pipeline, the calculation of grouting pressure and the control of output pressure are involved. Beginning with the jacket skirt pile grouting construction scheme, grouting pressure is estimated on the basis of engineering fluid mechanics theory and variable frequency control technique. Programmable logic controller is the center of grouting pressure control system, which accomplishes the flow control of cement buffer tank, water buffer tank, additive buffer tank, cement metering tank, water metering tank, additive metering tank, mixer and agitator. Based on PROFIBUS-DP network, the output pressure of the slurry pump is controlled by the inverter. This method has been applied successfully in JZ20-2 Nor. high spot jacket platform construction.展开更多
Cyberattacks on the Industrial Control System(ICS)have recently been increasing,made more intelligent by advancing technologies.As such,cybersecurity for such systems is attracting attention.As a core element of contr...Cyberattacks on the Industrial Control System(ICS)have recently been increasing,made more intelligent by advancing technologies.As such,cybersecurity for such systems is attracting attention.As a core element of control devices,the Programmable Logic Controller(PLC)in an ICS carries out on-site control over the ICS.A cyberattack on the PLC will cause damages on the overall ICS,with Stuxnet and Duqu as the most representative cases.Thus,cybersecurity for PLCs is considered essential,and many researchers carry out a variety of analyses on the vulnerabilities of PLCs as part of preemptive efforts against attacks.In this study,a vulnerability analysis was conducted on the XGB PLC.Security vulnerabilities were identified by analyzing the network protocols and memory structure of PLCs and were utilized to launch replay attack,memory modulation attack,and FTP/Web service account theft for the verification of the results.Based on the results,the attacks were proven to be able to cause the PLC to malfunction and disable it,and the identified vulnerabilities were defined.展开更多
基金The Project of China Vocational Education Association(ZJS2022YB024)。
文摘This paper addresses the problems faced in programmable logic controller(PLC)teaching in vocational colleges and proposes countermeasures to overcome these challenges.The study emphasizes the need for a deeper understanding of fundamental concepts and the integration of practical application in PLC education.It suggests involving students in teacher-led projects to enhance their programming skills and problem-solving skills.Additionally,the paper highlights the importance of interactive learning and collaborative discussions to foster student engagement.Furthermore,it emphasizes the cultivation of innovation consciousness through participation in innovation competitions and projects.The implementation of these strategies has shown positive results in improving learning outcomes and preparing students for careers in automation and control.This research contributes to the development of effective teaching approaches in PLC education in vocational colleges.
基金Supported by the National Natural Science Foundation of China under Grant Nos 11174169,11234007 and 51471093
文摘We find extremely large low-magnetic-field magnetoresistance （~350% at 0.2 T and ~180% at 0.1 T） in germa- nium at room temperature and the magnetoresistanee is highly sensitive to the surface roughness. This unique magnetoelectric property is applied to fabricate logic architecture which could perform basic Boolean logic in- cluding AND, OR, NOR and NAND. Our logic device may pave the way for a high performance microprocessor and may make the germanium family more advanced.
基金Supported by the Commission of Science Technology and Industry for National Defense and the National Natural Science Foundation of China (No. 90307011)
文摘Programmable Logic Array (PLA) is an important building circuit of VLSI chips and some of the FPGA architectures have evolved from the basic PLA architectures. In this letter, a dynamic and static mixed PLA with single-phased clock is presented. Combining both dynamic and static design style rather than introducing additional interface-buffers overcomes the racing problem, thereby saves the chip area. Besides inheriting the advantages of dynamic circuit-low power dissipation and compact structure, this approach also provides high-speed operation.
基金supported by the Korea WESTERN POWER(KOWEPO)(2022-Commissioned Research-11,Development of Cyberattack Detection Technology for New and Renewable Energy Control System Using AI(Artificial Intelligence),50%)the Institute of Information&Communications Technology Planning&Evaluation(IITP)grant funded by the Korea government(MSIT)(No.2021-0-01806,Development of Security by Design and Security Management Technology in Smart Factory,40%)the Gachon University Research Fund of 2023(GCU-202110280001,10%).
文摘Cyberattacks targeting industrial control systems(ICS)are becoming more sophisticated and advanced than in the past.A programmable logic controller(PLC),a core component of ICS,controls and monitors sensors and actuators in the field.However,PLC has memory attack threats such as program injection and manipulation,which has long been a major target for attackers,and it is important to detect these attacks for ICS security.To detect PLC memory attacks,a security system is required to acquire and monitor PLC memory directly.In addition,the performance impact of the security system on the PLC makes it difficult to apply to the ICS.To address these challenges,this paper proposes a system to detect PLC memory attacks by continuously acquiring and monitoring PLC memory.The proposed system detects PLC memory attacks by acquiring the program blocks and block information directly from the same layer as the PLC and then comparing them in bytes with previous data.Experiments with Siemens S7-300 and S7-400 PLC were conducted to evaluate the PLC memory detection performance and performance impact on PLC.The experimental results demonstrate that the proposed system detects all malicious organization block(OB)injection and data block(DB)manipulation,and the increment of PLC cycle time,the impact on PLC performance,was less than 1 ms.The proposed system detects PLC memory attacks with a simpler detection method than earlier studies.Furthermore,the proposed system can be applied to ICS with a small performance impact on PLC.
基金supported in part by the National Key Research and Development Program of China(Grant No.2022YFB2804203)the National Natural Science Foundation of China(Grant Nos.62075075,62275088)the Knowledge Innovation Program of Wuhan-Basic Research(Grant No.2023010201010049).
文摘Despite more than 40 years of development,it remains difficult for optical logic computing to support more than four operands because the high parallelism of light has not been fully exploited in current methods that are restrained by inefficient optical nonlinearity and redundant input modulation.In this paper,we propose a large-scale optical programmable logic array(PLA)based on parallel spectrum modulation.By fully exploiting the wavelength resource,an eight-input PLA is experimentally demonstrated with 256 wavelength channels.And it is extended to nine-input PLA through the combination of wavelength’s and spatial dimensions.Based on PLA,many advanced logic functions like 8-256 decoder,4-bit comparator,adder and multiplier,and state machines are first realized in optics.We implement the two-dimensional optical cellular automaton(CA)for what we believe is the first time and run Conway’s Game of Life to simulate the complex evolutionary processes(pulsar explosion,glider gun,and breeder).Other CA models,such as the replicator-like evolution and the nonisotropic evolution to generate the Sierpinski triangle are also demonstrated.Our work significantly alleviates the challenge of scalability in optical logic devices and provides a universal optical computing platform for two-dimensional CA.
基金supported by the National Natural Science Foundation of China(No.62174150)the Natural Science Foundation of Jiangsu Province,China(Nos.BK20211040 and BK20211041)。
文摘This paper proposes a kind of programmable logic element(PLE)based on Sense-Switch pFLASH technology.By programming Sense-Switch pFLASH,all three-bit look-up table(LUT3)functions,partial four-bit look-up table(LUT4)functions,latch functions,and d flip flop(DFF)with enable and reset functions can be realized.Because PLE uses a choice of operational logic(COOL)approach for the operation of logic functions,it allows any logic circuit to be implemented at any ratio of combinatorial logic to register.This intrinsic property makes it close to the basic application specific integrated circuit(ASIC)cell in terms of fine granularity,thus allowing ASIC-like cell-based mappers to apply all their optimization potential.By measuring Sense-Switch pFLASH and PLE circuits,the results show that the“on”state driving current of the Sense-Switch pFLASH is about 245.52μA,and that the“off”state leakage current is about 0.1 pA.The programmable function of PLE works normally.The delay of the typical combinatorial logic operation AND3 is 0.69 ns,and the delay of the sequential logic operation DFF is 0.65 ns,both of which meet the requirements of the design technical index.
基金Project supported by the National Basic Research Program(973)of China(No.2015AA050202)
文摘Industrial control systems （ICSs） are widely used in critical infrastructures, making them popular targets for attacks to cause catastrophic physical damage. As one of the most critical components in ICSs, the programmable logic controller （PLC） controls the actuators directly. A PLC executing a malicious program can cause significant property loss or even casualties. The number of attacks targeted at PLCs has increased noticeably over the last few years, exposing the vulnerability of the PLC and the importance of PLC protection. Unfortunately, PLCs cannot be protected by traditional intrusion detection systems or antivirus software. Thus, an effective method for PLC protection is yet to be designed. Motivated by these concerns, we propose a non-invasive power- based anomaly detection scheme for PLCs. The basic idea is to detect malicious software execution in a PLC through analyzing its power consumption, which is measured by inserting a shunt resistor in series with the CPU in a PLC while it is executing instructions. To analyze the power measurements, we extract a discriminative feature set from the power trace, and then train a long short-term memory （LSTM） neural network with the features of normal samples to predict the next time step of a normal sample. Finally, an abnormal sample is identified through comparing the predicted sample and the actual sample. The advantages of our method are that it requires no software modification on the original system and is able to detect unknown attacks effectively. The method is evaluated on a lab testbed, and for a trojan attack whose difference from the normal program is around 0.63%, the detection accuracy reaches 99.83%.
基金supported by the National Key Research and Development Program of China under Grant No.2020YFB2010900the Fundamental Research Funds for the Central Universities(Zhejiang University NGICS Platform)of China under Grant No.TC190A449.
文摘Programmable logic controllers(PLCs)play a critical role in many industrial control systems,yet face increasingly serious cyber threats.In this paper,we propose a novel PLC-compatible software-based defense mechanism,called Heterogeneous Redundant Proactive Defense Framework(HRPDF).We propose a heterogeneous PLC architecture in HRPDF,including multiple heterogeneous,equivalent,and synchronous runtimes,which can thwart multiple types of attacks against PLC without the need of external devices.To ensure the availability of PLC,we also design an inter-process communication algorithm that minimizes the overhead of HRPDF.We implement a prototype system of HRPDF and test it in a real-world PLC and an OpenPLC-based device,respectively.The results show that HRPDF can defend against multiple types of attacks with 10.22%additional CPU and 5.56%additional memory overhead,and about 0.6 ms additional time overhead.
基金funded by the Office of Gas and Electricity Markets(Ofgem)and supported by De Montfort University(DMU)and Nottingham Trent University(NTU),UK.
文摘This paper introduces the Integrated Security Embedded Resilience Architecture (ISERA) as an advanced resilience mechanism for Industrial Control Systems (ICS) and Operational Technology (OT) environments. The ISERA framework integrates security by design principles, micro-segmentation, and Island Mode Operation (IMO) to enhance cyber resilience and ensure continuous, secure operations. The methodology deploys a Forward-Thinking Architecture Strategy (FTAS) algorithm, which utilises an industrial Intrusion Detection System (IDS) implemented with Python’s Network Intrusion Detection System (NIDS) library. The FTAS algorithm successfully identified and responded to cyber-attacks, ensuring minimal system disruption. ISERA has been validated through comprehensive testing scenarios simulating Denial of Service (DoS) attacks and malware intrusions, at both the IT and OT layers where it successfully mitigates the impact of malicious activity. Results demonstrate ISERA’s efficacy in real-time threat detection, containment, and incident response, thus ensuring the integrity and reliability of critical infrastructure systems. ISERA’s decentralised approach contributes to global net zero goals by optimising resource use and minimising environmental impact. By adopting a decentralised control architecture and leveraging virtualisation, ISERA significantly enhances the cyber resilience and sustainability of critical infrastructure systems. This approach not only strengthens defences against evolving cyber threats but also optimises resource allocation, reducing the system’s carbon footprint. As a result, ISERA ensures the uninterrupted operation of essential services while contributing to broader net zero goals.
基金the National Science Foundation of China(Nos.60934007 and 61074060)the Postdoctoral Science Foundation of China(No.20090460627)+2 种基金the Postdoctoral Scientific Program of Shanghai (No.10R21414600)the Specialized Research Fund for the Doctoral Program of Higher Education (No.20070248004)the China Postdoctoral Science Foundation Special Support(No.201003272)
文摘High performance computer is often required by model predictive control(MPC) systems due to the heavy online computation burden.To extend MPC to more application cases with low-cost computation facilities, the implementation of MPC controller on field programmable gate array(FPGA) system is studied.For the dynamic matrix control(DMC) algorithm,the main design idea and the implemental strategy of DMC controller are introduced based on a FPGA’s embedded system.The performance tests show that both the computation efficiency and the accuracy of the proposed controller can be satisfied due to the parallel computing capability of FPGA.
基金This work was supported by the National Key R&D Program of China(Nos.2023YFA1606403 and 2023YFE0101600)the National Natural Science Foundation of China(Nos.12027809,11961141003,U1967201,11875073 and 11875074).
文摘A digital data-acquisition system based on XIA LLC products was used in a complex nuclear reaction experiment using radioactive ion beams.A flexible trigger system based on a field-programmable gate array(FPGA)parametrization was developed to adapt to different experimental sizes.A user-friendly interface was implemented,which allows converting script language expressions into FPGA internal control parameters.The proposed digital system can be combined with a conventional analog data acquisition system to provide more flexibility.The performance of the combined system was veri-fied using experimental data.
文摘A novel Fudan programmable logic chip （FDP） was designed and implemented with a SMIC 0. 18μm CMOS logic process. The new 3-LUT based logic cell circuit increases logic density about 11% compared with a traditional 4-input LUT. The unique hierarchy routing fabrics and effective switch box optimize the routing wire segments and make it possible for different lengths to connect directly. The FDP contains 1,600 programmable logic cells, 160 programmable I/O, and 16kbit dual port block RAM. Its die size is 6. 104mm× 6. 620mm, with the package of QFP208. The hardware and software cooperation tests indicate that FDP chip works correctly and efficiently.
基金supported by the National Key Research and Development Program of China(No.2019YFB2203100).
文摘Taking the advantage of ultrafast optical linear and nonlinear effects, all-optical signal processing(AOSP) enables manipulation, regeneration, and computing of information directly in optical domain without resorting to electronics. As a promising photonic integration platform, silicon-on-insulator(SOI) has the advantage of complementary metal oxide semiconductor(CMOS) compatibility, low-loss, compact size as well as large optical nonlinearities. In this paper, we review the recent progress in the project granted to develop silicon-based reconfigurable AOSP chips, which aims to combine the merits of AOSP and silicon photonics to solve the unsustainable cost and energy challenges in future communication and big data applications. Three key challenges are identified in this project:(1) how to finely manipulate and reconfigure optical fields,(2) how to achieve ultra-low loss integrated silicon waveguides and significant enhancement of nonlinear effects,(3) how to mitigate crosstalk between optical, electrical and thermal components. By focusing on these key issues, the following major achievements are realized during the project. First, ultra-low loss silicon-based waveguides as well as ultra-high quality microresonators are developed by advancing key fabrication technologies as well as device structures. Integrated photonic filters with bandwidth and free spectral range reconfigurable in a wide range were realized to finely manipulate and select input light fields with a high degree of freedom. Second, several mechanisms and new designs that aim at nonlinear enhancement have been proposed, including optical ridge waveguides with reverse biased PIN junction, slot waveguides,multimode waveguides and parity-time symmetry coupled microresonators. Advanced AOSP operations are verified with these novel designs. Logical computations at 100 Gbit/s were demonstrated with self-developed, monolithic integrated programmable optical logic array. High-dimensional multi-value logic operations based on the four-wave mixing effect are realized. Multi-channel all-optical amplitude and phase regeneration technology is developed, and a multi-channel, multiformat, reconfigurable all-optical regeneration chip is realized. Expanding regeneration capacity via spatial dimension is also verified. Third, the crosstalk from optical as well as thermal coupling due to high-density integration are mitigated by developing novel optical designs and advanced packaging technologies, enabling high-density, small size, multi-channel and multi-functional operation with low power consumption. Finally, four programmable AOSP chips are developed, i.e.,programmable photonic filter chip, programmable photonic logic operation chip, multi-dimensional all-optical regeneration chip, and multi-channel and multi-functional AOSP chip with packaging. The major achievements developed in this project pave the way toward ultra-low loss, high-speed, high-efficient, high-density information processing in future classical and non-classical communication and computing applications.
文摘For electronic piezo gauge used for testing gun chamber pressure, its internal miniature pulse-powered photoelectric invert switch cannot often be powered up normally. To solve this problem, a test system for invert switch is presented to verify the reliability of the invert switch. The test system uses complex programmable logic device （CPLD） to control data acquisition of A/D converter and data storage of external flash memory, and then transmits the acquired data to a computer for data analysis and processing. The test system can provide the required sampling frequency of the signal in high temperature, normal temperature and low temperature environments, and the reliability of the invert switch can be verified according to the signal parameters. The results show that the test system has high precision and the tested invert switch has low power consumption and high reliability.
基金Shandong University of Science and Technology Spring Buds Program(No.2010AZZ170)
文摘The control method of rubber tyre gantry （RTG） spreader in Qingdao Port Container Terminal is logic board control,which has many shortcomings such as expensive spare parts and high faults.This paper designs a new control system using programmable logic controller （PLC） centralized control to replace the original logic board control.The new system mainly contains complete ELME spreader control scheme design,hardware selection and PLC control program development.Its field application shows that the system has characteristics of high efficiency,low running cost,easy maintenance.
基金High Level Talented Person Funded Project of Hebei Province(No.C2013005003)Excellent Experts for Going Abroad Training Program of Hebei Province(No.10215601D)
文摘Servo pressure pulse testing equipment uses servo-hydraulic technology to build the model of hydraulic system. By improving measurement and control system, the equipment accomplishes signal acquisition, data processing and process con- trol. LabVIEW and programmable logic controller （PLC） are used to carry out the hardware configuration and software de- velopment. The system can communicate between LabVIEW and PLC by virtual instrumentation software architecture （VI- SA） and run automatically in accordance with setting commands. Therefore, accuracy and performance of the equipment are improved.
基金Supported by National Natural Science Foundation of China(No.61271149)National High Technology Research and Development Program of China(No.2012AA-012301)National Science and Technology Major Project of China(No.2013ZX03006004)
文摘Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid development of semiconductor technology, the performance and system integration of FPGA devices have been significantly progressed, and at the same time new challenges arise. The design of FPGA architecture is required to evolve to meet these challenges, while also taking advantage of ever increased microchip density. This survey reviews the recent development of advanced FPGA architectures, including improvement of the programming technologies, logic blocks, interconnects, and embedded resources. Moreover, some important emerging design issues of FPGA architectures, such as novel memory based FPGAs and 3D FPGAs, are also presented to provide an outlook for future FPGA development.
基金Supported by the International S&T Cooperation Program of China(No.2014DFR70280)Key Research and Development Project of Shanxi Province(No.201903D321012)+1 种基金Key Research and Development Project of Shanxi Province(No.201903D121023)Patent Promotion and Implementation Funding Research Project of Shanxi Province(No.20210521).
文摘In the field of industrial process control,a fast-development platform for programmable logic controller(PLC)systems is designed in order to solve two main problems of rapid development of PLC control system and programmability of controlling software.In the aspect of design,the platform is composed of hardware controlling and software monitoring and is taking industrial computer as the core.Under the Windows environment,the platform establishes the control instruction set,develops the configuration function and visual programming function of the monitoring software and it integrates PLC controller based on Visual Basic software.In order to achieve the function of data monitoring,it has realized the serial communication between computer and PLC by using RS-485 and RS-232 serial ports line communication.The platform designs the intelligent instruction scheduling strategy by studying the encoding and decoding rules of the communication instruction set.It proposes a method for rapidly developing control programs by adopting the expert control mode,which enables clients to develop and modify programs conveniently by importing instructions in a non-coded manner.After experimental testing,the platform is proved successful achieving both the rapid development of PLC control system and the rapid modification of monitoring software.
基金Supported by Key Research Project of China Offshore Oil Engineering Co,Ltd.
文摘Deep-water jacket skirt pile grouting is a critical step in ocean platform construction. Because of the complexity of the skirt pile structure and grouting pipeline, the calculation of grouting pressure and the control of output pressure are involved. Beginning with the jacket skirt pile grouting construction scheme, grouting pressure is estimated on the basis of engineering fluid mechanics theory and variable frequency control technique. Programmable logic controller is the center of grouting pressure control system, which accomplishes the flow control of cement buffer tank, water buffer tank, additive buffer tank, cement metering tank, water metering tank, additive metering tank, mixer and agitator. Based on PROFIBUS-DP network, the output pressure of the slurry pump is controlled by the inverter. This method has been applied successfully in JZ20-2 Nor. high spot jacket platform construction.
基金This work was supported by the National Research Foundation of Korea(NRF)grant funded by the Korea government(MSIT:Ministry of Science and ICT)(Nos.NRF-2016M2A8A4952280 and NRF-2020R1A2C1012187).
文摘Cyberattacks on the Industrial Control System(ICS)have recently been increasing,made more intelligent by advancing technologies.As such,cybersecurity for such systems is attracting attention.As a core element of control devices,the Programmable Logic Controller(PLC)in an ICS carries out on-site control over the ICS.A cyberattack on the PLC will cause damages on the overall ICS,with Stuxnet and Duqu as the most representative cases.Thus,cybersecurity for PLCs is considered essential,and many researchers carry out a variety of analyses on the vulnerabilities of PLCs as part of preemptive efforts against attacks.In this study,a vulnerability analysis was conducted on the XGB PLC.Security vulnerabilities were identified by analyzing the network protocols and memory structure of PLCs and were utilized to launch replay attack,memory modulation attack,and FTP/Web service account theft for the verification of the results.Based on the results,the attacks were proven to be able to cause the PLC to malfunction and disable it,and the identified vulnerabilities were defined.
