A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance. The output characterist...A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance. The output characteristics become better as the drain-substrate parasitic capacitance decreases. Results show that the drain-substrate capacitance of the n- buried-pSOI sandwiched LDMOS is 46.6% less than that of the normal LDMOS,and 11.5% less than that of the n-buried- pSOI LDMOS,respectively. At l dB compression point,its output power is 188% higher than that of the normal LDMOS, and 10.6% higher than that of the n-buried-pSOI LDMOS, respectively. The power-added efficiency of the proposed structure is 38.3%. The breakdown voltage of the proposed structure is 11% more than that of the normal LDMOS.展开更多
A new partial-SOI （PSOI） high voltage device structure named CNCI PSOI （complementary n＋-charge islands PSOI） is proposed. CNCI PSOI is characterized by equidistant high concentration n＋-regions on the top and b...A new partial-SOI （PSOI） high voltage device structure named CNCI PSOI （complementary n＋-charge islands PSOI） is proposed. CNCI PSOI is characterized by equidistant high concentration n＋-regions on the top and bottom interfaces of a dielectric buried layer of a PSOI device. When a high voltage is applied to the device, complementary holes and electron islands are formed on the two n＋-regions on the top and bottom interfaces, therefore effectively enhancing the electric field of the dielectric buried layer （E1 and increasing the breakdown voltage （BV）, alleviating the self-heating effect （SHE） by the silicon window under the source. An analytical model of the vertical interface electric field for the CNCI PSOI is presented and the analytical results are in good agreement with the 2D simulation results. BV and EI of the CNCI PSOI LDMOS increase to 5 91 V and 512 V/μm from 216 V and 81.4 Vμm of the conventional PSOI with a lower SHE, respectively. The influence of structure parameters on the device characteristics is analyzed for the proposed device in detail.展开更多
文摘A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance. The output characteristics become better as the drain-substrate parasitic capacitance decreases. Results show that the drain-substrate capacitance of the n- buried-pSOI sandwiched LDMOS is 46.6% less than that of the normal LDMOS,and 11.5% less than that of the n-buried- pSOI LDMOS,respectively. At l dB compression point,its output power is 188% higher than that of the normal LDMOS, and 10.6% higher than that of the n-buried-pSOI LDMOS, respectively. The power-added efficiency of the proposed structure is 38.3%. The breakdown voltage of the proposed structure is 11% more than that of the normal LDMOS.
基金Project supported by the National Natural Science Foundation of China(Nos.60806025,60976060)the NKLAIC Project(No.9140 C0903070904)the Youth Teacher Foundation of University of Electronic Science and Technology of China(No.jx0721)
文摘A new partial-SOI （PSOI） high voltage device structure named CNCI PSOI （complementary n＋-charge islands PSOI） is proposed. CNCI PSOI is characterized by equidistant high concentration n＋-regions on the top and bottom interfaces of a dielectric buried layer of a PSOI device. When a high voltage is applied to the device, complementary holes and electron islands are formed on the two n＋-regions on the top and bottom interfaces, therefore effectively enhancing the electric field of the dielectric buried layer （E1 and increasing the breakdown voltage （BV）, alleviating the self-heating effect （SHE） by the silicon window under the source. An analytical model of the vertical interface electric field for the CNCI PSOI is presented and the analytical results are in good agreement with the 2D simulation results. BV and EI of the CNCI PSOI LDMOS increase to 5 91 V and 512 V/μm from 216 V and 81.4 Vμm of the conventional PSOI with a lower SHE, respectively. The influence of structure parameters on the device characteristics is analyzed for the proposed device in detail.
