This paper reviews the following electrical characterization techniques for measuring the microscopic bonding structures, impurities, and electrically active defects in advanced CMOS gate stacks： 1） inelastic electr...This paper reviews the following electrical characterization techniques for measuring the microscopic bonding structures, impurities, and electrically active defects in advanced CMOS gate stacks： 1） inelastic electron tunneling spectroscopy （IETS）, 2） lateral profiling of threshold voltages, interface-trap density, and oxide charge density distributions along the channel of an MOSFET, and 3） pulse agitated substrate hot electron injection （PASHEI） technique for measuring trapping effects in the gate dielectric at low and modest gate voltages.展开更多
基金the Semiconductor Research Corporation and the U.S. National Science Foundation (Grant No. MRSEC DMR 0520495)
文摘This paper reviews the following electrical characterization techniques for measuring the microscopic bonding structures, impurities, and electrically active defects in advanced CMOS gate stacks： 1） inelastic electron tunneling spectroscopy （IETS）, 2） lateral profiling of threshold voltages, interface-trap density, and oxide charge density distributions along the channel of an MOSFET, and 3） pulse agitated substrate hot electron injection （PASHEI） technique for measuring trapping effects in the gate dielectric at low and modest gate voltages.
