Along with NOR flash cell scaling down,dielectric burnout has gradually become one of the most important factors which affects product reliability,especially for high dropout voltage films.In this study,we demonstrate...Along with NOR flash cell scaling down,dielectric burnout has gradually become one of the most important factors which affects product reliability,especially for high dropout voltage films.In this study,we demonstrate a reliability-enhanced NOR flash cell in 50 nm node technology through structural optimization of floating gate(FG)dimensions and active area profile.By synergistically increasing FG thickness,reducing FG width,and tuning cell-open depth,the control gate-to-active area corner distance expands by 22%,suppressing peak electric fields by 29%vertically and 18%horizontally.This structural innovation achieves:(1)100×reduction in early-cycle burnout failures,(2)7.38×time dependent dielectric breakdown lifetime improve-ment,while maintaining data retention and accelerating programming/erasing speeds by 15.4%/7.3%.The enhanced reliability enables 97.5%reduction in Fowler−Nordheim stress time during characterization program testing,providing a cost-effective solution for automotive-grade flash memories.展开更多
为满足医学系统芯片(SOC)的低成本、低功耗、微型化的需求,定制了一款兼容AHB总线接口的NorFlash控制器IP.该设计针对常规Flash控制器功能繁杂,读写数据需长时间等待等缺点,采用了硬件解锁、简化块擦除模块和增加写操作数据寄存器等优...为满足医学系统芯片(SOC)的低成本、低功耗、微型化的需求,定制了一款兼容AHB总线接口的NorFlash控制器IP.该设计针对常规Flash控制器功能繁杂,读写数据需长时间等待等缺点,采用了硬件解锁、简化块擦除模块和增加写操作数据寄存器等优化设计方法.该设计最后进行了FPGA原型验证并进行了流片,验证测试结果表明,该IP功能正确,总线的利用率得到了提高.在系统时钟10MHz下,选用S29L V008J Nor Flash芯片,按连续存储16个32位数据计算,本设计比常规设计减少总线占用时间165μs,设计达到了预期结果.展开更多
针对OCTA NOR Flash的测试占用接口多,传统测试方法耗时较长的问题,提出了一种基于I/O口共用的OCTA NOR Flash高效测试系统及方法,以FPGA作为控制器,将测试指令传输给多颗Flash芯片,FPGA接收Flash芯片传回的数据后经过处理,可显示到相...针对OCTA NOR Flash的测试占用接口多,传统测试方法耗时较长的问题,提出了一种基于I/O口共用的OCTA NOR Flash高效测试系统及方法,以FPGA作为控制器,将测试指令传输给多颗Flash芯片,FPGA接收Flash芯片传回的数据后经过处理,可显示到相应的显示装置上.实际验证了系统的可行性.实际验证的结果表明,在测试过程中,数据传输稳定,无误码.展开更多
基金supported by the Fundamental Research Funds for the Central Universities(Grant No.HUST:5003190012)the Natural Science Foundation of Hubei Province(Grant No.2024AFA043).
文摘Along with NOR flash cell scaling down,dielectric burnout has gradually become one of the most important factors which affects product reliability,especially for high dropout voltage films.In this study,we demonstrate a reliability-enhanced NOR flash cell in 50 nm node technology through structural optimization of floating gate(FG)dimensions and active area profile.By synergistically increasing FG thickness,reducing FG width,and tuning cell-open depth,the control gate-to-active area corner distance expands by 22%,suppressing peak electric fields by 29%vertically and 18%horizontally.This structural innovation achieves:(1)100×reduction in early-cycle burnout failures,(2)7.38×time dependent dielectric breakdown lifetime improve-ment,while maintaining data retention and accelerating programming/erasing speeds by 15.4%/7.3%.The enhanced reliability enables 97.5%reduction in Fowler−Nordheim stress time during characterization program testing,providing a cost-effective solution for automotive-grade flash memories.
文摘为满足医学系统芯片(SOC)的低成本、低功耗、微型化的需求,定制了一款兼容AHB总线接口的NorFlash控制器IP.该设计针对常规Flash控制器功能繁杂,读写数据需长时间等待等缺点,采用了硬件解锁、简化块擦除模块和增加写操作数据寄存器等优化设计方法.该设计最后进行了FPGA原型验证并进行了流片,验证测试结果表明,该IP功能正确,总线的利用率得到了提高.在系统时钟10MHz下,选用S29L V008J Nor Flash芯片,按连续存储16个32位数据计算,本设计比常规设计减少总线占用时间165μs,设计达到了预期结果.
文摘针对OCTA NOR Flash的测试占用接口多,传统测试方法耗时较长的问题,提出了一种基于I/O口共用的OCTA NOR Flash高效测试系统及方法,以FPGA作为控制器,将测试指令传输给多颗Flash芯片,FPGA接收Flash芯片传回的数据后经过处理,可显示到相应的显示装置上.实际验证了系统的可行性.实际验证的结果表明,在测试过程中,数据传输稳定,无误码.
