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SPECTRAL ANALYSIS OF SOME INDEPENDENCES OF MULTIPLE-VALUED LOGICAL FUNCTIONS ON THEIR VARIABLES
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作者 武传坤 《Journal of Electronics(China)》 1993年第3期217-226,共10页
There are many kinds of special relationships between multiple-valued logical func-tions and their variables, and they are difficult to be judged from their expressions. In thispaper, some sufficient and necessary con... There are many kinds of special relationships between multiple-valued logical func-tions and their variables, and they are difficult to be judged from their expressions. In thispaper, some sufficient and necessary conditions of the independence and statistical independenceof multiple-valued logical functions on their variables are given. Some conditions of algebraicindependence of multiple-valued logical functions on some of their variables and the way to de-generate a function to the greatest extent are proposed, and some applications of these resultsare indicated. All the results are studied by using Chrestenson spectral techniques. 展开更多
关键词 multiple-valued logical function Chrestenson SPECTRUM DEGENERATION Correlationimmunity Linear code
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CIRCUIT TESTABLE DESIGN AND UNIVERSAL TEST SETS FOR MULTIPLE-VALUED LOGIC FUNCTIONS
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作者 Pan Zhongliang 《Journal of Electronics(China)》 2007年第1期138-144,共7页
The circuit testable realizations of multiple-valued functions are studied in this letter. First of all,it is shown that one vector detects all skew faults in multiplication modulo circuits or in addi-tion modulo circ... The circuit testable realizations of multiple-valued functions are studied in this letter. First of all,it is shown that one vector detects all skew faults in multiplication modulo circuits or in addi-tion modulo circuits,and n+1 vectors detect all skew faults in the circuit realization of multiple-valued functions with n inputs. Secondly,min(max) bridging fault test sets with n+2 vectors are pre-sented for the circuit realizations of multiple-valued logic functions. Finally,a tree structure is used instead of cascade structure to reduce the delay in the circuit realization,it is shown that three vec-tors are sufficient to detect all single stuck-at faults in the tree structure realization of multiple-valued logic functions. 展开更多
关键词 multiple-valued logic Testable realization Single faults Bridging faults Skew faults.
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Analysis of a Class of Logical Functions over Galois and Z_m Rings 被引量:1
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作者 陈卫红 曾洪杰 《Chinese Quarterly Journal of Mathematics》 CSCD 2002年第4期105-110,共6页
In this paper, the author analyzed some cryptographic properties of a class of logical functions, f(x,y)=(q(x),...,q(x))·y+h(x),over Galois rings and residue rings, presented the relationship between the characte... In this paper, the author analyzed some cryptographic properties of a class of logical functions, f(x,y)=(q(x),...,q(x))·y+h(x),over Galois rings and residue rings, presented the relationship between the character spectrum of f(x,y) and the character speetrum of q(x),h(x) and the relationship between the cryptographic properties of f(x,y) and the cryptographic properties of h(x). 展开更多
关键词 logical function character spectrum cryptographic properties
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FAULT DETECTION FOR MULTIPLE-VALUED LOGIC CIRCUITS WITH FANOUT-FREE 被引量:1
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作者 PanZhongliang 《Journal of Electronics(China)》 2004年第5期376-383,共8页
The single fault and multiple fault detections for multiple-valued logic circuits are studied in this paper. Firstly, it is shown that the cardinality of optimal single fault test set for fanout-free m-valued circuits... The single fault and multiple fault detections for multiple-valued logic circuits are studied in this paper. Firstly, it is shown that the cardinality of optimal single fault test set for fanout-free m-valued circuits with n primary inputs is not more than n + 1, for linear tree circuits is two, and for multiplication modulo circuits is two if n is an odd number or if n is an even number and m > 3, where the optimal test set of a circuit has minimal number of test vectors. Secondly,it is indicated that the cardinality of optimal multiple fault test set for linear tree circuits with n primary inputs is 1 + [n/(m - 1)], for multiplication modulo circuits is n+ 1, for fanout-free circuits that consist of 2-input linear tree circuits and 2-input multiplication modulo circuits is not greater than n+ 1, where [x] denotes the smallest integer greater than or equal to x. Finally,the single fault location approaches of linear tree circuits and multiplication modulo circuits are presented, and all faults in the two types of circuits can be located by using a test set with n + 1 vectors. 展开更多
关键词 multiple-valued logic Digital circuits Fault detection Single fault Multiple faults
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HAAR EXPANSIONS OF A CLASS OF FRACTAL INTERPOLATION FUNCTIONS AND THEIR LOGICAL DERIVATIVES 被引量:1
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作者 Sha Zhen Chen Gang Zhejiang University,China 《Analysis in Theory and Applications》 1993年第4期73-88,共16页
In this paper,we study a special class of fractal interpolation functions,and give their Haar-wavelet expansions.On the basis of the expansions,we investigate the H(o|¨)lder smoothness of such functions and their... In this paper,we study a special class of fractal interpolation functions,and give their Haar-wavelet expansions.On the basis of the expansions,we investigate the H(o|¨)lder smoothness of such functions and their logical derivatives of order α. 展开更多
关键词 HAAR EXPANSIONS OF A CLASS OF FRACTAL INTERPOLATION functionS AND THEIR logical DERIVATIVES der HAAR FIF
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LOGICAL SYNTHESIS OF MOLTIVALUED SYMMETRIC FUNCTION BASED ON BINARY FULL ADDERS
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作者 Chen Xiexiong Shen Jizhong(Hangzhou University, Hangzhou 310028) 《Journal of Electronics(China)》 1996年第4期360-365,共6页
This paper discusses the definition and properties of multivalued symmetric functions, points out that a multivalued symmetric function can be decomposed according to the value of the function j. The subfunction Lj co... This paper discusses the definition and properties of multivalued symmetric functions, points out that a multivalued symmetric function can be decomposed according to the value of the function j. The subfunction Lj corresponding to j must be a symmetric function, and it may be expressed as the sum of products form of degenerated multivalued fundamental symmetric functions. Based on this consideration, the circuit realization for the multivalued symmetric functions based on full adders is proposed. 展开更多
关键词 Multivalued logic SYMMETRIC functionS logic DESIGN
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Spectral Characteristics of the Best Affine Approach of Multi-Output m-Valued Logical Functions
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作者 ZHAO Yaqun YING Dinghai FENG Dengguo 《Wuhan University Journal of Natural Sciences》 CAS 2007年第1期185-188,共4页
This paper discusses the best affine approach (BAA) of multi-output m-valued logical functions. First, it gives the spectra of rate of accordance between multi-output m-valued logical functions and their affine func... This paper discusses the best affine approach (BAA) of multi-output m-valued logical functions. First, it gives the spectra of rate of accordance between multi-output m-valued logical functions and their affine functions, then analyzes the BAA of multi-output m-valued logical functions and finally gives the spectral characteristics of BAA of multi-output m-valued logical functions. 展开更多
关键词 multi-output m-valued logical functions linear spectrum cyclic spectrum BAA(best affine approach)
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Design of AB^2 in Galois Fields Based on Multiple-Valued Logic
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作者 Haixia Wu Long He +2 位作者 Xiaoran Li Yilong Bai Minghao Zhang 《Journal of Beijing Institute of Technology》 EI CAS 2019年第4期764-769,共6页
A new AB^2 operation in Galois Field GF(24)is presented and its systolic realization based on multiple-valued logic(MVL)is proposed.The systolic structure of the operation employs multiple-valued current mode(MVCM)by ... A new AB^2 operation in Galois Field GF(24)is presented and its systolic realization based on multiple-valued logic(MVL)is proposed.The systolic structure of the operation employs multiple-valued current mode(MVCM)by using dynamic source-coupled logic(SCL)to reduce the transistor and wire counts,and the initial delay.The performance is evaluated by HSPICE simulation with 0.18.μm CMOS technology.A comparison is conducted between our proposed implementation and those reported in the literature.The transistor counts,the wire counts and the initial delay in our MVL design show savings of about 23%,45%,and 72%,in comparison with the corresponding binary CMOS implementation.The systolic architecture proposed is simple,regular,and modular,well suited for very large scale integration(VLSI)implementation.The combination of MVCM circuits and relevant algorithms based on MVL seems to be a potential solution for high performance arithmetic operations in GF(2^k). 展开更多
关键词 multiple-valued logic(MVL) AB^2 operation Galois Fields
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Logical Function Decomposition Method for Synthesis of Digital Logical System Implemented with Programmable Logic Devices (PLD)
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作者 Mihai Grigore Timis Alexandru Valachi +1 位作者 Alexandru Barleanu Andrei Stan 《Circuits and Systems》 2013年第7期472-477,共6页
The paper consists in the use of some logical functions decomposition algorithms with application in the implementation of classical circuits like SSI, MSI and PLD. The decomposition methods use the Boolean matrix cal... The paper consists in the use of some logical functions decomposition algorithms with application in the implementation of classical circuits like SSI, MSI and PLD. The decomposition methods use the Boolean matrix calculation. It is calculated the implementation costs emphasizing the most economical solutions. One important aspect of serial decomposition is the task of selecting “best candidate” variables for the G function. Decomposition is essentially a process of substituting two or more input variables with a lesser number of new variables. This substitutes results in the reduction of the number of rows in the truth table. Hence, we look for variables which are most likely to reduce the number of rows in the truth table as a result of decomposition. Let us consider an input variable purposely avoiding all inter-relationships among the input variables. The only available parameter to evaluate its activity is the number of “l”s or “O”s that it has in the truth table. If the variable has only “1” s or “0” s, it is the “best candidate” for decomposition, as it is practically redundant. 展开更多
关键词 Combinational CIRCUITS Static HAZARD logic Design BOOLEAN functions logical DECOMPOSITIONS
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Logical-Structure Modeling for Conceptual Design
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作者 孙正兴 张福炎 《Journal of Southeast University(English Edition)》 EI CAS 2001年第1期59-65,共7页
Based on the definition of a logic structure feature to relate logically functional requirements to geometric representation independent upon detailed geometric representation, this paper presents an idea of logical s... Based on the definition of a logic structure feature to relate logically functional requirements to geometric representation independent upon detailed geometric representation, this paper presents an idea of logical structure modeling for computer aided conceptual design and makes attempt to establish a representation formalism of logic structure modeling. The definition and representation of logical structure feature are given and an assembly module definition for supporting top down conceptual design is also proposed. The proposed scheme contributes to several aspects of conceptual design research, especially to provide elementarily a formal methodology for computer aided conceptual design system development and operation. 展开更多
关键词 conceptual design function form transformation logic structure feature representation formalism
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Fuzzy logic controller design with unevenly-distributed membership function for high performance chamber cooling system 被引量:2
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作者 曹健鹏 Seok-Kwon Jeong Young-Mi Jung 《Journal of Central South University》 SCIE EI CAS 2014年第7期2684-2692,共9页
Fuzzy logic controller adopting unevenly-distributed membership function was presented with the purpose of enhancing performance of the temperature control precision and robustness for the chamber cooling system.Histo... Fuzzy logic controller adopting unevenly-distributed membership function was presented with the purpose of enhancing performance of the temperature control precision and robustness for the chamber cooling system.Histogram equalization and noise detection were performed to modify the evenly-distributed membership functions of error and error change rate into unevenly-distributed membership functions.Then,the experimental results with evenly and unevenly distributed membership functions were compared under the same outside environment conditions.The experimental results show that the steady-state error is reduced around 40% and the noise disturbance is rejected successfully even though noise range is 60% of the control precision range.The control precision is improved by reducing the steady-state error and the robustness is enhanced by rejecting noise disturbance through the fuzzy logic controller with unevenly-distributed membership function.Moreover,the system energy efficiency and lifetime of electronic expansion valve(EEV) installed in chamber cooling system are improved by adopting the unevenly-distributed membership function. 展开更多
关键词 chamber cooling system fuzzy logic controller unevenly-distributed membership function steady-state error reduction ROBUSTNESS variable speed refrigeration system
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Multi-agent system motion planning under temporal logic specifications and control barrier function 被引量:1
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作者 Xinyuan HUANG Li LI Jie CHEN 《Control Theory and Technology》 EI CSCD 2020年第3期269-278,共10页
In this paper,w e provide a novel scheme to solve the motion planning problem of multi-agent systems under high-level task specifications.First,linear temporal logic is applied to express the global task specification... In this paper,w e provide a novel scheme to solve the motion planning problem of multi-agent systems under high-level task specifications.First,linear temporal logic is applied to express the global task specification.Then an efficient and decentralized algorithm is proposed to decom pose it into local tasks.M oreover,w e use control barrier function to synthesize the local controller for each agent under the linear temporal logic motion plan with safety constraint.Finally,simulation results show the effectiveness and efficiency of our proposed scheme. 展开更多
关键词 Temporal logic multi-agent system formal methods control barrier function
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Uncertainties in estimation of extrapolated annual occurence rate of earthquakes using logical tree
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作者 杨智娴 张培震 郑月君 《Acta Seismologica Sinica(English Edition)》 CSCD 1998年第2期85-94,共10页
he logical tree methods are used for evaluate quantitatively relationship between frequency and magnitude, and deduce uncertainties of annual occurrence rate of earthquakes in the periods of lower magnitude earthquake... he logical tree methods are used for evaluate quantitatively relationship between frequency and magnitude, and deduce uncertainties of annual occurrence rate of earthquakes in the periods of lower magnitude earthquake. The uncertainties include deviations from the self-similarity of frequency-magnitude relations, different fitting methods, different methods obtained the annual occurrence rate, magnitude step used in fitting, start magnitude, error of magnitude and so on. Taking Xianshuihe River source zone as an example, we analyze uncertainties of occurrence rate of earthquakes M4, which is needed in risk evaluation extrapolating from frequency-magnitude relations of stronger earthquakes. The annual occurrence rate of M4 is usually required for seismic hazard assessment.The sensitivity analysis and examinations indicate that, in the same frequencymagnitude relations fitting method, the most sensitive factor is annual occurrence rate, the second is magnitude step and the following is start magnitude. Effect of magnitude error is rather small.Procedure of estimating the uncertainties is as follows:①Establishing a logical tree described uncertainties in frequencymagnitude relations by available data and knowledge about studied region.② Calculating frequencymagnitude relations for each end branches. ③ Examining sensitivities of each uncertainty factors, amending structure of logical tree and adjusting original weights. ④ Recalculating frequencymagnitude relations of end branches and complementary cumulative distribution function (CCDF) in each magnitude intervals.⑤ Obtaining an annual occurrence rate of M4 earthquakes under given fractiles.Taking fractiles as 20% and 80%, annual occurrence rate of M 4 events in Xianshuihe seismic zone is 0.643 0. The annual occurrence rate is 0.631 8 under fractiles of 50%, which is very close to that under fractiles 20% and 80%. 展开更多
关键词 logical tree uncertainty frequency-magnitude relation seismic hazard assessment Xi-anshuihe source region complementary cumulative distribution function (CCDF)
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FAULT DETECTION TEST SET FOR TESTABLE REALIZATIONS OF LOGIC FUNCTIONS WITH ESOP EXPRESSIONS
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作者 Pan Zhongliang Chen Guangju 《Journal of Electronics(China)》 2007年第2期238-244,共7页
The circuit testable realization and its fault detection for logic functions with ESOP (EXOR-Sum-Of-Products) expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set... The circuit testable realization and its fault detection for logic functions with ESOP (EXOR-Sum-Of-Products) expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set with 2n + m + 1 vectors for the detections of AND bridging faults and a test set with 2n + m vectors for the detections of OR bridging faults are presented. Secondly, for the testable realization by using )(OR gate tree, a test set with 2n + m vectors for the detections of AND bridging faults and a test set with 3n + m + 1 vectors for the detections of OR bridging faults are presented. Finally, a single fault test set with n + 5 vectors for the XOR gate tree realization is presented. Where n is the number of input variables and m is the number of product terms in a logic function. 展开更多
关键词 logic functions Testable realization Fault detection Single faults Bridging faults
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基于S-function的模糊逻辑系统控制器Simulink仿真 被引量:1
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作者 张绍德 《淮南职业技术学院学报》 2003年第2期77-79,共3页
提出将模糊逻辑系统表达式与模糊控制规则表相结合,并用S-function将其形成模块,再用Simulink对所设计的模糊控制系统仿真,编程快捷、调试方便。
关键词 模糊控制系统 模糊逻辑控制器 模糊逻辑系统 模糊控制规则 S-function SIMULINK 系统仿真
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Aircraft robust multidisciplinary design optimization methodology based on fuzzy preference function 被引量:4
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作者 Ali Reza BABAEI Mohammad Reza SETAYANDEH Hamid FARROKHFAL 《Chinese Journal of Aeronautics》 SCIE EI CAS CSCD 2018年第12期2248-2259,共12页
This paper presents a Fuzzy Preference Function-based Robust Multidisciplinary Design Optimization(FPF-RMDO) methodology. This method is an effective approach to multidisciplinary systems, which can be used to designe... This paper presents a Fuzzy Preference Function-based Robust Multidisciplinary Design Optimization(FPF-RMDO) methodology. This method is an effective approach to multidisciplinary systems, which can be used to designer experiences during the design optimization process by fuzzy preference functions. In this study, two optimizations are done for Predator MQ-1 Unmanned Aerial Vehicle(UAV):(A) deterministic optimization and(B) robust optimization. In both problems, minimization of takeoff weight and drag is considered as objective functions, which have been optimized using Non-dominated Sorting Genetic Algorithm(NSGA). In the robust design optimization, cruise altitude and velocity are considered as uncertainties that are modeled by the Monte Carlo Simulation(MCS) method. Aerodynamics, stability and control, mass properties, performance, and center of gravity are used for multidisciplinary analysis. Robust design optimization results show 46% and 42% robustness improvement for takeoff weight and cruise drag relative to optimal design respectively. 展开更多
关键词 Fuzzy logic Multidisciplinary design optimization Preference function Robust design Unmanned Aerial Vehicle(UAV)
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Fuzzy logic control strategy for submerged arc automatic welding of digital controlling 被引量:2
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作者 何宽芳 黄石生 +1 位作者 周漪清 王振民 《China Welding》 EI CAS 2008年第3期55-59,共5页
A microcomputer control system based on 80C320 and a switching regulation of wire feeder were designed. A correction factor based double model fuzzy logic controller (FLC) was introduced to achieve welding digital a... A microcomputer control system based on 80C320 and a switching regulation of wire feeder were designed. A correction factor based double model fuzzy logic controller (FLC) was introduced to achieve welding digital and intellectualized control by means of wire feeding speed feedback. The controller has many functions such as keyboard input, light emitting diode (LED) display and real-time intellectualized control of welding process etc. The controlling performance influenced by the coefficient of correction function was discussed. It was concluded by the experiments the relation between the coefficient of correction function and welding quality, when the coefficient of correction function is great, the dynamic character of controller is better, when the coefficient of correction function is small, the sensitivity character of controller is better. Experimental results also show that digital and fuzzy logic control method enable the improvement of appearance of weld and stability of welding process to be achieved in submerged arc automatic welding. 展开更多
关键词 submerged arc welding microcomputer control correction function fuzzy logic control
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TRANSFORMATION BETWEEN TWO KINDS OF EXPANSION COEFFICIENTS OF SYMMETRIC FUNCTIONS BASED ON MAPPING METHOD 被引量:1
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作者 Claudio Moraga 《Journal of Electronics(China)》 1996年第4期366-372,共7页
This paper discusses the definitions and properties of two kinds of fundamental symmetric functions, which are based on AND-OR-NOT algebraic system and AND-Exclusive OR algebraic system, respectively. Based upon it, s... This paper discusses the definitions and properties of two kinds of fundamental symmetric functions, which are based on AND-OR-NOT algebraic system and AND-Exclusive OR algebraic system, respectively. Based upon it, some mapping transformation methods between two kinds of expansion coefficients of an arbitrary symmetric, function in the complete set of two fundamental symmetric functions. 展开更多
关键词 Reed-Muller EXPANSION SYMMETRIC function BJ MAPS EXCLUSIVE OR logic
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Systolic B-1 Circuit in Galois Fields Based on a Quaternary Logic Technique 被引量:1
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作者 Haixia Wu Yilong Bai +2 位作者 Tian Wang Xiaoran Li Long He 《Journal of Beijing Institute of Technology》 EI CAS 2020年第2期177-183,共7页
In order to improve the circuit complexity and reduce the long latency of B-1 operations,a novel B-1 operation in Galois Field GF(24)is presented and the corresponding systolic realization based on multiple-valued log... In order to improve the circuit complexity and reduce the long latency of B-1 operations,a novel B-1 operation in Galois Field GF(24)is presented and the corresponding systolic realization based on multiple-valued logic(MVL)is proposed.The systolic structure employs multiplevalued current mode(MVCM)by using dynamic source-coupled logic(SCL)to reduce the initial delay and the transistor and wire counts.The performance is evaluated by HSPICE simulation in 0.18μm CMOS technology and a comparison is conducted between our proposed implementation and those reported in the literature.The initial delay and the sum of transistors and wires in our MVL design are about 43%and 13%lower,respectively,in comparison with other corresponding binary CMOS implementations.The systolic architecture proposed is simple,regular,and modular,well suited for very large scale integration(VLSI)implementations.The combination of MVCM circuits and relevant algorithms based on MVL seems to be a potential solution for high performance arithmetic operations in GF(2k). 展开更多
关键词 multiple-valued logic(MVL) systolic B^-1 circuit Galois Fields
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A minimum adequate set of multi-valued logic 被引量:1
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作者 Daizhan Cheng Jun-e Feng +1 位作者 Jianli Zhao Shihua Fu 《Control Theory and Technology》 EI CSCD 2021年第4期425-429,共5页
An adequate set of k-valued logic is provided,which contains only two operators.It is also proved that this adequate set is of minimum size。
关键词 k-valued logic Normal form Adequate set(ADS) Structure matrix of logical functions Semi-tensor product of matrices
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