This essay will reexamine research on the relationship between human memory and addiction. This paper will review several studies that discussed how memory systems in the human brain are involved in the acquisition of...This essay will reexamine research on the relationship between human memory and addiction. This paper will review several studies that discussed how memory systems in the human brain are involved in the acquisition of behavior that is learned and is associated with the development of drug addiction and drug relapse. Additional information reveals that when individuals make the transition from recreational drug or impulsive use to compulsive drug abuse, which may result in a neuroanatomical change in areas of the brain from cognitive control guided by the hippocampus/dorsomedial striatum towards conditioned control of behavior managed by the dorsolateral striatum (DLS) [1]. This review also looked at studies that involved experiments with humans and lower animals, which suggested that the hippocampus mediates a cognitive/spatial type of memory, while the dorsal striatum manages stimulus-response (S-R) habit memory, and the amygdala governs the classical conditioning form of learning and stimulus-affective-associative relationships [1]. Overall, these studies utilize the hypothesis of the memory systems view of addiction, and the involvement of learning and memory in the context of drug addiction, which was proposed by them [2]. This theory has been proposed in response to drug addiction research and includes alcohol, amphetamine, and cocaine [1]. The research also explains how stress and anxiety can play a role in how strong emotional excitement can lead to dependent habit memory in rodents and humans [1]. .展开更多
Phase change memory （PCM） is a promising technology for future memory thanks to its better scalability and lower leakage power than DRAM （dynamic random-access memory）. However, adopting PCM as main memory needs t...Phase change memory （PCM） is a promising technology for future memory thanks to its better scalability and lower leakage power than DRAM （dynamic random-access memory）. However, adopting PCM as main memory needs to overcome its write issues, such as long write latency and high write power. In this paper, we propose two techniques to improve the performance and energy-efficiency of PCM memory systems. First, we propose a victim cache technique utilizing the existing buffer in the memory controller to reduce PCM memory accesses. The key idea is reorganizing the buffer into a victim cache structure （RBC） to provide additional hits for the LLC （last level cache）. Second, we propose a chip parallelism-aware replacement policy （CPAR） for the victim cache to further improve performance. Instead of evicting one cache line once, CPAR evicts multiple cache lines that access different PCM chips. CPAR can reduce the frequent victim cache eviction and improve the write parallelism of PCM chips. The evaluation results show that, compared with the baseline, RBC can improve PCM memory system performance by up to 9.4% and 5.4% on average. Combing CPAR with RBC （RBC＋CPAR） can improve performance by up to 19.0% and 12.1% on average. Moreover, RBC and RBC＋CPAR can reduce memory energy consumption by 8.3% and 6.6% on average, respectively.展开更多
A partition checkpoint strategy based on data segment priority is presented to meet the timing constraints of the data and the transaction in embedded real-time main memory database systems（ERTMMDBS） as well as to r...A partition checkpoint strategy based on data segment priority is presented to meet the timing constraints of the data and the transaction in embedded real-time main memory database systems（ERTMMDBS） as well as to reduce the number of the transactions missing their deadlines and the recovery time.The partition checkpoint strategy takes into account the characteristics of the data and the transactions associated with it;moreover,it partitions the database according to the data segment priority and sets the corresponding checkpoint frequency to each partition for independent checkpoint operation.The simulation results show that the partition checkpoint strategy decreases the ratio of trans-actions missing their deadlines.展开更多
Non-Volatile Main Memories (NVMMs) have recently emerged as a promising technology for future memory systems. Generally, NVMMs have many desirable properties such as high density, byte-addressability, non-volatility, ...Non-Volatile Main Memories (NVMMs) have recently emerged as a promising technology for future memory systems. Generally, NVMMs have many desirable properties such as high density, byte-addressability, non-volatility, low cost, and energy efficiency, at the expense of high write latency, high write power consumption, and limited write endurance. NVMMs have become a competitive alternative of Dynamic Random Access Memory (DRAM), and will fundamentally change the landscape of memory systems. They bring many research opportunities as well as challenges on system architectural designs, memory management in operating systems (OSes), and programming models for hybrid memory systems. In this article, we revisit the landscape of emerging NVMM technologies, and then survey the state-of-the-art studies of NVMM technologies. We classify those studies with a taxonomy according to different dimensions such as memory architectures, data persistence, performance improvement, energy saving, and wear leveling. Second, to demonstrate the best practices in building NVMM systems, we introduce our recent work of hybrid memory system designs from the dimensions of architectures, systems, and applications. At last, we present our vision of future research directions of NVMMs and shed some light on design challenges and opportunities.展开更多
文摘This essay will reexamine research on the relationship between human memory and addiction. This paper will review several studies that discussed how memory systems in the human brain are involved in the acquisition of behavior that is learned and is associated with the development of drug addiction and drug relapse. Additional information reveals that when individuals make the transition from recreational drug or impulsive use to compulsive drug abuse, which may result in a neuroanatomical change in areas of the brain from cognitive control guided by the hippocampus/dorsomedial striatum towards conditioned control of behavior managed by the dorsolateral striatum (DLS) [1]. This review also looked at studies that involved experiments with humans and lower animals, which suggested that the hippocampus mediates a cognitive/spatial type of memory, while the dorsal striatum manages stimulus-response (S-R) habit memory, and the amygdala governs the classical conditioning form of learning and stimulus-affective-associative relationships [1]. Overall, these studies utilize the hypothesis of the memory systems view of addiction, and the involvement of learning and memory in the context of drug addiction, which was proposed by them [2]. This theory has been proposed in response to drug addiction research and includes alcohol, amphetamine, and cocaine [1]. The research also explains how stress and anxiety can play a role in how strong emotional excitement can lead to dependent habit memory in rodents and humans [1]. .
文摘Phase change memory （PCM） is a promising technology for future memory thanks to its better scalability and lower leakage power than DRAM （dynamic random-access memory）. However, adopting PCM as main memory needs to overcome its write issues, such as long write latency and high write power. In this paper, we propose two techniques to improve the performance and energy-efficiency of PCM memory systems. First, we propose a victim cache technique utilizing the existing buffer in the memory controller to reduce PCM memory accesses. The key idea is reorganizing the buffer into a victim cache structure （RBC） to provide additional hits for the LLC （last level cache）. Second, we propose a chip parallelism-aware replacement policy （CPAR） for the victim cache to further improve performance. Instead of evicting one cache line once, CPAR evicts multiple cache lines that access different PCM chips. CPAR can reduce the frequent victim cache eviction and improve the write parallelism of PCM chips. The evaluation results show that, compared with the baseline, RBC can improve PCM memory system performance by up to 9.4% and 5.4% on average. Combing CPAR with RBC （RBC＋CPAR） can improve performance by up to 19.0% and 12.1% on average. Moreover, RBC and RBC＋CPAR can reduce memory energy consumption by 8.3% and 6.6% on average, respectively.
基金Supported by the National Natural Science Foundation of China (60673128)
文摘A partition checkpoint strategy based on data segment priority is presented to meet the timing constraints of the data and the transaction in embedded real-time main memory database systems（ERTMMDBS） as well as to reduce the number of the transactions missing their deadlines and the recovery time.The partition checkpoint strategy takes into account the characteristics of the data and the transactions associated with it;moreover,it partitions the database according to the data segment priority and sets the corresponding checkpoint frequency to each partition for independent checkpoint operation.The simulation results show that the partition checkpoint strategy decreases the ratio of trans-actions missing their deadlines.
基金Supported jointly by the National Natural Science Foundation of China under Grants Nos. 61672251, 61732010, 61825202, and 61929103.
文摘Non-Volatile Main Memories (NVMMs) have recently emerged as a promising technology for future memory systems. Generally, NVMMs have many desirable properties such as high density, byte-addressability, non-volatility, low cost, and energy efficiency, at the expense of high write latency, high write power consumption, and limited write endurance. NVMMs have become a competitive alternative of Dynamic Random Access Memory (DRAM), and will fundamentally change the landscape of memory systems. They bring many research opportunities as well as challenges on system architectural designs, memory management in operating systems (OSes), and programming models for hybrid memory systems. In this article, we revisit the landscape of emerging NVMM technologies, and then survey the state-of-the-art studies of NVMM technologies. We classify those studies with a taxonomy according to different dimensions such as memory architectures, data persistence, performance improvement, energy saving, and wear leveling. Second, to demonstrate the best practices in building NVMM systems, we introduce our recent work of hybrid memory system designs from the dimensions of architectures, systems, and applications. At last, we present our vision of future research directions of NVMMs and shed some light on design challenges and opportunities.
