This paper proposes a low-power MOS current mode logic （MCML） circuit with sleep-transistor to reduce the leakage current. The sleep-transistor is used to high-threshold voltage transistor to minimize the leakage cu...This paper proposes a low-power MOS current mode logic （MCML） circuit with sleep-transistor to reduce the leakage current. The sleep-transistor is used to high-threshold voltage transistor to minimize the leakage current. The 16× 16 bit parallel multiplier is designed with the proposed technology. Comparing with the previous MCML circuit, the circuit achieves the reduction of the power consumption in sleep mode by 1/258. This circuit is designed with Samsung 0.35 um complementary metal oxide semiconductor （CMOS） process. The validity and effectiveness are verified through the HSPICE simulation.展开更多
为克服传统静态CMOS电路在高频工作时的缺陷,引入了MOS电流模逻辑(MOS Current Mode Logic,MCML)电路.MCML电路是一种差分对称结构逻辑电路,与传统的CMOS电路比较,在高频段工作时功耗相对较低,具有典型的高速低功耗特性.在对MCML电路的...为克服传统静态CMOS电路在高频工作时的缺陷,引入了MOS电流模逻辑(MOS Current Mode Logic,MCML)电路.MCML电路是一种差分对称结构逻辑电路,与传统的CMOS电路比较,在高频段工作时功耗相对较低,具有典型的高速低功耗特性.在对MCML电路的开关条件以及具有不同输入端的MCML逻辑门电路进行分析后,提出了实现MCML加法器的两种电路结构,并给出了不同结构的应用条件.仿真结果验证了电路结构设计的有效性.展开更多
An ＂automatic power down＂ method is introduced to design a 4/5 prescaler,with the characteristic of making one of its D-flip-flops power down when it operates in divide-by-4 mode. Implemented with the TSMC 0.25vm mi...An ＂automatic power down＂ method is introduced to design a 4/5 prescaler,with the characteristic of making one of its D-flip-flops power down when it operates in divide-by-4 mode. Implemented with the TSMC 0.25vm mixed-sig- nal CMOS process,the 4/5 MOS current mode logic prescaler is designed with this automatic power down technique. The simulation results show that the new 4/5 prescaler is immune to the ＂wake-up＂ issue and thereby retains the same maxi- mum operating frequency as the conventional prescaler. An integer-N divider with this proposed prescaler and with the di- vision ratio 66/67 is manufactured,and it is estimated to save more than 20% of the power compared with the conventional 4/5 prescaler.展开更多
The performance of complementary metal oxide semiconductor(CMOS)circuits is affected by electromagnetic interference(EMI),and the study of the circuit's ability to resist EMI will facilitate the design of circuits...The performance of complementary metal oxide semiconductor(CMOS)circuits is affected by electromagnetic interference(EMI),and the study of the circuit's ability to resist EMI will facilitate the design of circuits with better performance.Current-mode CMOS circuits have been continuously developed in recent years due to their advantages of high speed and low power consumption over conventional circuits under the deep submicron process;their EMI resistance performance deserves further study.This paper introduces three kinds of NOT gate circuits:conventional voltage-mode CMOS,MOS current-mode logic(MCML)with voltage signal of input and output,and current-mode CMOS with current signal of input and output.The effects of EMI on three NOT gate circuits are investigated using Cadence Virtuoso software simulation,and a disturbance level factor is defined to compare the effects of different interference terminals,interference signals'waveforms,and interference signals'frequencies on the circuits in the 65 nm process.The relationship between input resistance and circuit EMI resistance performance is investigated by varying the value of cascade resistance at the input of the current-mode CMOS circuits.Simulation results show that the current-mode CMOS circuits have better resistance performance to EMI at high operating frequencies,and the higher the operating frequency of the current-mode CMOS circuits,the better the resistance performance of the circuits to EMI.Additionally,the effects of different temperatures and different processes on the resistance performance of three circuits are also studied.In the temperature range of-40℃to 125℃,the higher the temperature,the weaker the resistance ability of voltage-mode CMOS and MCML circuits,and the stronger the resistance ability of current-mode CMOS circuits.In the 28 nm process,the current-mode CMOS circuit interference resistance ability is relatively stronger than that of the other two kinds of circuits.The relative interference resistance ability of voltage-mode CMOS and MCML circuits in the 28 nm process is similar to that of the 65 nm process,while the relative interference resistance ability of current-mode CMOS circuits in the 28 nm process is stronger than that of the 65 nm process.This study provides a basis for the design of current-mode CMOS circuits against EMI.展开更多
文摘This paper proposes a low-power MOS current mode logic （MCML） circuit with sleep-transistor to reduce the leakage current. The sleep-transistor is used to high-threshold voltage transistor to minimize the leakage current. The 16× 16 bit parallel multiplier is designed with the proposed technology. Comparing with the previous MCML circuit, the circuit achieves the reduction of the power consumption in sleep mode by 1/258. This circuit is designed with Samsung 0.35 um complementary metal oxide semiconductor （CMOS） process. The validity and effectiveness are verified through the HSPICE simulation.
文摘为克服传统静态CMOS电路在高频工作时的缺陷,引入了MOS电流模逻辑(MOS Current Mode Logic,MCML)电路.MCML电路是一种差分对称结构逻辑电路,与传统的CMOS电路比较,在高频段工作时功耗相对较低,具有典型的高速低功耗特性.在对MCML电路的开关条件以及具有不同输入端的MCML逻辑门电路进行分析后,提出了实现MCML加法器的两种电路结构,并给出了不同结构的应用条件.仿真结果验证了电路结构设计的有效性.
文摘An ＂automatic power down＂ method is introduced to design a 4/5 prescaler,with the characteristic of making one of its D-flip-flops power down when it operates in divide-by-4 mode. Implemented with the TSMC 0.25vm mixed-sig- nal CMOS process,the 4/5 MOS current mode logic prescaler is designed with this automatic power down technique. The simulation results show that the new 4/5 prescaler is immune to the ＂wake-up＂ issue and thereby retains the same maxi- mum operating frequency as the conventional prescaler. An integer-N divider with this proposed prescaler and with the di- vision ratio 66/67 is manufactured,and it is estimated to save more than 20% of the power compared with the conventional 4/5 prescaler.
文摘The performance of complementary metal oxide semiconductor(CMOS)circuits is affected by electromagnetic interference(EMI),and the study of the circuit's ability to resist EMI will facilitate the design of circuits with better performance.Current-mode CMOS circuits have been continuously developed in recent years due to their advantages of high speed and low power consumption over conventional circuits under the deep submicron process;their EMI resistance performance deserves further study.This paper introduces three kinds of NOT gate circuits:conventional voltage-mode CMOS,MOS current-mode logic(MCML)with voltage signal of input and output,and current-mode CMOS with current signal of input and output.The effects of EMI on three NOT gate circuits are investigated using Cadence Virtuoso software simulation,and a disturbance level factor is defined to compare the effects of different interference terminals,interference signals'waveforms,and interference signals'frequencies on the circuits in the 65 nm process.The relationship between input resistance and circuit EMI resistance performance is investigated by varying the value of cascade resistance at the input of the current-mode CMOS circuits.Simulation results show that the current-mode CMOS circuits have better resistance performance to EMI at high operating frequencies,and the higher the operating frequency of the current-mode CMOS circuits,the better the resistance performance of the circuits to EMI.Additionally,the effects of different temperatures and different processes on the resistance performance of three circuits are also studied.In the temperature range of-40℃to 125℃,the higher the temperature,the weaker the resistance ability of voltage-mode CMOS and MCML circuits,and the stronger the resistance ability of current-mode CMOS circuits.In the 28 nm process,the current-mode CMOS circuit interference resistance ability is relatively stronger than that of the other two kinds of circuits.The relative interference resistance ability of voltage-mode CMOS and MCML circuits in the 28 nm process is similar to that of the 65 nm process,while the relative interference resistance ability of current-mode CMOS circuits in the 28 nm process is stronger than that of the 65 nm process.This study provides a basis for the design of current-mode CMOS circuits against EMI.
