The optical soliton characteristics of GaSb-based~2μm wavelength integrated optical chips have broad application prospects in optoelectronic fields such as optical communications,infrared countermeasures,and gas envi...The optical soliton characteristics of GaSb-based~2μm wavelength integrated optical chips have broad application prospects in optoelectronic fields such as optical communications,infrared countermeasures,and gas environment monitoring.In the research of two-section integrated optical chips,more attention is paid to their passive mode-locked characteristics.The ability of its structure to generate stable soliton transmission has not yet been studied,which will limit its further application in high-performance near-mid infrared optoelectronic technology.In this paper,we design and prepare a GaSb-based~2μm wave-length two-section integrated semiconductor laser chip structure,and test and analyze its related properties of soliton,includ-ing power−injection current−voltage(P−I−V),temperature and mode-locked characteristics.Experimental results show that the chip can achieve stable mode-locked operation at nearly~2μm wavelength and present the working characteristics of near opti-cal soliton states and multi-peak optical soliton states.By comparing and analyzing the measured optical pulse sequence curve with the numerical fitting based on the pure fourth order soliton approximation solution,it is confirmed that the two-section integrated optical chip structure can generate stable transmission of multi-peak optical soliton.This provides a research direc-tion for developing near-mid infrared mode-locked integrated optical chips with high-performance property of optical soliton.展开更多
Due to the waning of Moore’s Law,the conventional monolithic chip architectural design is confronting hurdles such as increasing die size and skyrocketing cost.In this post-Moore era,the integrated chip has emerged a...Due to the waning of Moore’s Law,the conventional monolithic chip architectural design is confronting hurdles such as increasing die size and skyrocketing cost.In this post-Moore era,the integrated chip has emerged as a pivotal technology,gaining substantial interest from both the academia and industry.Compared with monolithic chips,the chiplet-based integrated chips can significantly enhance system scalability,curtail costs,and accelerate design cycles.However,integrated chips introduce vast design spaces encompassing chiplets,inter-chiplet connections,and packaging parameters,thereby amplifying the complexity of the design process.This paper introduces the Optimal Decomposition-Combination Theory,a novel methodology to guide the decomposition and combination processes in integrated chip design.Furthermore,it offers a thorough examination of existing integrated chip design methodologies to showcase the application of this theory.展开更多
A compact structured illumination chip based on integrated optics is proposed and fabricated on a silicon-on- insulator platform. Based on the simulation of Caussian beam interference, we adopt a chirped diffraction g...A compact structured illumination chip based on integrated optics is proposed and fabricated on a silicon-on- insulator platform. Based on the simulation of Caussian beam interference, we adopt a chirped diffraction grating to achieve a specific interference pattern. The experimental results match well with the simulations. The portability and flexibility of the structured illumination chip can be increased greatly through horizontal encapsulation. High levels of integration, compared with the conventional structured illumination approach, make this chip very compact, with a footprint of only around 1 mm2. The chip has no optical lenses and can be easily combined with a microfluidic system. These properties would make the chip very suitable for portable 3D scanner and compact super-resolution microscopy applications.展开更多
Analyzing the influence on Q factor, which was caused by the parasitic effect in a CMOS RF on chip integrated inductor, a concise method to increase the Q factor has been obtained when optimizing the layout parameter....Analyzing the influence on Q factor, which was caused by the parasitic effect in a CMOS RF on chip integrated inductor, a concise method to increase the Q factor has been obtained when optimizing the layout parameter. Using this method, the Q factor of 7.9 can be achieved in a 5nH inductor (operating frequency is 2GHz) while the errors in inductance are less than 0.5% compared with the aimed values. It is proved by experiments that this method can guarantee the sufficient accuracy but require less computation time. Therefore, it is of great use for the design of the inductor in CMOS RF IC’s.展开更多
As Moore’s Law comes to an end,the implementation of high-performance chips through transistor scaling has become increasingly challenging.To improve performance,increasing the chip area to integrate more transistors...As Moore’s Law comes to an end,the implementation of high-performance chips through transistor scaling has become increasingly challenging.To improve performance,increasing the chip area to integrate more transistors has become an essential approach.However,due to restrictions such as the maximum reticle area,cost,and manufacturing yield,the chip’s area cannot be continuously increased,and it encounters what is known as the“area-wall”.In this paper,we provide a detailed analysis of the area-wall and propose a practical solution,the Big Chip,as a novel chip form to continuously improve performance.We introduce a performance model for evaluating Big Chip and discuss its architecture.Finally,we derive the future development trends of the Big Chip.展开更多
In this paper, we present a 60 GHz substrate-integrated waveguide fed-steerable low-temperature cofired ceramics array. The antenna is suitable for transmitting and receiving on the 60 GHz wireless personal area netwo...In this paper, we present a 60 GHz substrate-integrated waveguide fed-steerable low-temperature cofired ceramics array. The antenna is suitable for transmitting and receiving on the 60 GHz wireless personal area network frequency band. The wireless system can be used for HDTV, high-data-rate networking up to 4.5 GBit/s, security and surveillance, and similar applications.展开更多
We propose an ultra-simple dual-channel configuration for simultaneously evaluating two branches of a multifunctional integrated optic chip(MFIOC). In the configuration, the MFIOC is employed as a beam splitter to con...We propose an ultra-simple dual-channel configuration for simultaneously evaluating two branches of a multifunctional integrated optic chip(MFIOC). In the configuration, the MFIOC is employed as a beam splitter to construct the demodulation interferometer together with a 2 × 2 fiber coupler. Interference happens between polarization modes traveling through different channels of the MFIOC. The cross-couplings of each channel are respectively characterized by the interference peaks which distribute on opposite sides of the central interference peak. Temperature responses of the MFIOC are experimentally measured from-40°C to 80°C. Results show that the proposed configuration can achieve simultaneous dual-channel transient measurements with resolution of-90 d B and dynamic range of 90 d B. In addition, the two channels of the configuration have consistent measuring performance, and the two branches of the MFIOC have different responses to temperature variation.展开更多
In this Letter, a pair of integrated optoelectronic transceiving chips is proposed. They are constructed by integrating a vertical cavity surface emitting laser unit above a positive-intrinsic-negative photodetector u...In this Letter, a pair of integrated optoelectronic transceiving chips is proposed. They are constructed by integrating a vertical cavity surface emitting laser unit above a positive-intrinsic-negative photodetector unit. One of the transceiving chips emits light at the wavelength of 848.1 nm with a threshold current of 0.8 mA and a slope efficiency of 0.81 W/A. It receives light between 801 and 814 nm with a quantum efficiency of higher than 70%. On its counterpart, the other one of the transceiving chips emits light at the wavelength of 805.3 nm with a threshold current of 1.1 mA and a slope efficiency of 0.86 W/A. It receives light between 838 and 855 nm with a quantum efficiency of higher than 70%. The proposed pair of integrated optoelectronic transceiving chips can work full-duplex with each other, and they can be applied to single fiber bidirectional optical interconnects.展开更多
The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power...The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power management module.The main receiver adopts a unified simplified synchronization method and channel codec with proactive Reed-Solomon Bypass technique,which increases the robustness and energy efficiency of receiver.The WUI receiver specifies the communication node and wakes up the transceiver to reduce average power consumption of the transceiver.The embedded NVM can backup/restore the states information of processor that avoids the loss of the state information caused by power failure and reduces the unnecessary power of repetitive computation when the processor is waked up from power down mode.The baseband processor is designed and verified on a FPGA board.The simulated power consumption of processor is 5.1uW for transmitting and 28.2μW for receiving.The WUI receiver technique reduces the average power consumption of transceiver remarkably.If the transceiver operates 30 seconds in every 15 minutes,the average power consumption of the transceiver can be reduced by two orders of magnitude.The NVM avoids the loss of the state information caused by power failure and energy waste caused by repetitive computation.展开更多
A digital still camera image processing system on a chip, different from the video camera system, is pre- sented for mobile phone to reduce the power consumption and size. A new color interpolation algorithm is propos...A digital still camera image processing system on a chip, different from the video camera system, is pre- sented for mobile phone to reduce the power consumption and size. A new color interpolation algorithm is proposed to enhance the image quality. The system can also process fixed patten noise （FPN） reduction, color correction, gamma correction, RGB/YUV space transfer, etc. The chip is controlled by sensor regis- ters by inter-integrated circuit （I2C） interface. The voltage for both the front-end analog and the pad cir- cuits is 2.8 V, and the volatge for the image signal processing is 1.8 V. The chip running under the external 13.5-MHz clock has a video data rate of 30 frames/s and the measured power dissipation is about 75 roW.展开更多
Research in the ocean places high demands on chips'robustness,speed,and energy consumption.Diffractive neural networks(DNNs)enable direct optical image processing at light speed,with great potential for underwater...Research in the ocean places high demands on chips'robustness,speed,and energy consumption.Diffractive neural networks(DNNs)enable direct optical image processing at light speed,with great potential for underwater applications.Here,we experimentally demonstrate a compact DNN chip capable of operating directly in both water and air by multiobjective training and initial training value optimization.The two layers of DNNs are integrated on the two surfaces of a quartz plate,respectively.The chip achieved high accuracies above 90%in recognition tasks for handwritten digits and fashion products.The architecture and material ensure the chip's high stability for long-term underwater use.展开更多
Linearly chirped microwave waveforms(LCMWs)are indispensable in advanced radar systems.Our study introduces and validates,through extensive experimentation,the innovative application of a thin-film lithium niobate(TFL...Linearly chirped microwave waveforms(LCMWs)are indispensable in advanced radar systems.Our study introduces and validates,through extensive experimentation,the innovative application of a thin-film lithium niobate(TFLN)photonic integrated circuit(PIC)to realize a Fourier domain mode-locked optoelectronic oscillator(FDML OEO)for generating high-precision LCMW signals.This integrated chip combines a phase modulator(PM)and an electrically tuned notch micro-ring resonator(MRR),which functions as a rapidly tunable bandpass filter,facilitating the essential phase-to-intensity modulation(PM-IM)conversion for OEO oscillation.By synchronizing the modulation period of the applied driving voltage to the MRR with the OEO loop delay,we achieve Fourier domain mode-locking,producing LCMW signals with an impressive tunable center frequency range of18.55 GHz to 23.59 GHz,an adjustable sweep bandwidth from 3.85 GHz to 8.5 GHz,and a remarkable chirp rate up to 3.22 GHz/μs.Unlike conventional PM-IM based FDML OEOs,our device obviates the need for expensive tunable lasers or microwave sources,positioning it as a practical solution for generating high-frequency LCMW signals with extended sweep bandwidth and high chirp rates,all within a compact and cost-efficient form factor.展开更多
High-quality photonic materials are critical for promoting integrated photonic devices with broad bandwidths,high efficiencies,and flexibilities for high-volume chip-scale fabrication.Recently,we designed a home-devel...High-quality photonic materials are critical for promoting integrated photonic devices with broad bandwidths,high efficiencies,and flexibilities for high-volume chip-scale fabrication.Recently,we designed a home-developed chalcogenide glass(ChG)-Ge_(25)Sb_(10)S_(65)(GeSbS)for optical information processing chips and systems,which featured an ultrabroad transmission window,a high Kerr nonlinearity and photoelastic coefficient,and compatibility with the photonic hybrid integration technology of silicon photonics.Chip-integrated GeSbS microresonators and microresonator arrays with high quality factors and lithographically controlled fine structures were fabricated using a modified nanofabrication process.Moreover,considering the high Kerr nonlinearity and photoelastic effect of ChGs,we realised a novel ChG hybrid integrated chip,inspired by recent advances in integrated soliton microcombs and acousto-optic(AO)modulators.展开更多
Universal conservation laws of wave–particle–entanglement triad,which describe relations between the wave–particle duality of a quantum system and its entanglement with an ancilla quantum memory,are proposed and fu...Universal conservation laws of wave–particle–entanglement triad,which describe relations between the wave–particle duality of a quantum system and its entanglement with an ancilla quantum memory,are proposed and further demonstrated with silicon-integrated nanophotonic chips.展开更多
The microfluidic polymerase chain reaction(PCR)chips have undergone extensive development and nowadays have become an important domain of miniaturization technology application.Here,we review the advances of microflui...The microfluidic polymerase chain reaction(PCR)chips have undergone extensive development and nowadays have become an important domain of miniaturization technology application.Here,we review the advances of microfluidic PCR chips over the past years,from the first single chamber stationary PCR chip to the new SlipChip PCR.First,the three distinct types of microfluidic PCR chips are discussed,including chamber stationary PCR chips,flow-through PCR chips and convection PCR chips.Then we focus on droplet PCR chips and SlipChip PCR.Although they are at an early stage,they show the great potential for high-throughput PCR and robust chip.Finally,general discussions on integrated chips are given.The low cost,portable,high-throughout integrated PCR chips will certainly be further developed in spite of many challenges.展开更多
基金the National Natural Science Foundation of China(Grant Nos.62274048,62464006,62174046)the Ministry of Education,Singapore(Grant No.MOE-T2EP50121-0005)+1 种基金Hainan Province Science and Technology Special Fund(Grant No.ZDYF2025GXJS007)National Key R&D Program of China(Grant No.2023YFF0722400).
文摘The optical soliton characteristics of GaSb-based~2μm wavelength integrated optical chips have broad application prospects in optoelectronic fields such as optical communications,infrared countermeasures,and gas environment monitoring.In the research of two-section integrated optical chips,more attention is paid to their passive mode-locked characteristics.The ability of its structure to generate stable soliton transmission has not yet been studied,which will limit its further application in high-performance near-mid infrared optoelectronic technology.In this paper,we design and prepare a GaSb-based~2μm wave-length two-section integrated semiconductor laser chip structure,and test and analyze its related properties of soliton,includ-ing power−injection current−voltage(P−I−V),temperature and mode-locked characteristics.Experimental results show that the chip can achieve stable mode-locked operation at nearly~2μm wavelength and present the working characteristics of near opti-cal soliton states and multi-peak optical soliton states.By comparing and analyzing the measured optical pulse sequence curve with the numerical fitting based on the pure fourth order soliton approximation solution,it is confirmed that the two-section integrated optical chip structure can generate stable transmission of multi-peak optical soliton.This provides a research direc-tion for developing near-mid infrared mode-locked integrated optical chips with high-performance property of optical soliton.
基金supported in part by the National Natural Science Foundation of China(NSFC)under Grant 92373206,Grant 62222411,and Grant 62025404in part by the National Key Research and Development Program of China under Grant 2023YFB4404400.
文摘Due to the waning of Moore’s Law,the conventional monolithic chip architectural design is confronting hurdles such as increasing die size and skyrocketing cost.In this post-Moore era,the integrated chip has emerged as a pivotal technology,gaining substantial interest from both the academia and industry.Compared with monolithic chips,the chiplet-based integrated chips can significantly enhance system scalability,curtail costs,and accelerate design cycles.However,integrated chips introduce vast design spaces encompassing chiplets,inter-chiplet connections,and packaging parameters,thereby amplifying the complexity of the design process.This paper introduces the Optimal Decomposition-Combination Theory,a novel methodology to guide the decomposition and combination processes in integrated chip design.Furthermore,it offers a thorough examination of existing integrated chip design methodologies to showcase the application of this theory.
基金Supported by the National Natural Science Foundation of China under Grant No 61334008the National High-Technology Research and Development Program of China under Grant No 2015AA016904the Instrument Developing Project of the Chinese Academy of Sciences under Grant No YZ201301
文摘A compact structured illumination chip based on integrated optics is proposed and fabricated on a silicon-on- insulator platform. Based on the simulation of Caussian beam interference, we adopt a chirped diffraction grating to achieve a specific interference pattern. The experimental results match well with the simulations. The portability and flexibility of the structured illumination chip can be increased greatly through horizontal encapsulation. High levels of integration, compared with the conventional structured illumination approach, make this chip very compact, with a footprint of only around 1 mm2. The chip has no optical lenses and can be easily combined with a microfluidic system. These properties would make the chip very suitable for portable 3D scanner and compact super-resolution microscopy applications.
文摘Analyzing the influence on Q factor, which was caused by the parasitic effect in a CMOS RF on chip integrated inductor, a concise method to increase the Q factor has been obtained when optimizing the layout parameter. Using this method, the Q factor of 7.9 can be achieved in a 5nH inductor (operating frequency is 2GHz) while the errors in inductance are less than 0.5% compared with the aimed values. It is proved by experiments that this method can guarantee the sufficient accuracy but require less computation time. Therefore, it is of great use for the design of the inductor in CMOS RF IC’s.
基金supported in part by the National Natural Science Foundation of China(61834006,62025404,62104229,62104230,61874124,62222411)in part by the Strategic Priority Research Program of Chinese Academy of Sciences(XDB44030300,XDB44020300)Zhejiang Lab under Grants 2021PC0AC01.
文摘As Moore’s Law comes to an end,the implementation of high-performance chips through transistor scaling has become increasingly challenging.To improve performance,increasing the chip area to integrate more transistors has become an essential approach.However,due to restrictions such as the maximum reticle area,cost,and manufacturing yield,the chip’s area cannot be continuously increased,and it encounters what is known as the“area-wall”.In this paper,we provide a detailed analysis of the area-wall and propose a practical solution,the Big Chip,as a novel chip form to continuously improve performance.We introduce a performance model for evaluating Big Chip and discuss its architecture.Finally,we derive the future development trends of the Big Chip.
文摘In this paper, we present a 60 GHz substrate-integrated waveguide fed-steerable low-temperature cofired ceramics array. The antenna is suitable for transmitting and receiving on the 60 GHz wireless personal area network frequency band. The wireless system can be used for HDTV, high-data-rate networking up to 4.5 GBit/s, security and surveillance, and similar applications.
基金the National Natural Science Foundation of China (Grants Nos. 61227013, 61307104,61422505)the Program for New Century Excellent Talents in University (NCET-12-0623)+2 种基金the National Key Scientific Instrument and Equipment Development Project (No. 2013YQ040815)the Specialized Research Fund for the Doctoral Program of Higher Education (No. 20122304110022)the Heilongjiang Provincial Natural Science Foundation (No. ZD201205)
文摘We propose an ultra-simple dual-channel configuration for simultaneously evaluating two branches of a multifunctional integrated optic chip(MFIOC). In the configuration, the MFIOC is employed as a beam splitter to construct the demodulation interferometer together with a 2 × 2 fiber coupler. Interference happens between polarization modes traveling through different channels of the MFIOC. The cross-couplings of each channel are respectively characterized by the interference peaks which distribute on opposite sides of the central interference peak. Temperature responses of the MFIOC are experimentally measured from-40°C to 80°C. Results show that the proposed configuration can achieve simultaneous dual-channel transient measurements with resolution of-90 d B and dynamic range of 90 d B. In addition, the two channels of the configuration have consistent measuring performance, and the two branches of the MFIOC have different responses to temperature variation.
基金supported by the Fund of State Key Laboratory of Information Photonics and Optical Communications(No.IPOC2016ZT10)the National Natural Science Foundation of China(Nos.61574019,61674020,and 61674018)+1 种基金the Specialized Research Fund for the Doctoral Program of Higher Education of China(No.20130005130001)the 111 Project(No.B07005)
文摘In this Letter, a pair of integrated optoelectronic transceiving chips is proposed. They are constructed by integrating a vertical cavity surface emitting laser unit above a positive-intrinsic-negative photodetector unit. One of the transceiving chips emits light at the wavelength of 848.1 nm with a threshold current of 0.8 mA and a slope efficiency of 0.81 W/A. It receives light between 801 and 814 nm with a quantum efficiency of higher than 70%. On its counterpart, the other one of the transceiving chips emits light at the wavelength of 805.3 nm with a threshold current of 1.1 mA and a slope efficiency of 0.86 W/A. It receives light between 838 and 855 nm with a quantum efficiency of higher than 70%. The proposed pair of integrated optoelectronic transceiving chips can work full-duplex with each other, and they can be applied to single fiber bidirectional optical interconnects.
基金supported in part by the National Natural Science Foundation of China(No.61306027)
文摘The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power management module.The main receiver adopts a unified simplified synchronization method and channel codec with proactive Reed-Solomon Bypass technique,which increases the robustness and energy efficiency of receiver.The WUI receiver specifies the communication node and wakes up the transceiver to reduce average power consumption of the transceiver.The embedded NVM can backup/restore the states information of processor that avoids the loss of the state information caused by power failure and reduces the unnecessary power of repetitive computation when the processor is waked up from power down mode.The baseband processor is designed and verified on a FPGA board.The simulated power consumption of processor is 5.1uW for transmitting and 28.2μW for receiving.The WUI receiver technique reduces the average power consumption of transceiver remarkably.If the transceiver operates 30 seconds in every 15 minutes,the average power consumption of the transceiver can be reduced by two orders of magnitude.The NVM avoids the loss of the state information caused by power failure and energy waste caused by repetitive computation.
基金supported by the National"863"Program of China under Grant No.2008AA01Z130
文摘A digital still camera image processing system on a chip, different from the video camera system, is pre- sented for mobile phone to reduce the power consumption and size. A new color interpolation algorithm is proposed to enhance the image quality. The system can also process fixed patten noise （FPN） reduction, color correction, gamma correction, RGB/YUV space transfer, etc. The chip is controlled by sensor regis- ters by inter-integrated circuit （I2C） interface. The voltage for both the front-end analog and the pad cir- cuits is 2.8 V, and the volatge for the image signal processing is 1.8 V. The chip running under the external 13.5-MHz clock has a video data rate of 30 frames/s and the measured power dissipation is about 75 roW.
基金upported by the National Key Research and Development Program of China(Nos.2022YFB2804301 and 2021YFB2802000)the Science and Technology Commission of Shanghai Municipality(No.21DZ1100500)+2 种基金the Shanghai Municipal Science and Technology Major Projectthe Shanghai Frontiers Science Center Program(2021–2025 No.20)the Shanghai Sailing Program(No.23YF1429500).
文摘Research in the ocean places high demands on chips'robustness,speed,and energy consumption.Diffractive neural networks(DNNs)enable direct optical image processing at light speed,with great potential for underwater applications.Here,we experimentally demonstrate a compact DNN chip capable of operating directly in both water and air by multiobjective training and initial training value optimization.The two layers of DNNs are integrated on the two surfaces of a quartz plate,respectively.The chip achieved high accuracies above 90%in recognition tasks for handwritten digits and fashion products.The architecture and material ensure the chip's high stability for long-term underwater use.
基金Natural Science Foundation of Hebei Province(F2024201002)Interdisciplinary Research Program of Natural Science of Hebei University(DXK202204)Research Start-up Foundation of High-Level Talents Introduction(8012605)。
文摘Linearly chirped microwave waveforms(LCMWs)are indispensable in advanced radar systems.Our study introduces and validates,through extensive experimentation,the innovative application of a thin-film lithium niobate(TFLN)photonic integrated circuit(PIC)to realize a Fourier domain mode-locked optoelectronic oscillator(FDML OEO)for generating high-precision LCMW signals.This integrated chip combines a phase modulator(PM)and an electrically tuned notch micro-ring resonator(MRR),which functions as a rapidly tunable bandpass filter,facilitating the essential phase-to-intensity modulation(PM-IM)conversion for OEO oscillation.By synchronizing the modulation period of the applied driving voltage to the MRR with the OEO loop delay,we achieve Fourier domain mode-locking,producing LCMW signals with an impressive tunable center frequency range of18.55 GHz to 23.59 GHz,an adjustable sweep bandwidth from 3.85 GHz to 8.5 GHz,and a remarkable chirp rate up to 3.22 GHz/μs.Unlike conventional PM-IM based FDML OEOs,our device obviates the need for expensive tunable lasers or microwave sources,positioning it as a practical solution for generating high-frequency LCMW signals with extended sweep bandwidth and high chirp rates,all within a compact and cost-efficient form factor.
基金supported by the National Key R&D Program of China under Grant(2019YFA0706301)the Key Project in Broadband Communication and New Network of the Ministry of Science and Technology(MOST)(2018YFB1801003)+1 种基金the National Science Foundation of China(NSFC)(U2001601,61975242,61525502,62175095,62375292)the Natural Science Foundation of Guangdong Province for Distinguished Young Scholars(2023B1515020028).
文摘High-quality photonic materials are critical for promoting integrated photonic devices with broad bandwidths,high efficiencies,and flexibilities for high-volume chip-scale fabrication.Recently,we designed a home-developed chalcogenide glass(ChG)-Ge_(25)Sb_(10)S_(65)(GeSbS)for optical information processing chips and systems,which featured an ultrabroad transmission window,a high Kerr nonlinearity and photoelastic coefficient,and compatibility with the photonic hybrid integration technology of silicon photonics.Chip-integrated GeSbS microresonators and microresonator arrays with high quality factors and lithographically controlled fine structures were fabricated using a modified nanofabrication process.Moreover,considering the high Kerr nonlinearity and photoelastic effect of ChGs,we realised a novel ChG hybrid integrated chip,inspired by recent advances in integrated soliton microcombs and acousto-optic(AO)modulators.
文摘Universal conservation laws of wave–particle–entanglement triad,which describe relations between the wave–particle duality of a quantum system and its entanglement with an ancilla quantum memory,are proposed and further demonstrated with silicon-integrated nanophotonic chips.
基金supported by Ministry of Science and Technology of China(2010CB933901)Science and Technology Innovation Fund of SJTU-University of Michigan。
文摘The microfluidic polymerase chain reaction(PCR)chips have undergone extensive development and nowadays have become an important domain of miniaturization technology application.Here,we review the advances of microfluidic PCR chips over the past years,from the first single chamber stationary PCR chip to the new SlipChip PCR.First,the three distinct types of microfluidic PCR chips are discussed,including chamber stationary PCR chips,flow-through PCR chips and convection PCR chips.Then we focus on droplet PCR chips and SlipChip PCR.Although they are at an early stage,they show the great potential for high-throughput PCR and robust chip.Finally,general discussions on integrated chips are given.The low cost,portable,high-throughout integrated PCR chips will certainly be further developed in spite of many challenges.
