Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose （TID） effect. However, their capability of resisting the hot carrie...Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose （TID） effect. However, their capability of resisting the hot carrier effect （HCE） has also been proven to be very weak. In this paper, the reason why the annular gate nMOSFETs have good TID but bad HCE resistance is discussed in detail, and an improved design to locate the source contacts only along one side of the annular gate is used to weaken the HCE degradation. The good TID and HCE hardened capability of the design are verified by the experiments for I/O and core nMOSFETs in a 0.18 μm bulk CMOS technology. In addition, the shortcoming of this design is also discussed and the TID and the HCE characteristics of the replacers （the annular source nMOSFETs） are also studied to provide a possible alternative for the designers.展开更多
The 1/fγ noise characteristic parameter Sfγ model in an n-MOSFET under DC hot carrier stress is studied. A method characterizing the MOSFET abilities of an anti-hot carrier with noise parameter Sfγ is presented. Th...The 1/fγ noise characteristic parameter Sfγ model in an n-MOSFET under DC hot carrier stress is studied. A method characterizing the MOSFET abilities of an anti-hot carrier with noise parameter Sfγ is presented. The hot carrier degradation effect of n-MOSFET in high-,mid-,and low gate stresses and its 1/fγ noise feature are studied. Experimental results agree well with the developed model.展开更多
The hot carrier effect （HCE） of an ultra-deep sub-micron p-channel metal–oxide semiconductor field-effect transistor （pMOSFET） is investigated in this paper. Experiments indicate that the generation of positively...The hot carrier effect （HCE） of an ultra-deep sub-micron p-channel metal–oxide semiconductor field-effect transistor （pMOSFET） is investigated in this paper. Experiments indicate that the generation of positively charged interface states is the predominant mechanism in the case of the ultra-deep sub-micron pMOSFET. The relation of the pMOSFET hot carrier degradation to stress time （t）, channel width （W ）, channel length （L）, and stress voltage （Vd ） is then discussed. Based on the relation, a lifetime prediction model is proposed, which can predict the lifetime of the ultra-deep sub-micron pMOSFET accurately and reflect the influence of the factors on hot carrier degradation directly.展开更多
Hot carrier injection （HCI） at high temperatures and different values of gate bias Vg has been performed in order to study the actions of negative bias temperature instability （NBTI） and hot carriers. Hot-carrier-...Hot carrier injection （HCI） at high temperatures and different values of gate bias Vg has been performed in order to study the actions of negative bias temperature instability （NBTI） and hot carriers. Hot-carrier-stress-induced damage at Vg = Vd, where Vd is the voltage of the transistor drain, increases as temperature rises, contrary to conventional hot carrier behaviour, which is identified as being related to the NBTI. A comparison between the actions of NBTI and hot carriers at low and high gate voltages shows that the damage behaviours are quite different： the low gate voltage stress results in an increase in transconductance, while the NBTI-dominated high gate voltage and high temperature stress causes a decrease in transconductance. It is concluded that this can be a major source of hot carrier damage at elevated temperatures and high gate voltage stressing of p-channel metal-oxide-semiconductor field-effect transistors （PMOSFETs）. We demonstrate a novel mode of NBTI-enhanced hot carrier degradation in PMOSFETs. A novel method to decouple the actions of NBTI from that of hot carriers is also presented.展开更多
Grooved gate structure Metal-Oxide-Semiconductor (MOS) device is consideredas the most promising candidate used in deep and super-deep sub-micron region, for it cansuppress hot carrier effect and short channel effect ...Grooved gate structure Metal-Oxide-Semiconductor (MOS) device is consideredas the most promising candidate used in deep and super-deep sub-micron region, for it cansuppress hot carrier effect and short channel effect deeply. Based on the hydrodynamic energytransport model, using two-dimensional device simulator Medici, the relation between structureparameters and hot carrier effect immunity for deep-sub-micron N-channel MOSFET's is studiedand compared with that of counterpart conventional planar device in this paper. The examinedstructure parameters include negative junction depth, concave corner and effective channel length.Simulation results show that grooved gate device can suppress hot carrier effect deeply even indeep sub-micron region. The studies also indicate that hot carrier effect is strongly influencedby the concave corner and channel length for grooved gate device. With the increase of concavecorner, the hot carrier effect in grooved gate MOSFET decreases sharply, and with the reducingof effective channel length, the hot carrier effect becomes large.展开更多
Although hot carriers induced degradation of NMOSFETs has been studied for decades, the role of hot electron in this process is still debated. In this paper, the additional substrate hot electrons have been intentiona...Although hot carriers induced degradation of NMOSFETs has been studied for decades, the role of hot electron in this process is still debated. In this paper, the additional substrate hot electrons have been intentionally injected into the oxide layer to analyze tile role of hot electron in hot carrier degradation. The enhanced degradation and the decreased time exponent appear with the injected hot electrons increasing, the degradation increases from 21.80% to 62.00% and the time exponent decreases from 0.59 to 0.27 with Vb decreasing from 0 V to -4 V, at the same time, the recovery also becomes remarkable and which strongly depends on the post stress gate bias Vg. Based on the experimental results, more unrecovered interface traps are created by the additional injected hot electron from the breaking Si-H bond, but the oxide trapped negative charges do not increase after a rapid recovery.展开更多
Hot carrier effects of p MOSFETs with different oxide thicknesses are studied in low gate voltage range.All electrical parameters follow a power law relationship with stress time,but degradation slope is dependent ...Hot carrier effects of p MOSFETs with different oxide thicknesses are studied in low gate voltage range.All electrical parameters follow a power law relationship with stress time,but degradation slope is dependent on gate voltage.For the devices with thicker oxides,saturated drain current degradation has a close relationship with the product of gate current and electron fluence.For small dimensional devices,saturated drain current degradation has a close relationship with the electron fluence.This degradation model is valid for p MOSFETs with 0 25μm channel length and different gate oxide thicknesses.展开更多
Stress-induced leakage current (SILC) of ultrathin gate oxide is investigated by observing the generation of interface traps for n-MOSFET and p-MOSFET under hot-carrier stress.It is found experimentally that there is ...Stress-induced leakage current (SILC) of ultrathin gate oxide is investigated by observing the generation of interface traps for n-MOSFET and p-MOSFET under hot-carrier stress.It is found experimentally that there is linear correlation between the generation of interface traps and SILC for both types of MOSFET with different channel lengths (including 1,0.5,0.275,and 0.135μm) and different gate oxide thickness (4nm and 2.5nm).These experimental evidences show that the SILC has a strong dependence on interface traps.展开更多
The front gate interface and oxide traps induced by hot carrier stress in SOI NMOSFETs are studied.Based on a new forward gated diode technique,the R G current originating from the front interface traps is me...The front gate interface and oxide traps induced by hot carrier stress in SOI NMOSFETs are studied.Based on a new forward gated diode technique,the R G current originating from the front interface traps is measured,and then the densities of the interface and oxide traps are separated independently.The experimental results show that the hot carrier stress of front channel not only results in the strong generation of the front interface traps,but also in the significant oxide traps.These two kinds of traps have similar characteristic in increasing with the hot carrier stress time.This analysis allows one to obtain a clear physical picture of the effects of the hot carrier stress on the generating of interface and oxide traps,which help to understand the degradation and reliability of the SOI MOSFETs.展开更多
Hot carrier induced (HCI) degradation of surface channel n MOSFETs with different oxide thicknesses is investigated under maximum substrate current condition.Results show that the key parameters m and n of H...Hot carrier induced (HCI) degradation of surface channel n MOSFETs with different oxide thicknesses is investigated under maximum substrate current condition.Results show that the key parameters m and n of Hu's lifetime prediction model have a close relationship with oxide thickness.Furthermore,a linear relationship is found between m and n .Based on this result,the lifetime prediction model can be expended to the device with thinner oxides.展开更多
Recent breakthroughs in hot carrier(HC)cooling dynamics within halide perovskite nanocrystals(NCs)have positioned them as promising candidates for next-generation optoelectronic applications.Therefore,it is of great i...Recent breakthroughs in hot carrier(HC)cooling dynamics within halide perovskite nanocrystals(NCs)have positioned them as promising candidates for next-generation optoelectronic applications.Therefore,it is of great importance to systematically summarize advances in understanding and controlling HC relaxation mechanisms.Here,we offer an overview of advances in the understanding of the HC cooling process in perovskite NCs,with a focus on influences of excitation energy,excitation intensity,composition,size,dimensionality,doping,and core-shell structure on the HC cooling times.Finally,we propose suggestions for future investigations into the HC cooling process in perovskite NCs.展开更多
A new improved technique,based on the direct current current voltage and charge pumping methods,is proposed for measurements of interface traps density in the channel and the drain region for LDD n MOSFET.This tech...A new improved technique,based on the direct current current voltage and charge pumping methods,is proposed for measurements of interface traps density in the channel and the drain region for LDD n MOSFET.This technique can be applied to virgin samples and those subjected to hot carrier stress,and the latter are known to cause the interface damage in the drain region and the channel region.The generation of interface traps density in the channel region and in the drain region can be clearly distinguished by using this technique.展开更多
Hot carrier effect（HCE） is studied on annular NMOS and two-edged NMOS such as H-shape gate NMOS, T-shape gate NMOS and common two-edged NMOS.Based on the chemical reaction equation of HCE degradation and a geometry ...Hot carrier effect（HCE） is studied on annular NMOS and two-edged NMOS such as H-shape gate NMOS, T-shape gate NMOS and common two-edged NMOS.Based on the chemical reaction equation of HCE degradation and a geometry dependent reaction diffusion equation,a HCE degradation model for annular NMOS and two-edged NMOS is proposed.According to this model,we conclude that the time exponent of the threshold voltage degradation depends on the configuration of the gate,and annular NMOS has more serious HCE degradation than two-edged NMOS.The design,fabrication and HCE experiments of these NMOS in a 0.5-μm PD SOI process verify the correctness of the conclusion.展开更多
Two layout and process key parameters for improving high voltage nLEDMOS （n-type lateral extended drain MOS） transistor hot carrier performance have been identified. Increasing the space between Hv-pwell and n-drift...Two layout and process key parameters for improving high voltage nLEDMOS （n-type lateral extended drain MOS） transistor hot carrier performance have been identified. Increasing the space between Hv-pwell and n-drift region and reducing the n-drift implant dose can dramatically reduce the device hot carder degradations, for the maximum impact ionization rate near the Bird Beak decreases or its location moves away from the Si/SiO2 interface. This conclusion has been analyzed in detail by using the MEDICI simulator and it is also confirmed by the test results.展开更多
Ultra-thin-body （UTB） In0.53Ga0.47As-on-insulator （In0.53Ga0.47As-OI） structures with thicknesses of 8 and 15nm are realized by transferring epitaxially grown In0.53Ga0.47As layers to silicon substrates with 15-nm...Ultra-thin-body （UTB） In0.53Ga0.47As-on-insulator （In0.53Ga0.47As-OI） structures with thicknesses of 8 and 15nm are realized by transferring epitaxially grown In0.53Ga0.47As layers to silicon substrates with 15-nmthick A12 03 as a buried oxide by using the direct wafer bonding method. Back gate n-channel metal-oxidesemiconductor field-effect transistors （nMOSFETs） are fabricated by using these In0.53Ga0.47As-OI structures with excellent electrical characteristics. Positive bias temperature instability （PBTI） and hot carrier injection （HCI） characterizations are performed for the In0.53Ga0.47As-OI nMOSFETs. It is confirmed that the In0.53Ga0.47 As-OI nMOSFETs with a thinner body thickness suffer from more severe degradations under both PBTI and HCr stresses. Moreover, the different evolutions of the threshold voltage and the saturation current of the UTB In0.53Ga0.47As-OI nMOSFETs may be due to the slow border traps.展开更多
Atomic-layer MoS_2 ultrathin films are synthesized using a hot filament chemical vapor deposition method. A combination of atomic force microscopy（AFM）, x-ray diffraction（XRD）, high-resolution transition electron ...Atomic-layer MoS_2 ultrathin films are synthesized using a hot filament chemical vapor deposition method. A combination of atomic force microscopy（AFM）, x-ray diffraction（XRD）, high-resolution transition electron microscopy（HRTEM）, photoluminescence（PL）, and x-ray photoelectron spectroscopy（XPS） characterization methods is applied to investigate the crystal structures, valence states, and compositions of the ultrathin film areas. The nucleation particles show irregular morphology, while for a larger size somewhere, the films are granular and the grains have a triangle shape. The films grow in a preferred orientation（002）. The HRTEM images present the graphene-like structure of stacked layers with low density of stacking fault, and the interlayer distance of plane is measured to be about 0.63 nm. It shows a clear quasihoneycomb-like structure and 6-fold coordination symmetry. Room-temperature PL spectra for the atomic layer MoS_2 under the condition of right and left circular light show that for both cases, the A1 and B1 direct excitonic transitions can be observed. In the meantime, valley polarization resolved PL spectra are obtained. XPS measurements provide high-purity samples aside from some contaminations from the air, and confirm the presence of pure MoS_2. The stoichiometric mole ratio of S/Mo is about 2.0–2.1, suggesting that sulfur is abundant rather than deficient in the atomic layer MoS_2 under our experimental conditions.展开更多
In this paper, we have studied hot carrier injection （HCI） different degradations are obtained from the experiment results. under alternant stress. Under different stress modes, The different alternate stresses can ...In this paper, we have studied hot carrier injection （HCI） different degradations are obtained from the experiment results. under alternant stress. Under different stress modes, The different alternate stresses can reduce or enhance the HC effect, which mainly depends on the latter condition of the stress cycle. In the stress mode A （DC stress with electron injection）, the degradation keeps increasing. In the stress modes B （DC stress and then stress with the smMlest gate injection） and C （DC stress and then stress with hole injection under Vg = 0 V and Vd = 1.8 V）, recovery appears in the second stress period. And in the stress mode D （DC stress and then stress with hole injection under Vg = -1.8 V and Vd = 1.8 V）, as the traps filled in by holes can be smaller or greater than the generated interface states, the continued degradation or recovery in different stress periods can be obtained.展开更多
MoS2 nanodots are emerging as promising semiconductor materials for optoelectronic devices. However, most of the recent attention is focused on the fabrication of MoS2 nanodots,and the survey for exciton dynamics of M...MoS2 nanodots are emerging as promising semiconductor materials for optoelectronic devices. However, most of the recent attention is focused on the fabrication of MoS2 nanodots,and the survey for exciton dynamics of MoS2 nanodots remains less explored. Herein, we use femtosecond transient absorption spectroscopy to investigate the carrier dynamics of MoS2 nanodots. Our results show that defect-assisted carrier recombination processes are well consistent with the observed dynamics. The photo-excited carriers are captured by defects with at least two different capture rates via Auger scattering. Four processes are deemed to take part in the carrier relaxation. After photoexcitation, carrier cooling occurs instantly within ～0.5 ps. Then most of carriers are fast captured by the defects, and the corresponding time constant increases from ～4.9 ps to ～9.2 ps with increasing pump fluence, which may be interpreted by saturation of the defect states. Next a small quantity of carriers is captured by the other kinds of defects with a relatively slow carrier capture time within ～65 ps.Finally, the remaining small fraction of carriers relaxes via direct interband electron-hole recombination within～1 ns. Our results may lead to deep insight into the fundamentals of carrier dynamics in MoS2 nanodots, paving the way for their further applications.展开更多
Understanding the role of perovskite surface passivators in hot carriers transfer dynamics is important to develop highly efficient perovskite solar cells(PSCs).In this work,we have designed and synthesized a naphthal...Understanding the role of perovskite surface passivators in hot carriers transfer dynamics is important to develop highly efficient perovskite solar cells(PSCs).In this work,we have designed and synthesized a naphthalimide-based organic small molecule(NCN)for perovskite surface defect passivator.We reveal that the introduction of NCN not only reduces the density of perovskite defect-state,but also promotes hot carriers(HCs)cooling in perovskite through the transient absorption spectroscopy measurements.Fast HCs cooling permits HCs transfer from perovskite layer into NCN layer,thus resulting in the decreased charge-carrier recombination in NCN-treated device.As expected,the power conversion efficiency(PCE)of PSCs with NCN is enhanced to 22.02%from 19.95%for the control device.The findings are relevant for developing highly efficient PSCs.展开更多
The conversion efficiency of energy-harvesting devices can be increased by utilizing hot-carriers(HCs).However,due to ultrafast carrier-carrier scattering and the lack of carrier injection dynamics,HC-based devices ha...The conversion efficiency of energy-harvesting devices can be increased by utilizing hot-carriers(HCs).However,due to ultrafast carrier-carrier scattering and the lack of carrier injection dynamics,HC-based devices have low efficiencies.In the present work,we report the effective utilization of HCs at the nanoscale and their transfer dynamics from a non-noble metal to a metal oxide interface by means of real-space photocurrent mapping by using local probe techniques and conducting femtosecond transient absorption(TA)measurements.The photocurrent maps obtained under white light unambiguously show that the HCs are injected into the metal oxide layer from the TiN layer,as also confirmed by conductive atomic force microscopy.In addition,the increased photocurrent in the bilayer structure indicates the injection of HCs from both layers due to the broadband absorption efficiency of TiN layer,passivation of the surface states by the top TiN layer,and smaller barrier height of the interfaces.Furthermore,electrostatic force microscopy and Kelvin probe force microscopy provide direct evidence of charge injection from TiN to the MoO_(x)film at the nanoscale.The TA absorption spectra show a strong photo-bleaching signal over wide spectral range and ultrafast decaying behavior at the picosecond time scale,which indicate efficient electron transfer from TiN to MoO_(x).Thus,our simple and effective approach can facilitate HC collection under white light,thereby achieving high conversion efficiency for optoelectronic devices.展开更多
基金supported by the Key Program of the National Natural Science Foundation of China(Grant No.60836004)the National Natural Science Foundation of China(Grant Nos.61006070 and 61076025)
文摘Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose （TID） effect. However, their capability of resisting the hot carrier effect （HCE） has also been proven to be very weak. In this paper, the reason why the annular gate nMOSFETs have good TID but bad HCE resistance is discussed in detail, and an improved design to locate the source contacts only along one side of the annular gate is used to weaken the HCE degradation. The good TID and HCE hardened capability of the design are verified by the experiments for I/O and core nMOSFETs in a 0.18 μm bulk CMOS technology. In addition, the shortcoming of this design is also discussed and the TID and the HCE characteristics of the replacers （the annular source nMOSFETs） are also studied to provide a possible alternative for the designers.
文摘The 1/fγ noise characteristic parameter Sfγ model in an n-MOSFET under DC hot carrier stress is studied. A method characterizing the MOSFET abilities of an anti-hot carrier with noise parameter Sfγ is presented. The hot carrier degradation effect of n-MOSFET in high-,mid-,and low gate stresses and its 1/fγ noise feature are studied. Experimental results agree well with the developed model.
基金Project supported by the National Basic Research Program of China (Grant No. 2011CBA00606)the National Natural Science Foundation of China (Grant No. 61106106)the Fundamental Research Funds for the Central Universities, China (Grant No. K50510250006)
文摘The hot carrier effect （HCE） of an ultra-deep sub-micron p-channel metal–oxide semiconductor field-effect transistor （pMOSFET） is investigated in this paper. Experiments indicate that the generation of positively charged interface states is the predominant mechanism in the case of the ultra-deep sub-micron pMOSFET. The relation of the pMOSFET hot carrier degradation to stress time （t）, channel width （W ）, channel length （L）, and stress voltage （Vd ） is then discussed. Based on the relation, a lifetime prediction model is proposed, which can predict the lifetime of the ultra-deep sub-micron pMOSFET accurately and reflect the influence of the factors on hot carrier degradation directly.
基金Project supported by the National Natural Science Foundation of China （Grant No 60206006）. the Program for New Century Excellent Talents of Ministry of Education of China （Grant No 681231366）. the National Defense Pre-Research Foundation of China （Grant No 51408010305DZ0168） and the Key Project of Chinese Ministry of Education （Grant No 104172）.
文摘Hot carrier injection （HCI） at high temperatures and different values of gate bias Vg has been performed in order to study the actions of negative bias temperature instability （NBTI） and hot carriers. Hot-carrier-stress-induced damage at Vg = Vd, where Vd is the voltage of the transistor drain, increases as temperature rises, contrary to conventional hot carrier behaviour, which is identified as being related to the NBTI. A comparison between the actions of NBTI and hot carriers at low and high gate voltages shows that the damage behaviours are quite different： the low gate voltage stress results in an increase in transconductance, while the NBTI-dominated high gate voltage and high temperature stress causes a decrease in transconductance. It is concluded that this can be a major source of hot carrier damage at elevated temperatures and high gate voltage stressing of p-channel metal-oxide-semiconductor field-effect transistors （PMOSFETs）. We demonstrate a novel mode of NBTI-enhanced hot carrier degradation in PMOSFETs. A novel method to decouple the actions of NBTI from that of hot carriers is also presented.
基金Supported by the National Defense Preresearch Fund Program(No.99J8.1.1.DZD132)
文摘Grooved gate structure Metal-Oxide-Semiconductor (MOS) device is consideredas the most promising candidate used in deep and super-deep sub-micron region, for it cansuppress hot carrier effect and short channel effect deeply. Based on the hydrodynamic energytransport model, using two-dimensional device simulator Medici, the relation between structureparameters and hot carrier effect immunity for deep-sub-micron N-channel MOSFET's is studiedand compared with that of counterpart conventional planar device in this paper. The examinedstructure parameters include negative junction depth, concave corner and effective channel length.Simulation results show that grooved gate device can suppress hot carrier effect deeply even indeep sub-micron region. The studies also indicate that hot carrier effect is strongly influencedby the concave corner and channel length for grooved gate device. With the increase of concavecorner, the hot carrier effect in grooved gate MOSFET decreases sharply, and with the reducingof effective channel length, the hot carrier effect becomes large.
基金supported by the National Natural Science Foundation of China(Grant No.61376109)the Opening Project of National Key Laboratory of Science and Technology on Reliability Physics and Application Technology of Electrical Component,China(Grant No.ZHD201202)
文摘Although hot carriers induced degradation of NMOSFETs has been studied for decades, the role of hot electron in this process is still debated. In this paper, the additional substrate hot electrons have been intentionally injected into the oxide layer to analyze tile role of hot electron in hot carrier degradation. The enhanced degradation and the decreased time exponent appear with the injected hot electrons increasing, the degradation increases from 21.80% to 62.00% and the time exponent decreases from 0.59 to 0.27 with Vb decreasing from 0 V to -4 V, at the same time, the recovery also becomes remarkable and which strongly depends on the post stress gate bias Vg. Based on the experimental results, more unrecovered interface traps are created by the additional injected hot electron from the breaking Si-H bond, but the oxide trapped negative charges do not increase after a rapid recovery.
文摘Hot carrier effects of p MOSFETs with different oxide thicknesses are studied in low gate voltage range.All electrical parameters follow a power law relationship with stress time,but degradation slope is dependent on gate voltage.For the devices with thicker oxides,saturated drain current degradation has a close relationship with the product of gate current and electron fluence.For small dimensional devices,saturated drain current degradation has a close relationship with the electron fluence.This degradation model is valid for p MOSFETs with 0 25μm channel length and different gate oxide thicknesses.
文摘Stress-induced leakage current (SILC) of ultrathin gate oxide is investigated by observing the generation of interface traps for n-MOSFET and p-MOSFET under hot-carrier stress.It is found experimentally that there is linear correlation between the generation of interface traps and SILC for both types of MOSFET with different channel lengths (including 1,0.5,0.275,and 0.135μm) and different gate oxide thickness (4nm and 2.5nm).These experimental evidences show that the SILC has a strong dependence on interface traps.
文摘The front gate interface and oxide traps induced by hot carrier stress in SOI NMOSFETs are studied.Based on a new forward gated diode technique,the R G current originating from the front interface traps is measured,and then the densities of the interface and oxide traps are separated independently.The experimental results show that the hot carrier stress of front channel not only results in the strong generation of the front interface traps,but also in the significant oxide traps.These two kinds of traps have similar characteristic in increasing with the hot carrier stress time.This analysis allows one to obtain a clear physical picture of the effects of the hot carrier stress on the generating of interface and oxide traps,which help to understand the degradation and reliability of the SOI MOSFETs.
文摘Hot carrier induced (HCI) degradation of surface channel n MOSFETs with different oxide thicknesses is investigated under maximum substrate current condition.Results show that the key parameters m and n of Hu's lifetime prediction model have a close relationship with oxide thickness.Furthermore,a linear relationship is found between m and n .Based on this result,the lifetime prediction model can be expended to the device with thinner oxides.
基金supported by the National Natural Science Foundation of China(Grant Nos.62475169 and 62174079)the Guangdong Basic and Applied Basic Research Foundation(Grant No.2025A1515011195)+2 种基金the Guangdong Provincial Quantum Science Strategic Initiative(Grant No.GDZX2404006)the Shenzhen Science and Technology Program(Grant Nos.JCYJ20240813143212016 and JCYJ20231122200233001)the Post-doctoral Later-stage Foundation Project of Shenzhen Polytechnic University(Grant No.6024271003K)。
文摘Recent breakthroughs in hot carrier(HC)cooling dynamics within halide perovskite nanocrystals(NCs)have positioned them as promising candidates for next-generation optoelectronic applications.Therefore,it is of great importance to systematically summarize advances in understanding and controlling HC relaxation mechanisms.Here,we offer an overview of advances in the understanding of the HC cooling process in perovskite NCs,with a focus on influences of excitation energy,excitation intensity,composition,size,dimensionality,doping,and core-shell structure on the HC cooling times.Finally,we propose suggestions for future investigations into the HC cooling process in perovskite NCs.
文摘A new improved technique,based on the direct current current voltage and charge pumping methods,is proposed for measurements of interface traps density in the channel and the drain region for LDD n MOSFET.This technique can be applied to virgin samples and those subjected to hot carrier stress,and the latter are known to cause the interface damage in the drain region and the channel region.The generation of interface traps density in the channel region and in the drain region can be clearly distinguished by using this technique.
基金Project supported by the Key Program of the National Natural Science Foundation of China(No.60836004)the Ministry of Education Creative Team Research Project,China.
文摘Hot carrier effect（HCE） is studied on annular NMOS and two-edged NMOS such as H-shape gate NMOS, T-shape gate NMOS and common two-edged NMOS.Based on the chemical reaction equation of HCE degradation and a geometry dependent reaction diffusion equation,a HCE degradation model for annular NMOS and two-edged NMOS is proposed.According to this model,we conclude that the time exponent of the threshold voltage degradation depends on the configuration of the gate,and annular NMOS has more serious HCE degradation than two-edged NMOS.The design,fabrication and HCE experiments of these NMOS in a 0.5-μm PD SOI process verify the correctness of the conclusion.
基金supported by the National High Technology Research and Development Program of China (No. 2004AA1Z1060).
文摘Two layout and process key parameters for improving high voltage nLEDMOS （n-type lateral extended drain MOS） transistor hot carrier performance have been identified. Increasing the space between Hv-pwell and n-drift region and reducing the n-drift implant dose can dramatically reduce the device hot carder degradations, for the maximum impact ionization rate near the Bird Beak decreases or its location moves away from the Si/SiO2 interface. This conclusion has been analyzed in detail by using the MEDICI simulator and it is also confirmed by the test results.
基金Supported by the National Program on Key Basic Research Project of China under Grant No 2011CBA00607the National Natural Science Foundation of China under Grant Nos 61106089 and 61376097the Zhejiang Provincial Natural Science Foundation of China under Grant No LR14F040001
文摘Ultra-thin-body （UTB） In0.53Ga0.47As-on-insulator （In0.53Ga0.47As-OI） structures with thicknesses of 8 and 15nm are realized by transferring epitaxially grown In0.53Ga0.47As layers to silicon substrates with 15-nmthick A12 03 as a buried oxide by using the direct wafer bonding method. Back gate n-channel metal-oxidesemiconductor field-effect transistors （nMOSFETs） are fabricated by using these In0.53Ga0.47As-OI structures with excellent electrical characteristics. Positive bias temperature instability （PBTI） and hot carrier injection （HCI） characterizations are performed for the In0.53Ga0.47As-OI nMOSFETs. It is confirmed that the In0.53Ga0.47 As-OI nMOSFETs with a thinner body thickness suffer from more severe degradations under both PBTI and HCr stresses. Moreover, the different evolutions of the threshold voltage and the saturation current of the UTB In0.53Ga0.47As-OI nMOSFETs may be due to the slow border traps.
基金Project supported by the Natural Science Foundation of Zhejiang Province,China(Grant Nos.LY16F040003 and LY16A040007)the National Natural Science Foundation of China(Grant Nos.51401069 and 11574067)
文摘Atomic-layer MoS_2 ultrathin films are synthesized using a hot filament chemical vapor deposition method. A combination of atomic force microscopy（AFM）, x-ray diffraction（XRD）, high-resolution transition electron microscopy（HRTEM）, photoluminescence（PL）, and x-ray photoelectron spectroscopy（XPS） characterization methods is applied to investigate the crystal structures, valence states, and compositions of the ultrathin film areas. The nucleation particles show irregular morphology, while for a larger size somewhere, the films are granular and the grains have a triangle shape. The films grow in a preferred orientation（002）. The HRTEM images present the graphene-like structure of stacked layers with low density of stacking fault, and the interlayer distance of plane is measured to be about 0.63 nm. It shows a clear quasihoneycomb-like structure and 6-fold coordination symmetry. Room-temperature PL spectra for the atomic layer MoS_2 under the condition of right and left circular light show that for both cases, the A1 and B1 direct excitonic transitions can be observed. In the meantime, valley polarization resolved PL spectra are obtained. XPS measurements provide high-purity samples aside from some contaminations from the air, and confirm the presence of pure MoS_2. The stoichiometric mole ratio of S/Mo is about 2.0–2.1, suggesting that sulfur is abundant rather than deficient in the atomic layer MoS_2 under our experimental conditions.
基金supported by the National Key Science and Technology Special Project,China (Grant No. 2008ZX01002-002)the grant from the Major State Basic Research Development Program of China (973 Program,No. 2011CB309606)the Fundamental Research Funds for the Central Universities (Grant No. JY10000904009)
文摘In this paper, we have studied hot carrier injection （HCI） different degradations are obtained from the experiment results. under alternant stress. Under different stress modes, The different alternate stresses can reduce or enhance the HC effect, which mainly depends on the latter condition of the stress cycle. In the stress mode A （DC stress with electron injection）, the degradation keeps increasing. In the stress modes B （DC stress and then stress with the smMlest gate injection） and C （DC stress and then stress with hole injection under Vg = 0 V and Vd = 1.8 V）, recovery appears in the second stress period. And in the stress mode D （DC stress and then stress with hole injection under Vg = -1.8 V and Vd = 1.8 V）, as the traps filled in by holes can be smaller or greater than the generated interface states, the continued degradation or recovery in different stress periods can be obtained.
基金supported by the National Natural Science Foundation of China (No.11674128, No.21403232, No.11474129,and No.11504129)the Jilin Province Scientific and Technological Development Program, China (Grant No. 20170101063JC)the Thirteenth Five-Year Scientific and Technological Research Project of the Education Department of Jilin Province, China(2016, No. 400)
文摘MoS2 nanodots are emerging as promising semiconductor materials for optoelectronic devices. However, most of the recent attention is focused on the fabrication of MoS2 nanodots,and the survey for exciton dynamics of MoS2 nanodots remains less explored. Herein, we use femtosecond transient absorption spectroscopy to investigate the carrier dynamics of MoS2 nanodots. Our results show that defect-assisted carrier recombination processes are well consistent with the observed dynamics. The photo-excited carriers are captured by defects with at least two different capture rates via Auger scattering. Four processes are deemed to take part in the carrier relaxation. After photoexcitation, carrier cooling occurs instantly within ～0.5 ps. Then most of carriers are fast captured by the defects, and the corresponding time constant increases from ～4.9 ps to ～9.2 ps with increasing pump fluence, which may be interpreted by saturation of the defect states. Next a small quantity of carriers is captured by the other kinds of defects with a relatively slow carrier capture time within ～65 ps.Finally, the remaining small fraction of carriers relaxes via direct interband electron-hole recombination within～1 ns. Our results may lead to deep insight into the fundamentals of carrier dynamics in MoS2 nanodots, paving the way for their further applications.
基金High-Level Talents Introduction in Yunnan Province(No.C619300A010)the Fund for Excellent Young Scholars of Yunnan(No.202001AW070008)+5 种基金Spring City Plan:the High-level Talent Promotion and Training Project of Kunming(No.2022SCP005)for financial supportsupport from the Postdoctoral Foundation of Department of Human Resources and Social Security of Yunnan Province(No.C615300504046)Postdoctoral Research Foundation of Yunnan University(No.W8223004)the National Natural Science Foundation of China(No.22209144)the Project of Natural Science Foundation of Yunnan(Nos.202101AU070034 and 202101AT070337)the Innovation and Entrepreneurship Training Program for college students(No.202110673032)。
文摘Understanding the role of perovskite surface passivators in hot carriers transfer dynamics is important to develop highly efficient perovskite solar cells(PSCs).In this work,we have designed and synthesized a naphthalimide-based organic small molecule(NCN)for perovskite surface defect passivator.We reveal that the introduction of NCN not only reduces the density of perovskite defect-state,but also promotes hot carriers(HCs)cooling in perovskite through the transient absorption spectroscopy measurements.Fast HCs cooling permits HCs transfer from perovskite layer into NCN layer,thus resulting in the decreased charge-carrier recombination in NCN-treated device.As expected,the power conversion efficiency(PCE)of PSCs with NCN is enhanced to 22.02%from 19.95%for the control device.The findings are relevant for developing highly efficient PSCs.
基金supported by Brain Pool ProgramBasic Science Program through the National Research Foundation of Korea(NRF)funded by the Ministry of Science and ICT[NRF2019H1D3A1A01102524,NRF-2019M3F3A1A03079739,and NRF2019R1A2C2003804]supported by Ajou University
文摘The conversion efficiency of energy-harvesting devices can be increased by utilizing hot-carriers(HCs).However,due to ultrafast carrier-carrier scattering and the lack of carrier injection dynamics,HC-based devices have low efficiencies.In the present work,we report the effective utilization of HCs at the nanoscale and their transfer dynamics from a non-noble metal to a metal oxide interface by means of real-space photocurrent mapping by using local probe techniques and conducting femtosecond transient absorption(TA)measurements.The photocurrent maps obtained under white light unambiguously show that the HCs are injected into the metal oxide layer from the TiN layer,as also confirmed by conductive atomic force microscopy.In addition,the increased photocurrent in the bilayer structure indicates the injection of HCs from both layers due to the broadband absorption efficiency of TiN layer,passivation of the surface states by the top TiN layer,and smaller barrier height of the interfaces.Furthermore,electrostatic force microscopy and Kelvin probe force microscopy provide direct evidence of charge injection from TiN to the MoO_(x)film at the nanoscale.The TA absorption spectra show a strong photo-bleaching signal over wide spectral range and ultrafast decaying behavior at the picosecond time scale,which indicate efficient electron transfer from TiN to MoO_(x).Thus,our simple and effective approach can facilitate HC collection under white light,thereby achieving high conversion efficiency for optoelectronic devices.
